Sharp CD-C1H (serv.man4) Service Manual ▷ View online
CD-C1H/CP-C1H
– 49 –
• Although HF waveform is normal and time
indication is normal, no sound is not output.
Check the IC2 pin 48 (EFLG).
Check the IC2 pin 37 and pin 40.
Check IC501 and POWER AMP. IC901.
Yes
Yes
No
Usually, the number of pulses of flawless disc is 100 pulses/sec
or less.
or less.
• Check the tracking system.
Data cannot be read.
Check the waveform of IC1 pin 7 (TE).
The waveform shown in Figure 49-1
appears, and no disc state appears
soon.
appears, and no disc state appears
soon.
Yes
Check the periphery of IC1 pin 8 to
pin 15, and IC5 to CNP2.
pin 15, and IC5 to CNP2.
Tracking servo is inoperative.
Check the VCO-PLL system.
Yes
Yes
Playback is possible in TEST mode.
Yes
Normal jump is
impeded, and the
program top
cannot be
reached.
impeded, and the
program top
cannot be
reached.
Playback is impossible
although initialization
is possible.
although initialization
is possible.
Yes
Yes
Check the
periphery of IC1
pin 14.
periphery of IC1
pin 14.
Figure 49-1
3
4
5ms
1.00 V
IC1 7 TE
1.00 V
IC1 7 TE
5 ms
5.0 V
IC1 54 DRF
5.0 V
IC1 54 DRF
• Check the spindle system
Yes
Yes
Play operation is performed without disc.
The turntable rotates a little.
The turntable fails to rotate or rotates at high speed.
The spindle driver is normal.
No
• Checking the VCO-PLL system.
Play operation is performed when disc exists.
Yes
Although the HF waveform is normal, TOC data cannot be
read.
read.
No
Check the periphery of IC1 pin 23 to pin 27, pin 39, pin 40, IC2
pin 12, pin 13, from IC3 to CNP3.
pin 12, pin 13, from IC3 to CNP3.
No
Check the PDD waveform of IC2 pin 3. (Figure 49-2)
Check the IC1 pin 43, pin 44, IC2 pin 3, pin 5, pin 7, pin 10, and
pin 11.
pin 11.
Abnormal
Figure 49-2
2
3
0.5s
1.00 V
IC2 3 PDO
1.00 V
IC2 3 PDO
0.5s
1.00 V
IC2 16 FD
1.00 V
IC2 16 FD
Stop -- > Play
As VCO frequency is
locked at 4.32 MHz,
voltage of PDD rises
and stabilizes.
locked at 4.32 MHz,
voltage of PDD rises
and stabilizes.
CD-C1H/CP-C1H
– 50 –
IC1 VHiLA9241M/-1: Servo Amp., (LA9241M) (1/2)
1
FIN2
Connection pin for photodiode of pickup.
RF signal is generated through addition with FIN pin, and FE signal is generated through subtraction.
RF signal is generated through addition with FIN pin, and FE signal is generated through subtraction.
2
FIN1
Connection pin for photodiode of pickup.
3
E
Connection pin for photodiode of pickup. TE signal is generated through subtraction with F pin.
4
F
Connection pin for photodiode of pickup.
5
TB
Pin for input of DC component of TE signal.
6
TE-
Pin to connect gain setting resistor of TE signal to TE signal.
7
TE
TE signal output pin.
8
TESI
TES (Track error sense) comparator input pin. TE signal is band-passed and input.
9
SCI
Input pin for shock detection.
10
TH
Pin to set time constant of tracking gain.
11*
TA
TA amplifier output pin.
12
TD-
Pin to compose tracking phase compensation constant between TD and VR pins.
13
TD
Pin to set tracking phase compensation.
14
JP
Pin to set amplitude of tracking jump signal (kick pulse).
15
TO
Tracking control signal output pin.
16
FD
Focusing control signal output pin.
17
FD-
Pin to compose focusing phase compensation constant between FD and FA pins.
18
FA
Pin to compose focusing phase compensation constant between FD-/FA-pins.
19
FA-
Pin to compose focusing phase compensation constant between FA and FE pins.
20
FE
Output pin of FE signal.
21
FE-
Pin to connect gain setting resistor of FE signal across TE pin.
22
AGND
GND for analog signal.
23
SP
Single end output for CV+ and CV- pin input.
24
SPI
Spindle amplifier input.
25
SPG
Pin to connect gain setting resistor in the 12cm mode of spindle.
26
SP-
Pin to connect spindle phase compensation constant together with SPD pin.
27
SPO
Spindle control signal output pin.
28
SLEO
Pin to connect thread phase compensation constant.
29
SLD
Thread control signal output pin.
30
SL-
Input pin of thread feed signal from micro computer.
31
SL+
Input pin of thread feed signal from micro computer.
32
JP-
Input pin of tracking jump signal from DSP.
33
JP+
Input pin of tracking jump signal from DSP.
34
TGL
Input pin of tracking gain control signal from DSP. TGL = Gain low at "H"
35
TOFF
Input pin of tracking off control signal from DSP. TOFF = Off at "H"
36
TES
Output pin of TES signal to DSP.
37
HFL
(HIGH FREQUENCY LEVEL) is used to judge whether main beam is positioned on the bit or on the mirror.
38
SLOF
Thread servo off control input pin.
39
CV-
Pin to input CLV error signal from DSP.
40
CV+
Pin to input CLV error signal from DSP.
41
RFSM
RF output pin.
42
RFS-
Pin to set gain of RF and set 3T compensation constant together with RFSM pin.
43
SLC
(SLICE LEVEL CONTROL) is the output pin to control of the level of the data slice with RF waveform DSP.
44
SLI
Input pin to control the level of data slice with DSP.
45
DGND
GND pin in the digital system.
46
FSC
Output pin for focus search smoothening capacitor.
47
TBC
(Tracking Balance Control) Pin to set EF balance variable range.
48*
NC
No connect.
49
DEF
Defect detection output pin of disk.
50
CLK
Reference clock input pin. 4.23MHz of DSP is input.
Pin No.
Port Name
Function
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
FUNCTION TABLE OF IC
CD-C1H/CP-C1H
– 51 –
IC1 VHiLA9241M/-1: Servo Amp., (LA9241M) (2/2)
Pin No.
Port Name
Function
51
CL
Micro computer command clock input pin.
52
DAT
Micro computer command data input pin.
53
CE
Micro computer command chip enable input pin.
54
DRF
(DETECT RF) RF level detection output.
55
FSS
(Focus Serch Select) Pin to switch focus search mode. (
±
search/+ search for reference voltage)
56
VCC2
VCC pin for servo system and digital system.
57
REFI
Pin to connect pass control for reference voltage.
58
VR
Reference voltage output pin.
59
LF2
Pin to set defect detection time constant of disk.
60
PHI
Pin to connect capacitor for peak hold of RF signal.
61
BHI
Pin to connect capacitor for bottom hold of RF signal.
62
LDD
APC circuit output pin.
63
LDS
APC circuit output pin.
64
VCC1
RF system VCC pin.
Figure 51 BLOCK DIAGRAM OF IC
1
FIN2
FIN1
E
F
TB
TE-
TE
TESI
SCI
TH
TA
TD-
TD
JP
TO
FD
FD-
FA
FE
JP+
TGL
TOFF
TES
HFL
SLOF
CV-
CV+
RFSM
RFS-
SLC
SLI
DGND
FSC
TBC
NC
DEF
CLK
CL
DAT
CE
DRF
FSS
VCC2
REFI
VR
LF2
PHI
BHI
LDD
LDS
SLC
RF AMP
TE
F.SERVO & F.LOGIC
SPINDLE SERVO
SLED SERVO
VCC1
2
3
4
6
7
5
8
9
10
11
12
13
14
15
16
17
18
19
20 21
23
22
25 26
27
28
29
30 31
32
33
34
35
36
37
38
39
40
41
42
43
44
46
47
48
49
50
51
52
53
54
55
56
57
58
59
61
60
62
63
64
45
24
APC
RF DET
REF
VCA
VCA
INTER FACE
BAL
µ
-COM
I/V
T.SERVO & T.LOGIC
JP-
SL+
SL-
SLD
SLEO
SPO
SP-
SPG
SPI
SP
AGND
FE-
FA-
IC1 VHiLA9241M/-1: Servo Amp., (LA9241M)
CD-C1H/CP-C1H
– 52 –
1
DEFI
Input
Input terminal of defect detection signal (DEF). (Connected to OV when not used.)
2
TA1
Input
For PLL
Input terminal for test. Pull-down resistor is integrated. Surely connected to 0V.
3
PDO
Output
Output terminal of phase comparison for external VCO control.
4
VVSS
—
Ground terminal for integrated VCO. Surely connected to 0V.
5
ISET
Input
Resistance connection terminal for current adjustment of PDO output.
6
VVDD
—
Power terminal for integrated VCO.
7
FR
Input
VCO frequency range adjustment.
8
VSS
—
Ground terminal of digital system. Surely connected to 0V.
9
EFMO
Output
For slice level control
EFM signal output terminal.
10
EFMIN
Input
EFM signal input terminal.
11
TEST2
Input
Input terminal for test. Pull-down resistor is integrated. Surely connected to 0V.
12
CLV+
Outout
Output for disk motor control. 3 values can be output with the commands.
13
CLV-
Output
Output for disk motor control. 3 values can be output with the commands.
14
V/P
Output
Monitor output terminal for automatic switch of rough servo/phase control.
"H" for rough servo, and "L" for phase servo.
"H" for rough servo, and "L" for phase servo.
15
HFL
Intput
Input terminal of track detection signal. Schmit input.
16
TES
Input
Input terminal of tracking error signal. Schmit input.
17
TOFF
Output
Tracking OFF output terminal.
18
TGL
Output
Output terminal for switch of tracking gain "L" increases the gain.
19
JP+
Output
Output for track jump control. 3 values can be output with the commands.
20
JP-
Output
Output for track jump control. 3 values can be output with the commands.
21*
PCK
Output
Clock monitor terminal for EFM data replay. 4,3218MHz as the phase clock.
22*
FSEQ
Output
Output terminal synchronous signal detection. "H" is output when synchronous signal detected
by EFM signal matches synchronous signal internally generated.
by EFM signal matches synchronous signal internally generated.
23
VDD
—
Power terminal of digital system.
24
CONT1
Output
OPEN direction
25
CONT2
Output
CLOSE direction
26
CONT3
Output
Cam motor forward rotation
27
CONT4
Output
Cam motor reverse rotation
28
CONT5
Output
Cam motor speed selection High speed "L" Low speed "H"
29*
EMPH
Output
Difference monitor terminal At "H", deemphasis disk is being replayed.
30*
C2F
Output
C2 flag output terminal.
31
DOUT
Output
Output terminal of digital OUTPUT. (EIAJ format)
32*
TEST3
Input
Input terminal for test. Pull-down resistor is integrated. Surely connected to 0V.
33
TEST4
Input
Input terminal for test. Pull-down resistor is integrated. Surely connected to 0V.
34
PCCL
—
Terminal not use. Ground terminal.
35*
MUTEL
Output
L channel 1 bit DAC
Mute output terminal for L channel.
36
LVDD
—
Power terminal for L channel.
37
LCHO
Output
L channel output terminal.
38
LVSS
—
Ground terminal for L channel Surely connected to 0V.
39
RVSS
—
R channel 1 bit DAC
Ground terminal for R channel Surely connected to 0V.
40
RCHO
Output
R channel output terminal.
41
RVDD
—
Power terminal for R channel.
42*
MUTER
Output
Mute output terminal for R channel.
43
XVDD
—
Power terminal for quartz oscillation.
44
XOUT
Output
Ground terminal of 16.9344 MHz quartz oscillator.
45
XIN
Input
Ground terminal of 16.9344 MHz quartz oscillator.
46
XVSS
—
Ground terminal for quartz oscillation. Surely connected to 0V.
47*
SBSY
Output
Output terminal of synchronous signal of subcode block.
48*
EFLG
Output
Correction monitor terminal of C1, C2, single and double.
Pin No.
Function
Terminal Name Input/Output
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
IC2 VHiLC78622K-1: Servo/Signal Control (LC78622K) (1/2)
Click on the first or last page to see other CD-C1H (serv.man4) service manuals if exist.