Panasonic TY-FB7HD Service Manual ▷ View online
9 Cover for printing with A4
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6 Block and Schematic Diagram
6.1. Schematic Diagram Notes
9
6 Block and Schematic Diagram
6.1. Schematic Diagram Notes
9
6.2. HI-Board Block Diagram
CS
TDI
TDO
TCK
F
V
H
F
H
V
CS
TDO
TDI
TCK
SW3301
1
2
3
4
SDI INPUT
JK3301
EQUALIZER
4
SERIAL IN
IC3302
12
13
SERIAL
DATA[2]
DATA[2]
6
8
2
1
24
23
8
IC3307
OUTPUT DRIVER
BUF SERIAL
DATA[2]
DATA[2]
SDI OUTPUT
JK3302
SERIAL OUT
73
Z3301
VCO
27 28 29 30
34 35 36
DESERIALIZER
IC3304
MODE SW
IC3402
RESET
4
2
5
7
M_SD/HD
S352_CHK
AUTO/MANU
72
IC3306
LOCK
2
5
6
2
5
6
DATA ERROR
IC3305
31
S2P[0-19]
20bit data bus
Y[10],Pb/Pr[10]
20bit data bus
Y[10],Pb/Pr[10]
38
63
69
P_CLK(75MHz)
LVDS_CLK
14 21 86 12 13 25 24
56
33
16
3
142
FPGA
IC3403
S2P[0-19]
DATA ERROR
PLL LOCK
IC3404
FPGA CONFIG ROM
1
2
5
6
NCS
DATA
ASDI
DCLK
10
6
3
8
7
9
1
H3302
127
Y[0-7]
134
119
Pb[0-7]
126
107
Pr[0-7]
113
71 70
72
29 30
27 28
104
103
15
27
14
50
28
Pr[0-7]
56
4
Pb[0-7]
24
Y[0-7]
2
3
S2P[0-19]
LVDS
IC3405
17
31
32
ERR
INIT
VD
HD
HD
VD
PWRD
WN
P_CLK
IC3406
5
8
6
SLOT CONFIG ROM
A22
B24
B25
6
8
2
H3301
B23
B12
40
B11
39
B14
38
37
B15
B8
42
41
B9
B5
46
45
B6
B2
48
47
B3
H3300
TXA0
TXA1
TXB1
TXB0
TXC1
TXC0
TXD1
TXD0
TXCLK1
TXCLK0
STBY+5V
IIC DAT
IIC SCL
SRQ
B19
A19
+5V
+5V
B17
A17
+3.3V
+3.3V
1
4
AVR 3.3V
IC3503
5
IC3502
1
AVR 1.8V
5
4
IC3501
1
AVR 1.5V
5
4
+1.5V
+3.3V
+3.3V
+1.8V
TY-FB7HD
HI-Board Block Diagram
HI-Board Block Diagram
TY-FB7HD
HI-Board Block Diagram
HI-Board Block Diagram
10
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