Panasonic TX-LR32X5 Service Manual ▷ View online
TX-LR32X5
25
9 Block Diagram
9.1.
Main Block Diagram
S5/ S3.3
CPU BUS
XECS1
XEAS
XEAS
XNMIRQ
XIRQ1
XERE
XEWE0
XIRQ1
XERE
XEWE0
S5
CI POWER ON >
DATA
ADR
CTRL
LED Information
REMOCON
Reciever
ILLUMINANCE
Sensor
SD_LED_ON >
RMIN >
AI_SENSOR >
Flont Panel
G_LED_ON >
R_LED_ON
>
>
S12/S5
STB5/5VS
S9 REG
S9
(SD-Data-VCC)
S3.3
NAND
ED[7:0]
Support
Card
< DTV_XRST
XEAS
ECLK
ESZ1
XEWE1
ERXW
ECLK
ESZ1
XEWE1
ERXW
XEWE0
ESZ0
XEDK
BOOTSWAP
(XRST)
ESZ0
XEDK
BOOTSWAP
(XRST)
S3.3
Buffer
5V TS
CI
Power
Circuit
CI_POWER_ON >
< CI_OCP
< CI_OCP
ED[15:0]
EA[7:0],EA[24]
ERXW
ED[7:0]
CI_DA[7:0]
< PCDOE
5V TS
CI
>
RS-232C
Control Serial
Control Serial
RIMOCON
THRU OUT
THRU OUT
For System VIErA Model
STB3.3
RS-232C IF
ICL3223EIVZ-T
STM-Serial
DMD_IIC0
< AGCI
S5/ S3.3/ S1.8
Low-IF
SCL
SDA
IF_AGC
IFD_OUT1
IFD_OUT2
IFD_OUT2
S12
< TV_SOS
AMP/HP MUTE
MONITOROUT MUTE
AMP/HP MUTE
MONITOROUT MUTE
Analog
ASIC
AN34043A
OVP
SOS
SOS
Safety
Circuit
< MON_MUTE
< SP_HP_MUTE
< SP_HP_MUTE
STB3.3V/1.2V_REG
STB5V Reset IC (STM)
S9V_REG
S12V Reset IC (Peaks)
Audio MUTE
OCP/OVP/TV-SOS
HP_MUTE,EXT_MUTE
UHS-I_REG
TV_SOS
PWM
STB5V Reset IC (STM)
S9V_REG
S12V Reset IC (Peaks)
Audio MUTE
OCP/OVP/TV-SOS
HP_MUTE,EXT_MUTE
UHS-I_REG
TV_SOS
PWM
3.3/1.8
UHS-1
UHS-1
REG
S9-REG
< (SDVOLC)
PWM >
XNFCE,XNF
WP
NFCLE,NFAL
E
XNFWE,XNF
RE
NANDRYBY
WP
NFCLE,NFAL
E
XNFWE,XNF
RE
NANDRYBY
ED[15:0]
NAND-IF
EA[15:1]
< PCDOE
PCOE
PCWE
PCIORD
PCIOWR
PCRESET
PCCE1
PCWE
PCIORD
PCIOWR
PCRESET
PCCE1
HSBCLKOUT
HSSYNCOUT
HSVALOUT
HSDOUT[0:7]
HSSYNCOUT
HSVALOUT
HSDOUT[0:7]
HS0BCLKIN
HS0SYNCIN
HS0VALIN
HS0DIN[0:7]
HS0SYNCIN
HS0VALIN
HS0DIN[0:7]
PCWAIT
PCCD1
PCCD2
PCREADY
PCCD1
PCCD2
PCREADY
CI-IF
TS-IN
TS-OUT
Analog AV Input
S9/S5
㻴㻰㻛㼂㻰㻛㻲㻮㻷
㻹㼁㼀㻱
P IIC
A-Chip VDD
Analog AV Input
SIFIN
FEAIN
HS1BCLKIN
HS1SYNCIN
HS1VALIN
HS1DIN[0:7]
HS1SYNCIN
HS1VALIN
HS1DIN[0:7]
DMD
P-IIC2 (For DMD only)
ADC
DTV Decoder
SIF Decoder
VIF Decoder
IIC
DMD-IIC0
DMD-IIC1
DMD-IIC1
Trans Port Decoder
CPUBUS
NAND-IF
P
k
Cross Stream Switch
SCART-RGB
PC
7
7&21
LCD
PANEL
Driver
Ctrl
mini-LVDS 135MHz 2pair
RGB24bit
(LPL),LPR,(POLL),POLR
CPV,GDATA1,GDATA2
(LD)
CPV,GDATA1,GDATA2
(LD)
Back Light
INVERTER
or
LED Driver
BL_ON >
BL_SOS <
BL_SOS <
PWM
(ADIM)
(ADIM)
S3.3
TEMP
SENSOR
P-IIC
S9
INV-LED
For EEFL
PANEL_LED_ON >
DVB-T
Video_OUT (CVBS)
D/A TUNER
SIF_OUT
Video_OUT
SIF_OUT
Reset
< FE_XRST
Peaks
DCDC
DCDC
S1.2
S1.5
S1.8
S3.3
STB3.3
STB1.2
STB1.2
STB_XRST
DCDC_EN
DTV_XRST >
SW_OFF_DET >
XRST POWER_DET
iPod CVBS,L/R
S3 3
CVBS
RGB /YPbPr /CVBS /YC
HS,VS
Audio OUT L/R
Monitor OUT L/R
Monitor Out L/R
Audio Input
Video Input
Monitor Out CVBS
AV-SW
R2A11014AFT
Head Phone L/R
P-IIC
Main Audio L/R
R1, G1, B1, V1
LIN1_R, LIN1_L
LO1_R, LO1_L
HP1_R, HP1_L
SCART TV-OUT L/R
LO2_R, LO2_L
VDAC1
SCART Out L/R
(Audio L/R)
Scart Out CVBS
A-SW
(Thru)
ADC
DAC
DAC
IPR INS
DSP
V-SW
(Thru)
ADC
DAC
DAC
Analog Video
Processor
Video
Format
Processor
Peaks
sLD2
Head
Phone
Phone
V
R
L
Y
Pb
Pr
R
L
R
L
SCART-RGB
Side
/9'67[
PLQL/9'67[
S1.5
DDR
LCD
Driver
EEP
2k
S12
P-IIC
RGB24bit
T-CON
DCDC
P-IIC
GAMMA
DAC
AVDD_ENB >
PANEL_VCC_ON >
LCD_EEP_WP >
P-IIC
REV_DAC_ENB >
Panasonic
iPod Dock
P-UART
S3.3
iPod
Authentication
Coprocessor
MFI341S2161
MFI341S2161
IPOD_CP_XRST
P-IIC
STB6
IPod
Power
Circuit
5V
IPOD_PWR_ON <
XIPOD_DET >
XIPOD_ACC_PWR >
< IPOD CTL SW
XIPOD_ACC_PWR >
< IPOD CTL SW
ExIO
STM-IIC
STB3.3
IPOD_PWR_SOS >
S12
Illumination
Illumination
LED
Circuit
SP_LED_ON <
SOUND_VCC/ S3
PWM
AMP
TAS5709PHPR
MCLK
LRCLK
SCLK
SDIN
LRCLK
SCLK
SDIN
P-IIC
< DTV_XRST
For sLD2 2AMP
I2S
SW
SW
A-Chip
A-D Chip
Internal BUS
USB
S5
USB
Power SW
USB0VBUS >
< USB0OC
< USB0OC
S5
S5
USB
USB1VBUS >
< USB1OC
< USB1OC
S5
USB Memory
EEP
EU,Russia
CI+: 32k
DLNA1 5 64k
DLNA1 5 64k
DDR3+
x16
1G
DDR3+
x16
1G
''5,)[
_
_
SOUND_VCC
PWM
AMP
?
PWM0LP
PWM0LN
PWM0RP
PWM0RN
PWM0LN
PWM0RP
PWM0RN
SP_LED_DIM <
AMP
PWM
SPDIF
SW
IIC
STM IIC
STM
25MHz
S3.3
ETHER
S3.3
PHY
KSZ8041
0,,,)
COL,CRS,RXCLK
RXD0,RXD1,RXD2,RXD3
RXDV,RXER,TXCLK
TXD0,TXD1,TXD2,TXD3
TXEN,MDC,MDIO,MDIO_INTL
PHYRSTL,WAKEUP,WUC
RXD0,RXD1,RXD2,RXD3
RXDV,RXER,TXCLK
TXD0,TXD1,TXD2,TXD3
TXEN,MDC,MDIO,MDIO_INTL
PHYRSTL,WAKEUP,WUC
USB
Power SW
< USB1OC
S5
S5
86%,)
D-Chip
STB3.3
EEP
16k
STM
EEP_WP >
EEP_WP >
For STM
S3.3
EEP
EEPROM_WP
P-IIC
For Peaks
DLNA1.5: 64k
ASIA,Lathin
DLNA1.5: 32k
ELSE: 16k
ELSE: 16k
Optical OUT
OPT
DDC0 > STM, Peaks
HPD0 < STM
HDMI 5V DET0 > STM
HDMI 5V DET0 > STM
HDMI1
S3.3
ARC Buffer-SW
ARC_OFF <
Rx0
IECOUT
HDMI
Rx
MUX
x3
CLK
GEN
GEN
STB3.3
STB1.2
STB1.2
STM-IIC
Serial
STM-Serial0
STM-Serial1
STM-Serial1
24.576MHz
STM
STM-D Chip
Communication Register
ETHER_XRST <
6',)
SDXC
S5
SD Reg
SD_PWR_ON >
< SD_COIN_DET
< SD_COIN_DET
S3.3
ExFAT: yes
High Speed: no
UHS-I : no
High Speed: no
UHS-I : no
SD-Data-VCC
SDCLK,SDCMD,SDVOLC,
SDDAT[3:0],SDCD,SDWP
SDDAT[3:0],SDCD,SDWP
< KEY1
CONTROL PANEL KEY
IIC
P-IIC0
P-IIC1
(P-IIC2)
P-IIC3
P-IIC1
(P-IIC2)
P-IIC3
Serial
P-Serial0
P-Serial1
P-UART0
P-UART2
P-Serial1
P-UART0
P-UART2
DMD IIC
DMD_IIC
0
DMD_IIC
1
0
DMD_IIC
1
XOR
DDC2 > STM, Peaks
HDMI_5V_DET0 > STM
DDC1 > STM, Peaks
HPD1 < STM
HDMI_5V_DET1 > STM
HDMI_5V_DET1 > STM
HDMI2
HPD2 < STM
HDMI_5V_DET2 > STM
HDMI_5V_DET2 > STM
HDMI3
Rx1
Rx3
TX-LR32X5
26
10 Wiring Connection Diagram
10.1. Wire Dressing
1. Fix clamper (2 pcs).
2. Wiring No 1~ No 2.
3. Stick gaasket (1).
4. Install PET tape (1).
2. Wiring No 1~ No 2.
3. Stick gaasket (1).
4. Install PET tape (1).
No Item
Description
Qty
065 TMME268
CLAMPER(LCD2)
2
PC
068 T4FP1505J
PET TAPE
0.1
PC
Wire
Clamper
1
2
No.1
P2 - A09
No.2
P3
No.3
A10 - KA10
No.4
A12 - SP(L)
No.5
A12 - SP(R)
TX-LR32X5
27
11 Schematic Diagram
11.1. Schematic Diagram Notes
TX-LR32X5
28
11.2. A-Board (1/17) Schematic Diagram
6
5
4
3
2
1
A
B
C
D
E
F
G
H
I
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