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53

LC
Filter

Power
Amp

Driver
Amp

Ceramic
Filter

915MHz

457MHz

FL450

Ceramic
Filter

2440MHz

FL430

Q431

Q430

Q530

LNA

AGC

TXPN

33

37

42

45

X2

PLL

PLL

Ref

TXVCO

LC Filter

PN generator

PN generator
(Sliding)

LC Filter

A/D

Logic

PLLIC

@

IC450

IFIC

@

IC500

X490

2,3

11,10

39,37

19

28

18

20

23

14

6,7

1

3

12

26

16

1

12

40.960MHz

2390MHz

RX VCO

Limitter

RSSI

Comp

Comp

Rect

Det

Comp

IFAMP

Amp

SS ASIC

@

IC620

TXRST 

40HzStart 

34

18

24

19

4

38

22

29

11

44

36

SSRST 

41

SSEN 

RXRST 

RSSI1 

SSLOCK 

Data,CLK 

PLLEN 

MOD 

TXDATA 

RSSI2 

AFOUT 

RXDATA 

SQR 

Q630

CLK

RXPN

10
11
16

5

22

AF
AMP

Active Filter

IC600

Q500

SQ

Ceramic
Disc.

10.8MHz
Filter

51.76MHz
Filter

Noise
Filter

L500

FL501

FL500

26

23

Q400

Q401

Driver
Amp

Q402

54

CNT DATA

Q204

+

C

-

+

-

BATT

RESET

Power Down

HEAD PHONE JACK

AF IC IC201

AMP

COMP

FILTER

SP AMP

VOL

EXP

AMP

RX

REG

RESET

POWER
DOWN

REG

SPEAKER

MIC

24

5

25

17

37

53

35

Q205

13

RSSI1

IC 901

RSSI1

14

RSSI2

15

SS LOCK

TX-RST
40Hz

26
32
27

35

SS-RST

9

SS-EN

25

63

RX-RST

10

CLK

11

8

PLL-EN

28

TX-DATA

SQR

AFOUT

MOD

RSSI2
SQLCH

TX-RST
40 Hz-START
SS-RST
SS EN
RX-RST
PLL CLK
PLL RST
TX-DATA

CHARGE-ID

Power Down

RESET

55

RINGER (Q202)

CPU (IC901)

RF CIRCUIT (900M Amp)

RF CIRCUIT (TX CIRCUIT)

IC690 (RF UNIT Rx Block)

(SS ASIC (IC620))

RF CIRCUIT (RX CIRCUIT)

VCC - REF (Pin 

50 

)

VCC - MAIN (Pin 

51 

)

IC201

VCC - TXREG (Pin 

30 

)

VCC - RXREG (Pin 

31 

)

VCC - SPAMP (Pin  

1  

)

C223

IC201

DATA Amp 2

CPU (IC901 16PIN)

DATA Amp 1

C217

R213

from RF CIRCUIT
AFOUTPUT

R218

C212

46

47

48

49

The voltage is supplied separately to each block.

The wave detection signal from the RF UNIT has high frequency elements eliminated by a CR filter consisting of R213 and C212.
Then it is amplified by DATA Amp1 and, once again, high frequency elements are eliminated by R218. After this, the signal is
amplified by DATA Amp2 and input to pin 16  of the CPU.
The data output waveform is a block pulse.

56

RX VOL

+7dB

0dB

–7dB

EV1

H

L

L

EV2

L

H

L

22  pin

21  pin

R204

R201

Q201

Q202

RINGER

24

23

ALARM_VOL

ALARM

IC901

If the ringer volume is set to low and the key is entered an alarm tone is output from pin 23  of the CPU and input to Q202. If the
ringer volume is set to high, Q201 turns on and results in a louder beep tone.

The receiver circuit comprises expander IC201.
After being adjusted to the appropriate level by VR202, the signal passes through a 3 kHz LPF and an expander built into IC201.
When the user talks more softly, the received audio signal is audible at the standard level.

SP MUTE H :  SPEAKER OFF

L :  SPEAKER ON