Panasonic KX-TCD725GM Service Manual ▷ View online
6.3.
RF MODULE
BLOCK DIAGRAM RF MODULE
6.3.1.
RF MODULE (SEE BLOCK DIAGRAM Fig.22)
The RF Module consists of two main components: the PMB6610 transceiver and the PMB6818 power amp.
In the transceiver the 10.368MHz clock signal SYCL is multiplied to around 1.9GHz using PLL (Phase Locked Loop) control.
The TXDA signal is used to control the modulation of this frequency to 1.87GHz to 1.93GHz.
Received signals are demodulated, filtered and sent to the BBIC via the RXDA line.
The RSSI (Radio Signal Strength Indicator) signal enables the implementation of diversity switching whereby two antennae can
be mounted in different orientations and their signals compared. The one with better reception can be selected by the BBIC
using the ANT1 and ANT2 lines.
be mounted in different orientations and their signals compared. The one with better reception can be selected by the BBIC
using the ANT1 and ANT2 lines.
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KX-TCD725GM
7 CIRCUIT OPERATION (HANDSET)
BLOCK DIAGRAM BASEBAND SECTION (HANDSET)
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KX-TCD725GM
7.1.
THE BASE BAND SECTION
7.1.1.
INTRODUCTION
The base-band section consists of a base-band integrated circuit (BBIC), a Flash PROM, an EEPROM, an LCD Display, a
Microphone, an Earpiece, and power supply/battery management circuits.
Microphone, an Earpiece, and power supply/battery management circuits.
7.1.2.
THE BASE-BAND INTEGRATED CIRCUIT (BBIC)
The PMB6723 (IC1) is a CMOS device designed to handle all the audio, signal and data processing needed in a DECT handset.
It contains a "burst mode controller" which takes care of DECT specific physical layer and radio section control. It also contains
an ADPCM codec filter used for speech encoding and decoding in the DSP section, a general purpose microcontroller, various
other ADC´s, DAC´s, timers and power control circuitry.
It contains a "burst mode controller" which takes care of DECT specific physical layer and radio section control. It also contains
an ADPCM codec filter used for speech encoding and decoding in the DSP section, a general purpose microcontroller, various
other ADC´s, DAC´s, timers and power control circuitry.
The BBIC interfaces to its external PROM (IC3) via a data/address/control bus. It connects to the EEPROM (IC2) via a serial
interface (SDA and SDC). This serial interface is also used during manufacture and service to connect to an external computer.
interface (SDA and SDC). This serial interface is also used during manufacture and service to connect to an external computer.
7.1.3.
FLASH ROM (SEE Fig. 24)
The 1Mbit Flash PROM IC3 contains the operational firmware for the BBIC´s general purpose microprocessor. It is interfaced
to the BBIC using address lines A0 to A17, data lines D0 to D7, and control lines CE (Chip Enable), WE (Write Enable) and OE
(Output Enable).
to the BBIC using address lines A0 to A17, data lines D0 to D7, and control lines CE (Chip Enable), WE (Write Enable) and OE
(Output Enable).
7.1.4.
EEPROM (SEE Fig. 24)
The electrically erasable PROM IC2 is used to store all the temporary operating parameters for the handset (see EEPROM
LAYOUT). It uses a two-line serial data interface with the BBIC, with bi-directional data on IC2 pin5 (TP52), and a 45 kHz clock
on pin6 (TP53).
LAYOUT). It uses a two-line serial data interface with the BBIC, with bi-directional data on IC2 pin5 (TP52), and a 45 kHz clock
on pin6 (TP53).
7.1.5.
FACTORY SERIAL PORT (SEE Fig. 24)
In order to communicate with the handset during manufacture and servicing (using a PC) a serial data link has been provided.
Serial data input/output is provided through the I2DAT input (pin 64). The data is clocked through using the I2CLK pin (65). Test
probe pads SDA and SDC are provided for Flash PROM download with I2DAT and I2CLK respectively.
probe pads SDA and SDC are provided for Flash PROM download with I2DAT and I2CLK respectively.
To invoke the flash PROM download mode the MODE_SEL test pad must be connected to the 2.65V pad.
A Ground reference Test pad is also provided.
Circuit Diagram
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KX-TCD725GM
7.1.6.
AUDIO PATH - TX AUDIO (SEE Fig. 25)
The audio signal from the microphone (TP23) enters the BBIC at pin 44. RF decoupling and signal conditioning are provided
by C17, R21, C14 and C25.
by C17, R21, C14 and C25.
In the BBIC the signal passes through the analogue section where it is amplified and converted to a digital audio stream signal.
The burst mode controller processes this stream performing encryption and scrambling, adding the various other fields to
produce the GAP standard DECT frame, assigning to a time slot and channel etc. to emerge on pin 14 as TXDA.
The burst mode controller processes this stream performing encryption and scrambling, adding the various other fields to
produce the GAP standard DECT frame, assigning to a time slot and channel etc. to emerge on pin 14 as TXDA.
7.1.7.
AUDIO PATH - RX AUDIO (SEE Fig. 25)
Audio from the receiver RXDA enters the BBIC on pin 10 as GAP standard DECT frames. It passes through the decoding
section burst mode controller where it separates out the frame information and performs de-encryption and de-scrambling as
required. It then goes to the DSP where it is turned back into analogue audio. This is amplified by the analogue front end and
emerges at pin 40 and 41. The telephone speaker is driven directly from the BBIC output ports.
section burst mode controller where it separates out the frame information and performs de-encryption and de-scrambling as
required. It then goes to the DSP where it is turned back into analogue audio. This is amplified by the analogue front end and
emerges at pin 40 and 41. The telephone speaker is driven directly from the BBIC output ports.
The hands-free loudspeaker at SP+ and SP- is used to generate the ring alarm. When the handset is not in hands-free mode
the HF_AM1 amplifier is deactivated by the SP_CTR control signal at pin 93 from the BBIC.
the HF_AM1 amplifier is deactivated by the SP_CTR control signal at pin 93 from the BBIC.
The earpiece speaker LS1 is driven directly from the HON and HOP output lines, pins 40 and 41, without any amplification.
A 2.5mm jack J6 is provided for connecting a headset.
7.1.8.
CLOCK GENERATION (SEE Fig. 25)
A single clock generator in the BBIC uses an external crystal X1 to derive all clock frequencies used in the handset. The crystal
is tuned to the exact frequency of 10.368 MHz during manufacture.
is tuned to the exact frequency of 10.368 MHz during manufacture.
The BBIC provides a reference clock signal SYRI (pin 21, TP101) which is used to drive the PLL circuitry in the RF module. The
basic data rate for TXDA (pin 14) and RXDA (pin 10) is 1.152 Mbits/s, which is 10.368MHz divided by 9.
basic data rate for TXDA (pin 14) and RXDA (pin 10) is 1.152 Mbits/s, which is 10.368MHz divided by 9.
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KX-TCD725GM
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