Panasonic KX-TCD715RUM Service Manual ▷ View online
6.1.3.
FLASH PROM (SEE Fig. 18)
The 2 Mbit (IC5) Flash PROM contains the operational firmware for the microcontroller. It is interfaced to the
data/address/control bus using address lines A0 to A17, data lines D0 to D7, and chip select (pin 30), output enable (pin 32),
and write (pin 7).
data/address/control bus using address lines A0 to A17, data lines D0 to D7, and chip select (pin 30), output enable (pin 32),
and write (pin 7).
6.1.4.
EEPROM (SEE Fig. 18)
The electrically erasable PROM PQVIT2464WM6 (IC9) is used to store all the temporary operating parameters for the base
(see EEPROM LAYOUT (BASE UNIT)). It uses a two-line serial data interface with the BBIC, with bi-directional data on pin 5
(TP104), and clock on pin 6 (TP3).
(see EEPROM LAYOUT (BASE UNIT)). It uses a two-line serial data interface with the BBIC, with bi-directional data on pin 5
(TP104), and clock on pin 6 (TP3).
6.1.5.
CLOCK GENERATION (SEE Fig. 18)
A single clock generator in the BBIC uses an external crystal X1 to derive all clock frequencies used in the base. The crystal
is tuned to the exact frequency of 10.368 MHz during manufacture.
is tuned to the exact frequency of 10.368 MHz during manufacture.
The BBIC provides a reference clock signal SYRI (pin 5, TP101) which is used to drive the PLL circuitry in the RF module. The
basic data rate for TXDA (pin 12 and RXDA (pin 20) is 1.152 Mbits/s, which is 10.368MHz divided by 9.
basic data rate for TXDA (pin 12 and RXDA (pin 20) is 1.152 Mbits/s, which is 10.368MHz divided by 9.
6.1.6.
FACTORY SERIAL PORT (SEE Fig. 18)
In order to communicate with the base band section during manufacture and servicing (using a PC) a serial data link has been
provided.
provided.
Serial data input/output is provided through the SDA terminal (J102). The data is clocked through using the SCL terminal
(J103). A ground terminal is provided by J104.
(J103). A ground terminal is provided by J104.
The serial port terminals J100 to J104 are connected to by means oftest probe pads on the ground plane side ofthe pcb.
6.1.7.
AUDIO PATH-RX AUDIO-LINE INPUT (SEE Fig. 18)
Audio from the line interface TXAF (TP97) enters the BBIC on pin 134. The audio signal passes through the analogue part of
the BBIC where it is amplified and converted to a digital audio stream signal. The burst mode controller processes this stream
performing encryption and scrambling, adding the various other fields to produce the GAP standard DECT frame, assigning to
a time slot and channel etc. to emerge on pin 12 as TXDA.
the BBIC where it is amplified and converted to a digital audio stream signal. The burst mode controller processes this stream
performing encryption and scrambling, adding the various other fields to produce the GAP standard DECT frame, assigning to
a time slot and channel etc. to emerge on pin 12 as TXDA.
6.1.8.
AUDIO PATH - TX AUDIO - LINE OUTPUT (SEE Fig. 18)
Audio from the receiver RXDA enters the BBIC on pin 20 as GAP standard DECT frames. It passes through the decoding
section burst mode controller where it separates out the frame information and performs de-encryption and de-scrambling as
required. It then goes to the DSP where it is turned back into analogue audio. This is amplified by the analogue front end and
emerges at pin 126 - i.e. the RXAF signal ofthe line interface.
section burst mode controller where it separates out the frame information and performs de-encryption and de-scrambling as
required. It then goes to the DSP where it is turned back into analogue audio. This is amplified by the analogue front end and
emerges at pin 126 - i.e. the RXAF signal ofthe line interface.
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Circuit Diagram
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6.2.
THE LINE INTERFACE SECTION (SEE BLOCK DIAGRAM Fig. 17)
6.2.1.
INTRODUCTION
This section consists ofthe telephone line interface, bell detector, charge-pulse detector, hook switch, pulse dialing circuits,
audio circuits, DC mask & line impedance circuits, power supplies, and battery charger circuits.
audio circuits, DC mask & line impedance circuits, power supplies, and battery charger circuits.
6.2.2.
TELEPHONE LINE INTERFACE (SEE Fig. 19)
The telephone line is connected to a bridge rectifier D8. Surge suppressor SA3 protects against excessive line voltages. Test
points are TP40 (A), TP26 (B). Bridge rectifier D8 provides for lines of either polarity. The output of D8 is “Line +” (TP50) and
“Line -” which is ground.
points are TP40 (A), TP26 (B). Bridge rectifier D8 provides for lines of either polarity. The output of D8 is “Line +” (TP50) and
“Line -” which is ground.
6.2.3.
BELL DETECTOR (SEE Fig. 19)
The AC ringing signal is detected by phoptocoupler IC2, using its internal diode in conjunction with D4. DC from the line is
blocked by C2. The other components D2, D3, and R3 reduce current and increase the circuit impedance in line with national
requirements. When ringing is detected IC2 will turn on, and the RING line will be dragged to a low voltage.
blocked by C2. The other components D2, D3, and R3 reduce current and increase the circuit impedance in line with national
requirements. When ringing is detected IC2 will turn on, and the RING line will be dragged to a low voltage.
6.2.4.
CLIP CIRCUITS(SEE Fig. 19)
The CLIP signal is detected by IC3 and sent to the BBIC through the /TXAF line as a square waveform. The CLIP_STATE
signal from the BBIC is used to provide a CLIP impedance through a combination of components selected from R85, R86, C93,
C37 and R1. The combination depends upon the CLIP requirements of the specific country - often there is no requirements for
the CLIP_STATE impedance.
signal from the BBIC is used to provide a CLIP impedance through a combination of components selected from R85, R86, C93,
C37 and R1. The combination depends upon the CLIP requirements of the specific country - often there is no requirements for
the CLIP_STATE impedance.
T10 disables the CLIP signal during the off-hook condition.
6.2.5.
HOOKSWITCH (SEE Fig. 19)
T8 is the hookswitch, driven by T9. When the phone is “off-hook”, the HOOK control signal from the BBIC will be a high logic level
(+2.7V), and both transistors will be on, thus T8 will “loop” the line. The zenner diode D10 protects transistors T11 to T13 against
transient line voltages.
(+2.7V), and both transistors will be on, thus T8 will “loop” the line. The zenner diode D10 protects transistors T11 to T13 against
transient line voltages.
6.2.6.
PULSE DIALING (SEE Fig. 19)
During pulse dialing the hookswitch (T8, T9) is used to generate the pulses using the HOOK control signal, which is set high
during pulses. To force the line impedance low during the “pause” intervals between dial pulses, the PULSE-DIAL signal turns
on T11.
during pulses. To force the line impedance low during the “pause” intervals between dial pulses, the PULSE-DIAL signal turns
on T11.
6.2.7.
AUDIO CIRCUITS(SEE Fig. 19)
The loop current (typically 40mA) passes through T13, R57 and R56. R54 and R55 provide dc biasing for the base of T13.
The line output signal from the BBIC RXAF is DC decoupled by C47 and amplified by T13. The emitter load (R57, R58 and C46)
is complex in order to achieve the right frequency response with the complex line impedance.
is complex in order to achieve the right frequency response with the complex line impedance.
The line input signal TXAF is taken from the junction of R41 and R49. Phase cancellation is provided at this point by R70 so
that only the incoming line audio should be passed to the BBIC on TXAF.
that only the incoming line audio should be passed to the BBIC on TXAF.
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Circuit Diagram
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