Panasonic KX-NT553RU-B / KX-NT556RU-B Service Manual ▷ View online
77
KX-NT553RU/KX-NT553RU-B/KX-NT556RU/KX-NT556RU-B
13.3. DSS Relay Board
13.4. MIC Board
13.5. LCD Back Light Board
KX-NT553
58/KX-NT55658 DSS Relay BOARD
COMPONENT VIEW
CN206
PNLB2273ZC-IG
KX-NT553/556
1
12
CN207
1
2
12
11
KX-NT553
58/KX-NT55658 MIC BOARD
COMPONENT VIEW
C1
D1
R1
R2
MIC-
MIC+
D103
R100
R101
R102
R103
D100
D101
D102
PNLB2273ZC-IG
BKLT1N
BKLT1P
KX-NT553
58/KX-NT55658 LCD BackLight BOARD COMPONENT V,EW
78
KX-NT553RU/KX-NT553RU-B/KX-NT556RU/KX-NT556RU-B
14 Appendix Information of Schematic Diagram
Note:
1. DC voltage measurements are taken with an oscilloscope or a tester with a ground.
1. The schematic diagrams and circuit board may be modified at any time with the development of new technology.
1. The schematic diagrams and circuit board may be modified at any time with the development of new technology.
79
KX-NT553RU/KX-NT553RU-B/KX-NT556RU/KX-NT556RU-B
15 Exploded View and Replacement Parts List
15.1. IC Data
15.1.1.
IC502
Pin No.
Terminal Name
I/O Setting
Function
Remark
A 1
GND
P
GND
A 2
MEMXA2_EXTINT4
O_
XA2
A 3
MEMXA3_LCDGP0
O_
XA3
A 4
DDR_REF2
AI
NC
A 5
DDRDQS1_N
O_ _low
NC
A 6
DDRDQS1
O_ _low
NC
A 7
DDRDQ0
O_ _low
NC
A 8
DDRDQS0_N
O_ _low
NC
A 9
DDRDQS0
O_ _low
NC
A10
DDRDQ5
O_ _low
NC
A11
DDR_REF1
AI
NC
A12
DDRODT0
O_ _low
NC
A13
DDRCKELP
O_ _low
NC
A14
DDRWE_N
O_ _low
NC
A15
DDRCLK1
O_ _low
NC
A16
DDRCLK1_N
O_ _low
NC
A17
DDRCLK0
O_ _low
NC
A18
DDRCLK0_N
O_ _low
NC
A19
DDRA7
O_ _low
NC
B 1
MEMXA0_LCDD22
O_
XA0
B 2
MEMXA4_LCDGP1
O_
XA4
B 3
MEMXA1_LCDD23
O_
XA1
B 4
DDRDQ8
O_ _low
NC
B 5
DDRDQ11
O_ _low
NC
B 6
DDRDM1
O_ _low
NC
B 7
DDRDQ1
O_ _low
NC
B 8
DDRDQ2
O_ _low
NC
B 9
DDRDQ4
O_ _low
NC
B10
DDRDQ7
O_ _low
NC
B11
DDRCS1
O_ _low
NC
B12
DDRCAS_N
O_ _low
NC
B13
DDRRAS_N
O_ _low
NC
B14
DDRBA1
O_ _low
NC
B15
DDRA0
O_ _low
NC
B16
DDRA3
O_ _low
NC
B17
DDRA6
O_ _low
NC
B18
DDRA10
O_ _low
NC
80
KX-NT553RU/KX-NT553RU-B/KX-NT556RU/KX-NT556RU-B
B19
DDRA14
O_ _low
NC
C 1
MEMXA6_LCDGP3
O_
XA6
C 2
MEMXA10_LCDGP7
O_
XA10
C 3
MEMXA5_LCDGP2
O_
XA5
C 4
DDR_RTT
AI
NC
C 5
DDRDQ10
O_ _low
NC
C 6
DDRDQ12
O_ _low
NC
C 7
DDRDQ14
O_ _low
NC
C 8
DDRDQ3
O_ _low
NC
C 9
DDRDQ6
O_ _low
NC
C10
DDRCS0
O_ _low
NC
C11
DDRODT1
O_ _low
NC
C12
DDRA1
O_ _low
NC
C13
DDRBA2
O_ _low
NC
C14
DDRA2
O_ _low
NC
C15
DDRA5
O_ _low
NC
C16
DDRA8
O_ _low
NC
C17
DDRA12
O_ _low
NC
C18
DDR_REF0
AI
NC
C19
SPI2DO
O_ _low
UCFG4(strap)
D 1
MEMXA13_BA0_LCDD1
O_
SD_BA0
D 2
MEMXA7_LCDGP4
O_
XA7
D 3
MEMXA14_BA1_LCDD8
O_
SD_BA1
D 4
MEMXA16
O_ _low
NC_TP(GPIO4)
D 5
DDRDQ9
O_ _low
NC
D 6
DDRDQ13
O_ _low
NC
D 7
DDRDQ15
O_ _low
NC
D 8
DDRDM0
O_ _low
NC
D 9
DDRRST_N
O_ _low
NC
D10
DDRCKE
O_ _low
NC
D11
DDRBA0
O_ _low
NC
D12
VDD
PI
VDD (1.2)
D13
DDRA4
O_ _low
NC
D14
DDRA9
O_ _low
NC
D15
DDRA11
O_ _low
NC
D16
DDRA13
O_ _low
NC
D17
SPI2DI
O_ _low
NC_TP(GPIO2)
D18
SPI2CK
O_ _low
BOOT_NFL(strap)
D19
D1RX
O_PU
NC_TP(GPIO1)
E 1
MEMXA20_MEMRAS_LCDD16
O_
SD_RAS
E 2
MEMXA9_LCDGP6
O_
XA9
E 3
MEMXA8_LCDGP5
O_
XA8
E 4
MEMRD
O_ _low
NC_TP(GPIO5)
E 5
VDD
PI
VDD (1.2)
E 6
VDD
PI
VDD (1.2)
E 7
VDDIO_DDR
PI
VDDIO_DDR (1.8)
E 8
VDD
PI
VDD (1.2)
E 9
GND
P
GND
E10
VDDIO_DDR
PI
VDDIO_DDR (1.8)
E11
PLL2_DVDD
PI
PLL2_DVDD (1.2)
E12
E_VDDQ
P
PLL1_AVDD (1.2)
E13
PLL1_DVDD
PI
PLL1_AVDD (1.2)
E14
DDRPADLO
AI
NC
E15
SPI1CK
O_
LCD_CLK
E16
DDRPADHI
AI
NC
E17
SPI1DO
O_
LCD_D0
E18
F1SYNC
O_ _low
NC_TP(GPIO0)
E19
XI25M
AI
XI25M
F 1
MEMCKE_EXTINT13
O_
SD_CKE
F 2
MEMXA19_MEMCAS_LCDD9
O_
SD_CAS
F 3
MEMXA11_LCDGP8
O_
XA11
F 4
MEMXA15
O_ _low
NC
F 5
VDDIO_DDR
PI
VDDIO_DDR (1.8)
F 6
VDDIO_DDR
PI
VDDIO_DDR (1.8)
F 7
VDDIO_DDR
PI
VDDIO_DDR (1.8)
F 8
VDDIO_DDR
PI
VDDIO_DDR (1.8)
F 9
VDDIO_DDR
PI
VDDIO_DDR (1.8)
Pin No.
Terminal Name
I/O Setting
Function
Remark
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