PT-RQ22KEJ (serv.man2) — Panasonic Projector Service Manual (repair manual). Page 8

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DIA-8
BLOCK & SCHEMATIC DIAGRAMS
< RQ22K series >
1. 5. Signal Processing Block Diagram [DG-PCB, DF-PCB]
FPGA3-2
LVDS  44pair
4
(CLK 1pair + DATA 10pair)×4
LVDS  24pair
(CLK 1pair + DATA 5pair)×4
LVDS  8pair
(CLK 1pair + DATA 3pair)×2
X4201
132MHz
132MHz
132MHz
IC4201
Config
Config
To A-P.C.B
(A3)
To A-P.C.B
(A2)
PICTURE CONTROL
V WARP
CURSOR DISPLAY
FPGA3-1
IC4505
PICTURE CONTROL
H WARP
WAVEFORM MONITOR
SIGNAL AI
SYSTEM DLV
EDGE BLENDING
UNIFORMITY
NOISE REDUCTION
X4202
X4204
132MHz
132MHz
X4205
X4203
CPLD2
FPGA3-1, 3-2 control
IC4401
SPI-FLASH
FPGA3-1 config data
IC4402
SPI-FLASH
FPGA3-2 config data
IC4241
DG2
DG3
DG1
AURORA  4pair
CLK 1pair, SYNC3
LVDS  4pair
(CLK 1pair + DATA 1pair)×2
IC4501, IC4502,
IC4503, IC4504
DDR3 SDRAM
IC4205, IC4206,
IC4207, IC4208
DDR3 SDRAM
IC4235, IC4236,
IC4237, IC4238
DDR3 SDRAM
LVDS  8pair
(CLK 1pair + DATA 3pair)×2
LVDS  4pair
I2C  1pair,
to CPLD1
to CPLD3
(CLK 1pair + DATA 1pair)×2
I2C  1pair,
PWRGOOD/BUSY/BOOT_HOLD
INT/PROTECT
IIC_POWER/IIC_STB
CPLD3_RESET
PWRGOOD/BUSY/BOOT_HOLD
INT/PROTECT
IIC_POWER/IIC_STB
CPLD3_RESET
PWRGOOD/BUSY/BOOT_HOLD
INT/PROTECT
IIC_POWER/IIC_STB
CPLD2_RESET
AURORA  4pair
CLK 1pair, SYNC3
RST, etc
4
LVDS  12pair
LVDS  12pair
X5004
20MHz
132MHz
132MHz
132MHz
IC5502/IC5503
DDR3 SDRAM
IC5602/IC5603
DDR3 SDRAM
CPLD3-->FPGA4 CONFIG
FPGA4-->FRC
CLK to FRC#0/#1/#2/#3
H/V
CLK
EXBUS
CPLD3-->FPGA4 LVDS I/F
CPLD3-->CPLD4  IIC
CPLD3-->CPLD4  LVDS I/F
To PB-P.C.B
(PB4)
X5001
X5002
X5003
CPLD3
FPGA4, FRC P-on control
FPGA4 control
IC5201
FLASH ROM
IC5202
IC5011, IC5021,
IC5031, IC5041
DDR3 SDRAM
DF1
DF3
To DP-P.C.B
(DP1)
DF2
FRC#1
IC5501
FRC#0
IC5401
FRC#2
IC5601
FRC#2
IC5701
LVDS  12pair
LVDS  12pair
IC5402/IC5403
DDR3 SDRAM
IC5702/IC5703
DDR3 SDRAM
AURORA  4pair
PWRGOOD/BUSY/BOOT_HOLD
INT/PROTECT
IIC_POWER/IIC_STB
CLK 1pair, SYNC3
RST, etc
4
AURORA  4pair
CLK 1pair, SYNC3
RST, etc
4
FPGA4
IC5001
IMAGE CONTROL
4K --> 5K CONVERSION
LVDS  12pair
+16V_DG1
+16V_DG2
+16V_DP1
+16V_DP2
+16V_DF1
+16V_DF2
LVDS  12pair
LVDS  12pair
LVDS  12pair
CLK
CLK
CLK
1
3
5
7
9
11
DF2
LVDS  4pair (CLK 1pair + DATA 1pair)×2
I2C  1pair,
4
4
DF-P.C.B
DG-P.C.B
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