Panasonic DP-130 / DP-150 Service Manual / Other ▷ View online
14
1.1.8. Modem and Peripheral Circuit (Optional FXB PCB)
This circuit consists of DSP, ROM, S-RAM, Analog Front End, Analog Master and peripheral circuitry.
This modem conforms to ITU-T, V.34, V.33, V.17, V.29, V.27ter, V.21 channel 2 (FSK), T.4, and T.30.
Macro order of DSP is sent from ROM to S-RAM and is outputted. DSP transfers/receives data from
Analog Front End and serial communication. Analog Front End communicates with the line through
Analog Master.
To Line
To Speaker
Analog
Master
Analog
Front
End
DSP
IC901
Modem
CPU
Modem
CPU
IC906
IC904
IC902
IC905
S-RAM
ROM
Modem
Program
Program
System BUS
Modem Circuit Block Diagram
1. Receive Signal Control Circuit
This circuit consists of Operational Amplifier, Analog Master, and its peripheral circuit. On the received
signal from a line transformer (HYBSR), diffraction of signal transmission is attenuated using the
hybrid circuit, and the frequency of signal is limited to a certain band using a second LPF.
The signal is input to the analog front end via the analog SW for switching over between HYSIG and
the gain switching amplifier. 1300-Hz signal and remote signal are detected from HYSIG by switching
SW1.
2. Transmission Signal Control Circuit
This circuit consists of Operational Amplifier, Analog Master, and its peripheral circuit. On the signal
transmission from the analog front end, frequency of the signal is limited to a certain band using a
second LPF, and diffraction of the signal to a reception circuit is attenuated using the hybrid circuit.
The signal is sent out from the line transformer.
15
3.Line Monitor Circuit
The Line Monitor Circuit consists of an operational amplifier, analog master and its peripheral circuits.
Its function is to monitor the dial tone, DTMF tone, response signals, etc. over the speaker. It also
sounds the output of the key touch tones, alarm tones, etc. from the panel CPU over the speaker. The
received signal from the Ain (M) passes through an AGC circuit and is conditioned by the Analog Front-
End DSP and is then input to the Analog SW2 for volume control. The signal is then input to the
Speaker Amplifier, where it is amplified to a level sufficient to drive the speaker. The key touch tones
and Buzzer Signals from the panel are input to the Analog SW2 for volume control and then input to the
Speaker Amplifier. The monitor tone from the phone line and the buzzer tone from the panel can be
adjusted from the Control Panel.
HYSIG
RX signal
TX signal
Hybrid Circuit
Speaker
Amplifier
Electronic Volume
Analog SW2
Buzzer Signal from Panel
AGC
Analog SW1
Gain Switch
Amplifier
Ain(M)
Aout(M)
Aout(V)
Analog Front-End DSP
LPF Fc:4.5KHz
LPF Fc:7.8KHz
HYBSR
Analog Master
IC906
16
1.1.9. Line Control Board
The following shows a block diagram of the Line Control Board.
MODEM
PC2
CML
PLS
Ring
Detector
Line
Telephone
CML
C5
Q2
Off-Hook
Detector
HYBSR
< MDM >
< LCU >
PC1
GND
T2
Q1
PC1
nCTON
PLS
CML
+24V
CMLD 5
PLSD 6
PC2
nHKOFF 9
+5V
+5V
L : Off-Hook
H : On-Hook
H : On-Hook
L : Ring In 10
H : FAX Side
L : Telephone
L : Telephone
CN7
H : Make
L : Break
L : Break
for Auto Receive
IC
[DZYNA1435*]
MODEM
PC1
IC1
CML
RL4
Ring
Detector
Line
CML
C5
HYBSR
< MDM >
< LCE >
AGND
nCTON
RL4
CML
+24V
pCMLD 5
pPLSD 6
nHKOFF 9
+5V
L : Off-Hook
H : On-Hook
H : On-Hook
L : Ring In 10
H : Make
L : Break
L : Break
IC
[DZEP000441]
DC
HOLD
HOLD
H : FAX Side
L : Telephone
L : Telephone
The Ring Detector consists of a photocoupler, PC2 (PC1 for LCE), and its peripheral circuits. The
ringing signal is a half-wave rectifier in the Ring Detector, and transferred through the nCTON signal
line to the IC on the SC PC Board. The IC observes the signal to distinguish from signals caused by
chattering.
The Off-Hook Detector (External Telephone) circuit consists of the photocoupler, PC1 (IC1 for LCE),
and its peripheral circuits. When PC1 detects loop current flow, it emits a Low active output signal
(nHKOF) to the IC which monitors it for a specified time. If the IC detects no change in the Low signal
level, it determines that the External Telephone is Off-Hook.
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Dial Pulse Generator
The circuit consists of the CML relay, PLS relay and their peripheral circuits. This circuit generates
dial pulses. The CPU PC Board controls all dial pulse generation sequences. It turns relay CML and
PLS ON and OFF through the DZZSP58025. The status of the relays during dialing is shown below.
When the absence of the terminating message is confirmed by the Off-Hook detector, the CPU turns
CML relay ON to develop loop status (DC loop). After a few seconds, the CPU turns the PLS relay
On and Off to generate dial pulses, making and breaking the loop.
CML Relay
PLS Relay
Line release
Line status
make
break
Speech
condition
First
digit
Second
digit
Prepause
Inter-digit
pause
make
break
make
break
Speech
condition
Speech
condition
Dial Pulse
DTMF Tone Generator
The circuit is incorporated in the MODEM PC Board. The DTMF tone is conveyed to the telephone
line using the same route as the facsimile signal. The DTMF tone selection is controlled by the CPU.
The relay status during dialing is shown below.
PLS Relay
CML Relay
Line release
Line status
make
break
Speech
condition
First
digit
Second
digit
Prepause
Inter-digit
pause
make
break
make
break
Speech
condition
Speech
condition
DTMF signal
DTMF Tone
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