Panasonic TH-103PF9UK / TH-103PF9EK Service Manual ▷ View online
13.17. DS-Board (2 of 2) Block Diagram
PC_RXD
TXD11
SLO
T_TXD
IIC_SW
DAC1
IIC_CONT
TXD12
SLO
T_RXD
KEY_SW
REMO
TE_OUT
LED_G
P_ST
A
TUS
SLOT1_DET
LED_R
VD_2
REMOCON
KEY_DET
DAC0
REMOCON
L_4
SDA3
DPMS_HD
VD_3
SCL3
HD_4
DPMS_VD
VD_1
STB_ON
SOS_ALL
HD_2
HD_3
SD
A1
SCL3
LED_R
LED_G
TXD13
R_4
HD_1
VD_4
RXD11
IIC_SW
SLOT2_DET
RXD12
SD
A3
RXD13
PB_M
PC_TXD
SCL1
Y_M
KEY_DET
SLOT3_DET
PR_M
LAN15V
SLOT9V
STB3.3V
SLOT3.3V
STBY5V_S
9V_2
STB5V
STB5V_S
STB5V_S
SLOT9V
LAN15V
STB3.3V
5V_M
STB5V_S
STBY5V_S
+15V
12V
SLO
T3.3V
SLOT9V
STB5V_S
LAN15V
5V_M
P5V
STB5V_S
SLOT5V
STB5V_S
9V_2
STBY5V_S
9V_2
STB3.3V
9V_2
SLO
T5V
SLOT3.3V
STB5V_S
5V
9V_2
STB5V_S
SLO
T9V
LAN15V
9V_2
STB3.3V
5V_M
P5V
SLOT5V
5V_M
TXG-
5
SCL3
A19
Y_2
B31
IC3152
B_EB+
6
VD_M
TX3-
B5
8
A40
OUT1
Q8181
27
PB/B
A12
Green
B3
SLO
T3.3V
3.3V<=>5V
Q8010,Q8011
SLO
T3_DET
PB_1
3
10
AUDIO IN L
B30
TX9+
A12
KEY_SW
A22
RESET
IIC_CLOCK
Q8182
2
TXG-
TX8-
RXD
RXD
B23
DS-BOARD SOS
LED BLINKING
:10TIMES
LED BLINKING
:10TIMES
TO DN6
RXD_11
S2_3
LED_G
LEVEL SHIFT
13
G/Y_M
B14
B28
HD_4
B_EA+
HD
A2
TXD
SRQ
TXD_PC
TXD4
TX3G
STB5V
8bit DAC(CS(M))
SYNC SWITCH
TX0-
TXD
INVERTER
TX4+
15
SDA_S1
3
SLO
T2_DET
STB_ON
TX7-
B25
B_OE-
AUDIO SELECT
3
SRQ
1
SD
A_S3
TX7+
KEY_DET
PLUG DET
4
TX4-
IIC_DATA
TX8+
30
5
B3
SDA_S2
A38
TXC+
AUDIO IN R
IC3007
TX4+
IC8003
A4
B21
SCL_S1
1
TXD13
1
LAN15V(F_STBY)
SLO
T5V
TX3G
RESET
9
A_EB+
2
SCL
42
Y/G
S2 DETECT
SDA_S1
A22
A_EA+
TX6+
TX0-
B12
VD_4
L
SRQ
IC3002
Y_1
S2 DETECT
15
B24
IC8009
TX2G
TX0+
B10
HD_M
29
2
IC8014
TXG+
Q8183
4
R_2
B_OD-
A13
TX0+
5
DS
DS3
SCL_S3
6
TX0G
IIC_SD
A
2
H
2
TX8+
26
TX0-
LAN+15V
OUTPUT PORT
B27
REMOCON
A28
IC3006
24
RESET
3
8bit DAC(FAN CONT)
66
A38
A11
SLOT1
3
SRQ
18
A_OE-
3.3V<=>5V
5
ETX_G3
TX4+
B12
B19
SLO
T3.3V
SLOT5V
26
16
B_EC-
Yout1
STB5V
TX1+
A10
4
3
A36
27
LEVEL SHIFT
REMO
TE
8bit ADC(SYNC INH(M))
REMO
TE OUT
A40
TX6-
1
12
B17
3
1
Q8002
B15
10
B_OA+
CABLE DET
2
65
IIC_D
A
T
A
SCL_S3
B/PB_M
A_OD+
4
LEVEL SHIFT
SLO
T3.3V
TX8-
SLOT9V
S2DETECT
24
OUTPUT PORT(SW0)
57
PR_2
A1
L
A_OC+
PRout1
REMOCON
_OUT
B35
REMOTE OUT
A34
B_EA-
TX0+
S2_3
6
27
16
9
8bit DAC3
PB_3
B11
S0
6
62
B24
SOS OUT
1
39
6
1
TXG+
TX0G
A5
B25
TXC+
TXD
SCL_S2
13
SLOT3.3V
1
17
6
Q8017
16
RXD4
TX0-
DS6
B8
38
PR_1
B40
Q8016
B
SDA3
TO V15
21
78
SD
A1
14
5V
SCL3
B13
SOS
SOS
SLO
T5V
HD/Green
MAIN
PR_4
B31
RESET
A9
SW0
L_2
SCL3
1
A_CLK-
A40
A_ED+
KEY_SW
HD SWITCH
23
L
TXC-
SLOT9V
A_EC+
18
CS(M)
8
IIC ON/OFF
TXC+
Y_1
2
SEPA
8
LAN+15V
COMPONENT SELECT
H
IC8001
B32
15
15
FAN_CONT
7
L
TX5-
A7
RTC INT
IIC CONT.
TO V3
6
S2_2
A
33
72
LED_R
A
TXG-
18
A1
TX5-
R
EXT_G2
STB3.3V
PLUG DET
Q8012,Q8013
A_OC-
10
TX0+
TX7-
TX1G
1
1
CS(M)
SCL3
VD
4
S2_1
Q8019
4
5
TXC-
PB_1
TO DN3
SOS_ALL
A14
B21
DPMS_HD
S_CLOCK3
A34
TO P10
STB3.3V
PR_4
53
7
PR/R
TO PB30
SLOT1
21
HD_HX
DS2
RXD_12
H
5V_M
A_EE+
A36
Y/G
7
A34
A_OB-
PBout1
B30
12
SD
A3
8
69
5V
OUT2
1
A36
B_OD+
TX2G
TXG-
10
B19
6
TX5+
TX6-
SYNC_INH
B_CLK-
A15
TXG+
B5
38
TX8+
IIC_CONT
SDA
SLOT1_DET
17
VD
TXC-
TX9-
A3
B14
TXD_11
B_ED-
A_CLK+
SDA3
B7
SDA3
15V
PB/B
60
TX9+
SCL3
LAN+15V
PO
WER
_
S
TAT
A22
A_OE+
IC3004
TXCG
6
A_EA-
STB5V
SLO
T5V
SLOT3
DPMS_VD
H
L
VCC
SYNC_INH
TX9-
B25
8
B_OC+
15
B24
VD
A28
37
A30
OUTPUT PORT
42
A21
9V
46
A32
38
IIC_D
A
T
A
56
16
B23
PR/R
B36
TX1+
59
A26
HD_1
A9
REMOTE
TIME CLOCK
PBout2
A26
F
AN_SOS
51
H Sync
TX7-
VD_1
B_CLK+
B1
29
TX5+
32
A2
B21
PR_M
19
3
SDA
2
68
B_OB+
ETX_G1
30
TX8-
IC3001
TX6+
S2_1
TX1-
IC3005
SCL3
OUTPUT PORT
SLO
T3.3V
TX8+
5V
B17
A_EB-
40
PR_1
IC3150
A30
TX1-
B_OA-
50
Q8018
DA
C
2
R
TO HX1
SRQ
IC8181
8bit DAC4
14
TX4-
TX3+
RXD1
SERIAL SELECT
RXD_TV
PB_M
IC8016
31
REMOTE
11
TX4+
AUDIO L
33
3.3V<=>5V
34
SCL3
B
SCL3
FAN
Y_M
OUTPUT PORT(SW2)
36
B9
10
3
REMO
TE
14
B7
B_OE+
B2
B9
20
OUTPUT PORT
8
S_DATA3
SOUND
_MUTE
SLO
T9V
Yout2
L
TX9-
TX4-
POWER_STATUS
RESET
B_OB-
SDA3
HD
Q8200-Q8202
34
A8
A19
10
FAN_SOS
SYNC SELECT
TX7+
32
TX6+
CONT.
SDA3
B4
16
2
8
PR_3
7
5V
13
SCL3
48
TX9+
12
SW0
A_EE-
SW1
TX3-
REMOCON
14
DPMS_VD
HD
TX5+
RXD
2
5
DS1
TX7-
SLOT3.3V
TX5-
17
L
12
B26
3
12
SDA3
SYNC SIGNAL
TXG+
SLOT1_DET
21
B23
AUDIO R
L
2
SLOT2
PR_2
A8
LEVEL SHIFT
TX6+
48
TX6-
HD
DS13
A_OB+
HD_M
B8
B10
3
15
VD
TX1+
A_ED-
A21
A_OA+
A11
PB/B
SCL3
TX3-
B35
75
47
13
SDA3
17
71
B_OC-
PB_2
PB_4
63
TXD_TV
SLOT3
SLO
T9V
B26
B40
A4
SLOT3
RESET
TX1-
OUTPUT PORT(SW1)
A7
IC3151
74
15
TXD
A6
3.3V<=>5V
TX6-
41
3
14
PC SYNC INVERTER
ETX_G3
2
13
B_EE-
13
54
B11
TXD1
REMO
TE
DA
C
1
SLO
T9V
A_EC-
TXD_12
13
22
10
R_4
SRQ
B26
6
8
TX7+
B27
A
UDIO IN R
Y_4
VD
3.3V<=>5V
DPMS_HD
11
A_OA-
STB_ON
SLOT2
6
SOS
S1
R1
77
23
L
Y/G
20
R2
B31
5
19
2
RESET
A26
TX1G
14
13
30
5
RXD_PC
TX5-
9
B27
VD
IIC
14
KEY_SW
Q3001
PLUG DET
B36
SLO
T5V
CONT.
B36
A19
Y_2
B_EE+
SCL1
B40
A3
A17
35
B19
36
3.3V<=>5V
B1
A6
A17
4
VCC
LAN+15V
A15
EXT_G2
HD_2
S2_2
R3
B17
SOS
CS(M)
L3
A38
16
PROCESSOR
ETX_G1
A28
PB_3
DS
1
SOUND MUTE
B2
B29
15
B28
ASPECT DET
8
L_4
23
22
4
L
15
7
B6
9
5
PR_3
2
B4
L1
4
Y_4
8bit DAC1
LEVEL SHIFT
B13
L2
1
TX3+
9
5
TXC+
TX4-
A
UDIO IN L
TX9+
DS
44
SDA3
TX3+
HD_3
SDA_S3
VD_2
IIC_CLOCK
TO DN1
PR/R
LED_G
LAN15V(F_STBY)
A10
RS232C
IIC_SCL
VD_HX
SCL
Y/G
SW1
4
TXC-
A_OD-
A21
SUB
SLO
T9V
AC_CS(M)
SOS
TX8-
B15
SLOT2
SOS
4
Q8184
R_1
PRout2
TX3-
4
DS11
V Sync
10
OPT
8bit DAC0
30
1
IC8007
3
DS
RXD
SYNC SIGNAL
LED_R
B_ED+
A32
TX3+
A13
1
A5
SCL_S1
11
LAN+15V
R_3
B28
DS12
LEVEL SHIFT
SEPA
TX1+
DRIVER
S0/S1
B6
TX5+
12
L_1
VD_M
A17
3.3V<=>5V
R
TC_INT
OUTPUT PORT(SW3)
36
A
UDIO IN R
RXD13
TXCG
A32
EX.I/O(IIC SW)
P_STATUS
Y_3
IC8005
TX7+
VCC
16
L_3
IC3003
RESET
IIC
B35
PB_4
A14
X8181
B30
B_EB-
STB5V
PB_2
PR/R
16
EX.I/O(SLOT DET IIC CONTROL)
IIC_CLOCK
8bit DAC(LPF(M))
HD
TX9-
PB/B
TX1-
SOS
REMO
TE
VD_3
EX I/O(VIDEO/AUDIO SELECT)
SDA3
19
SLOT1
LEVEL SHIFT
A
UDIO IN L
A30
B_EC+
LAN+15V
HD
SLOT5V
7
R/PR_M
HD in
Y_3
!
SLOT INTERFACE
DS
SOUND PROCESSOR
(Exchange board only)
SYNC PROCESSOR
<TNPA4217>
<TSXL584>
CABLE
CABLE
<TSXL585>
(P-BOARD SC SIDE)
TO V1
TH-103PF9UK/EK
DS-Board (2 of 2) Block Diagram
TH-103PF9UK/EK
DS-Board (2 of 2) Block Diagram
TH-103PF9UK / TH-103PF9EK
93
13.18. DN-Board (1 of 3) Block Diagram
3V_SDA1
OSD-HDIN
RXD
VD
OSD-HDO
NRST
3V_SDA1
3V_SCL3
P3V_SDA2
IIC_CONT
PSTB
FAN_SOS
PDB0
3V_SCL1
LED_R
PLLH
5VRXD_TU
SCL1
P3V_SCL2
RXD_PC
P3V_SD
A2
P3V_SCL2
KEY_INPUT
3V_SCL3
CLP
VD-M
PLLV
IIC_INT
5VTXD_TU
DPMS_HD
P3V_SD
A2
LED_R
PSTB
3V_SCL1
PDB1
IIC_CONT
3VTXD_TU
5VRXD_TU
OSD-CLKIN
PB
USY
SOUND_MUTE
3V_SCL1
NRST
SD
A2
PANEL_STBY_ON
STB_ON
RXD_PC
IIC_INT
3VRXD_TU
DPMS_VD
TXD_PC
DISPEN
POWER_STATUS
UART_SW
3V_SCL3
IIC_CONT
STB_ON
TXD_PC
REMOCON_OUT
3V_SCL1
NRST
RXD_PC
DPMS_HD
3V_SD
A1
REMOCON
TXD_PC
3V_SCL3
UART_SW
3V_SDA3
REMOCON
REMOCON_OUT
HD
LED_G
CABLE_DET
SCL1
LED_G
IIC_INT
5VTXD_TU
3V_SDA1
P3V_SCL2
SD
A1
PDB1
TXD_PC
IIC_CONT
OSD_YS
IIC_INT
KEY_INPUT
PB
USY
RXD_PC
ALARM
LED_G
PSLCT
OSD0-15
IIC_CONT
CABLE_DET
LED_R
3V_SDA3
AC_GOOD
TXD
OSD_YM
SD
A1
SOUND_MUTE
SD
A2
DPMS_VD
P3V_SDA2
PDB0
FAN_SOS
3V_SD
A3
RTC_INT
IIC_CONT
3V_SCL1
3V_SDA1
SCL2
P3V_SDA2
P3V_SCL2
RXD_PC
LED_R
SCL2
RTC_INT
LED_G
PBLCT
P3V_SD
A2
IIC_CONT
READY
IIC_INT
TXD_PC
SCL1
ALLOFF
3V_SDA3
HD-M
SDA1
POWER_STATUS
P3V_SCL2
REMOCON
P3V_SCL2
OSD-VDO
+3.3V
STB+5V
STB+3.3V
+3.3V
P+5V
+1.5V
STB+5V
2.5V
Q4710
STB+5V
Q4709
D4708
P+15V
STB+3.3V
P+15V
STB+3.3V
P5V
2.5V
P+15V
D4712
D4713
STB3.3V
+3.3V
P+5V
5V_M
STB+3.3V
STB+1.5V
STB+5V
STB+3.3V
D4710
+3.3V
STB+3.3V
Q4706
+1.5V
STB+3.3V
STB3.3V
STB5V
+1.8V
Q4707
+2.5V
+3.3V
STB+3.3V
+3.3V
STB+5V
+3.3V
IC4703
43
22
8
CLP
HD-M
57
A_OE+
119
SOUND_MUTE
1
55
EA- - EE-
B
IIC_BUS
+3.3V SOS
2
B_CLK+
RXD
LVDS
A_EC-
Q4716
BE0-9(10bit)
NRST
10
OA+ - OE+
7
B_OB+
PARALLEL
6
28
30
G9
46
B_EA-
Q5401,
Q5402
Q5402
122
TO DS6
FPGA_DCLK
B_EC-
7
37
FPGA_DCLK
1
STB3.3V
DN6
CLP
SDA1
121
5
REMOCON OUT
9
IC5002
2
3
CLK+
B_OC-
DATA
8BIT
VCC
WE
8
TTL
IC5406
B_EE+
IIC_BUS
OE
2
SD
A2
101
ECO ON
A_EB+
25
9
92
STB5V
IIC_CLK2
35
A_OD+
4
21
21
157
A_EA0-6,A_EB0-6
SOS BLINKING TIMES
PBLCT
FOR
29
DN4
RXD_PC
CE2
25
A_EC0-6,A_ED0-6
B_OE0-6
18
10
A_CLK+
5V
B_EA0-6,B_EB0-6
3
RXD_TU
A_EB-
36
61
10
15
SD
A3
IIC_CLK1
69
4
A_OB+
5
READ
Y
23
40
P+3.3V SOS
B_OB-
FAN SOS
+3.3V SOS:LED 3TIMES
27
5
5V<-3.3V
A_OD-
STB_ON
SOUND MUTE
P15V
[ODD]
LEVEL CONVERTER
8
HDA,VDA
BOUTO0-9
SCL3
132
1
34
10
HD,VD
SDA0B
SCL1
5
SD
A2
B_OD-
A/D
IIC_INT
SDA1
HSYNC
Voltage
1
DPMS_VD
IC5101
B_OC+
LVDS ODD
A/D CONVERTER(MAIN)
[B]
27
21
CLP
LVDS PWDN/EN
G
B_OA+
PLLH,PLLV
6
4
B_EA+
14
18
LVDS PWDN/EN
NRST
SBO0
Pr/R IN
PDB0
IIC_CONT
STB_ON
B_ED-
R
5
EA+ - EE+
9
19
CLK1/CLK_M
LED_R
MICOM
TXD_PC
32
13
12
EVEN
CABEL_DET
7
DPMS_HD
42
4
45
FIELD_OUT
VDO_O
B_OD+
B_OE+
VCC
34
X2CLK_OUT
4
CLKOUT_O
11
104
43
ALARM
A_EE-
IIC_CONT
G05
VIDEO BUFFER
87
57
HDO_O
+1.8V SOS
6
52
R04
ROUTO0-9
43
ALARM
11
115
20
POWER STATUS
VSYNC
SD
A
SCL1
2
24
Y/G IN
RESET
R00
SCL
RTC_INT
STB5V
1
R9
2
25
CLAMP
Q4713,Q4712
11
Low
LVA_CLK
33
VCC
A0
DQ1-DQ15
EA+ - EE+
9
Voltage
Differential
Differential
LVA-PWDN,OEN,EEN
LVDS CLK
P+15V SOS
DISPEN
D0
HD-M/VD-M
WE,CE,OE
42
6
12
[A]
6
RECEIVER
LVDS ODD
Low
B_OE-
Y
5V<-3.3V
Differential
120
B_ED+
49
+2.5V SOS
MCD
A
T
A
RECEIVER
41
IIC_BUS
Q4714
A0-A18,CE,OE,WE,CE2
1
A_ED+
16
MCCLK
LVDS RX
4
HDO,VDO,CLKO
CONFIGURATION
HDO_E
TXD_TU
12
1
DRV_MUTE
IIC_BUS
FPGA_NCONFIG
ROUTE0-9
B_EC+
LED_G
IIC_D
A
T
A
2
LVDS CLK
16
READY
Q4702
161
B_CLK-
LVDS EVEN
WC
8
SD
A
SDA
IC4707
SDA0A
CBCLK_A
27
65
SCL1
ODD
61
DPMS_HD
A_ED-
OSDKXI
38
8
EVEN
RXD
139
SCL0B
B_EE-
168
5
8
P+5V SOS
IIC_D
A
T
A
1
PDB0
19
A_CLK-
LED_R
SDA
4
REMOCON INH
[EVEN]
70
63
SCL
GOUTO0-9
ALL_OFF
3
A_EA-
8M FLASH MEMORY
VOUT
AC_GOOD
22
HD_ADD,VD_ADD
7
21
B_EE0-6
P15V
HDA,VDA
A_OC-
IC5402
B_OA0-6,B_OB0-6
CBCLK_B
NRST
2
X2CBCLK_A
11
IC4701
28
Pb/B IN
26
Q4704
DN2
P+5V SOS:LED 5TIMES
PB
USY
VDD
PSLCT
2
RXD_TU
B0
21
73
FAN_SOS
B
IIC_BUS
CLK-
SCL3
4
B_EC0-6,B_ED0-6
6
TTL
TV_ON/OFF
SDA2
B9
B_OC0-6,B_OD0-6
IIC_BUS
51
SCL2
FLASH_DATA_DIR
Q4719
15
SCL2
AVR 1.8VPLLVDD
IC4705
IC4704
IIC/INT
EEPROM_WP
FPGA_CONFDONE
131
63
14
54
B
6
R0
2
84
24
TXD
5V<-3.3V
18
Q4711
TXD_PC
RMIN
LEVEL CONVERTER
RO0-9
23
RESET
IIC_BUS
G00
HDE,VDE,CLKE
7
LED_R
33
OR GATE
B00
6
RXD_PC
38
PDB1
PB
USY
LED_G
X2CBCLK_B
KEY_INPUT
IIC_CONT
P
ANEL_STBY_ON
P+15V SOS
12
GE0-9
Q4715
KEY_INPUT
RGB OUT(ODD/EVEN)
19
SCL1
BE0-9
68
FPGA_DATA0
SDA3
DATACK
33
97
+1.5V SOS
FPGA_NSTATUS
1
MCDATA
171
8
NRST
MCCLK
14
NRST
-FP
REMOCON
IC5401
RXD
IIC_CONT
YMOUT
169
17
42
170
OA- - OE-
90
OSD
2
VCC
DATA
B04
A
[A]
DN
11
11
STBY3.3V
16
OA- - OE-
134
CLKOUT_E
D15
16
VDO_E
129
2
DN3
7
1
HD-A/VD-A
23
39
5V->3.3V
G0
Signaling
TO DS1
5V->3.3V
REMOCON OUT
SERIAL SWICTH
VDD
ODD
12
VD-M
REMOCON
28
MCLD
VCC
LEVEL CONVERTER
G/Y-M
14
SCL
Q4701
SCL2
A_OB-
ADC
DN1
PDB1
6
LVB_CLK
A_EC+
A0-A18
LVB-PWDN,OEN,EEN
162
RTC INT
FOR
FACTORY
USE
FACTORY
USE
CE
36
64
FLD
2
58
18
44
MCLD
4
4
D0-D15
STB3.3V
POWER STATUS
ICHIPS_RST
ALLOFF
10
A_OA+
95
IC4711
39
166
VCLKOUTA
TO D3
37
26
10
69
CLK-
CLKM_20MHz
94
5
30
56
PSTB
31
CABEL_DET
PARALLEL
OSD_72MHz
76
VDD
15
VSYNC
Q4703
4
26
31
46
DPMS_VD
IC4702
NRST_FP
B_EB-
89
RESET
34
VSYNC
A_EE+
FPGA1
86
B
9
MICOM
COMMU
COMMU
IIC_INT
51
A_OA0-6,A_OB0-6
Q4705
48
SCL
HSYNC
A_OC0-6,A_OD0-6
TXD
IC4708
A_OE-
IIC
CONT
CONT
LVDS EVEN
BO0-9
YSOUT
A_OE0-6
B_OA-
118
OUT
165
71
CLK
BUFFER
BUFFER
HDI,VDI
GO0-9
19
A_EE0-6
SYNC
SEPA
SEPA
SD
A1
60
SD
A1
30
67
61
NRST
45
LED_G
88
LVDS INPUT
CLK+
22
IIC_CONT
162
LVDS INPUT
[3]
AVR 1.8VAVDD
3
TO DS3
6
FACTORY USE
IC5405
13
66
22
TXD_TU
IC5001
13
SCL0A
PSTB
A_OA-
STB5V
LVDS RX
8
GOUTE0-9
140
P_ON/OFF
R/PR-M
BOUTE0-9
IIC_INT/BOO
T
11
110M
LVDS_PD
R
UART_SW
A
EA- - EE-
17
130
96
GE0-9(10bit)
54
A18
OA+ - OE+
A_EA+
70
109
HOUTA
CLK2X_E
79
Signaling
VCC
G
110
RE0-9
B_EB+
RESETN
OUT
P+15V SOS:LED 2TIMES
LVDS
RE0-9(10bit)
25
IC5403,IC5404
Y
TXD
A_OC+
48
4
57
HSYNC
STBY5V
EEPROM
29
158
27
B/PB-M
82
7
54
37
DN
DIGITAL SIGNAL PROCESSOR/MICOM
(Exchange board only)
!
<TZTNP01YLTU>
<TSXL584>
CABLE
<TSXL585>
CABLE
TH-103PF9UK/EK
DN-Board (1 of 3) Block Diagram
TH-103PF9UK/EK
DN-Board (1 of 3) Block Diagram
TH-103PF9UK / TH-103PF9EK
94
13.19. DN-Board (2 of 3) Block Diagram
P3V_SCL2
P3V_SCL2
P3V_SDA2
P3V_SDA2
P3V_SCL3
P3V_SDA3
P3V_SD
A2
P3V_SCL2
STB+3.3V
+3.3V
+1.5V
+2.5V
+3.3V
+1.5V
+3.3V
STB+3.3V
+3.3V
+3.3V
+3.3V
+3.3V
+2.5V
+3.3V
+3.3V
MCCLK
PORT1_HS,_VS,_CLK
8
PORT1_ROUT0-9
2
[ODD]
A0-A18
26
BUFFER
2
XT
BO0-9
1
FPGA3 OUTPUT
RO0-9
SD RAM2 DATA
XTN
GO0-9
20
DDR-SDRAM I/F
HDO,VDO,CLKO
4
DQ0-DQ31
PORT1_GOUT0-9
6
PORT1_BOUT0-9
FPGA_DATA0
7
ADDR0-11
5
FPGA_NSTATUS
CPLD(FPGA ROM)
FLD
DQ1-DQ31
(90MHz)
LCLK1
FPGA_NCONFIG
CLK2X_E
OSD_72MHz
SDAT
PORT2_ROUTE0-9
ICHIPS-RST
7
RE0-9
PORT2_GOUTE0-9
(30bit)
HDE,VDE,CLKE-57
RVIA0-9
FLASH
(30bit)
BUIA0-9
DATA0-15
DEV-OE
POCLK
FLASH
MCLK
LSI57Plus
GOUT0-9
RGB OUT
IC4906
RV,GY,BU
BOUT0-9
SD-RAM
VCC
IC4501
XIN
X2CBCLK_A
SD-RAM1 DATA
1
SO
1
LCLK2
FPGA_BINE0-9
SI
8
FPGA_RINE0-9
PI1CLK
FPGA_GINE0-9
WE,CE,OE
PI1FLD,PI1ACTB
FPGA_HDE,VDE,CLKE
REFCK
CONFIG-OE
CLKM_20MHz
OCKREF
ADDR0-18
CLK7425
P1_Y/G0-9
NWE,NCE,NOE
P1_PR/R0-9
LSI57-HP,-VP,-CLK
8M FLASH MEMORY
IIC_BUS
IC4902
CLK3
14
57_R0-9
DQ1-DQ15
(39.5MHz)
RESET
CLK4
57_B0-9
WE,CE,OE
LSI57_GIN0-9
VCC
IC5103
BE0-9
LSI57 INPUT
12
8
GE0-9
CLK6
NRST
OE1
TDO
D0,D5-D7,D12-D15
X5701
TDI
PORT1_FLD,_ACT
SD_RAM2
ADDR0-11
PORT2_BOUTE0-9
VCC
IC5503
DQ1-DQ31
VDD
LCLK2
P1_FLD,_ACT
WE,CAS,RAS
32M DDR SDRAM
CBCLK_A
RVIB0-9
P2_Y/GO0-9
FPGA2
(4.25MHz)
1
BUIB0-9
IC5201
CLK7
FPGA-TMS
XIN
SCLKB
VCC
7
FPGA-TCK
RSTB
I-CHIPS PORT1 OUTPUT
CPG
4
IC5701
RGB IN PORT2
POHSB,POVSB
8
(60bit)
RESET
POFLD,POAVTB
IIC_BUS
7
IIC_CLK
CLKM_20MHz
NRST-FP
(74.25MHz)
OSD_72MHz
ADDRESS
9
BUFFER
POD_0-POD_59
BUFFER
FPGA_FLD
(72MHz)
CLK2X_E
13
FPGA_DCLK
SCLK
P2_PR/RE0-9
FPGA_DCLK
1
6
VCC
RGB IN PORT1
P1_PB/B0-9
5
IC4908
P1_HS,_VS,_CLK
3
CLOCK BUFFER
PI2HSB,PI2VSB,
CLK5
IC5103
PI2CLK
OCK_90MHz
10
24
11
CLK INPUT
23
IC4904
9
CPU I/F
22
FPGA-TDI
FPGA_DCLK
GCLK2
FPGA_DCLK
IC4302
FACTORY USE
GYIB0-9
2
DHB,DVB,
DCKB
DCKB
(FPGA ROM WRITER)
I-CHIPS PORT2 OUTPUT
(30bit)
PORT2_GOUTO0-9
FPGA_DATA0
I-CHIPS
FPGA_NSTATUS
GYIA0-9
BUFFER
IIC_SDA
DHA,DVA,
DCKA
DCKA
(30bit)
BUFFER
IIC_SCL
[EVEN]
[EVEN]
FPGA_BINO0-9
PO_HS,_VS
VDD
[ODD]
GND
[ODD]
FPGA_RINO0-9
PO_RO0-9,PO_GO0-9,PO_BO0-9
8
IC4903
3
SD_RAM1
PORT2_BOUTO0-9
DN
10
10
VCC
WE,CAS,RAS
PORT2_ROUTO0-9
SCLK
FOR
IIC_BUS
NRST
DIR
OE1
REFCK_39.5MHz
IC4907
SCKREF
PO_CLK
OE1
FPGA-TDO
MCKREF
CLK2
VCC
X2CBCLK_B
5
OCK-90MHz
(40MHz)
VCC
FPGA_GINO0-9
5
FPGA1 INPUT
DIR
FPGA_HDO,VDO,CLKO
VCC
A0-A2,A16,A19,CE2,OE
IC5502
REFCK39.5MHz
A3-A7,A17,A18WE
CLK7425-1
PI1DO_0-PI1D_29
IC5501
VCC
PI1HSB,PI1VSB,
INTERFACE
21
IC4905
25
27
RESET
1
FPGA_CONFDONE
NRST
FPGA_CONFDONE
VOUT
[EVEN]
IIC_SDA
VDD
IIC_SCL
CONFIGURATION
TMS
FPGA_NCONFIG
P2_PR/RO0-9
TCK
PI2DO_0-PI2D_29
6
P2_FLD,_ACT
HP,VP,OCKO
PI2FLD,PI2ACTB
CLOCK BUFFER
ROUT0-9
LSI57_RIN0-9
OSD_CLKO
P2_HS,_VS,_CLK
P2_PB/BE0-9
LSI57_BIN0-9
PORT2_FLD,_ACT
OSD_CLKI
ADRS0-ADRS11
P2_PB/BO0-9
P2_Y/GE0-9
PORT2_HS,_VS,_CLK
CBCLK_B
PO_FLD,_ACT
I2CSDA
IC4502
CLK1
LCLK1
PO_RE0-9,PO_GE0-9,PO_BE0-9
I2CSCL
57_G0-9
(2088MHz)
(60bit)
57_HD,57_VD,57_CLK
SDAT
MCDATA-0
D1-D4,D8-D11
D1-D15
IIC_BUS
ICHIPS-SI
A8-A15
A0-A18
DN DIGITAL SIGNAL PROCESSOR/MICOM
(Exchange board only)
!
<TZTNP01YLTU>
TH-103PF9UK/EK
DN-Board (2 of 3) Block Diagram
TH-103PF9UK/EK
DN-Board (2 of 3) Block Diagram
TH-103PF9UK / TH-103PF9EK
95
13.20. DN-Board (3 of 3) Block Diagram
P3V_SCL2
P3V_SDA2
P3V_SD
A2
P3V_SCL2
STB+5V
+1.2V
+3.3V
P5V_DC2
P+15V
+2.5V
STB+5V
STB+1.5V
P5V_DC
+3.3V
+1.2V
Q4718
P5V_DC1
Q4717
+1.8V
+3.3V
STB+3.3V
18
TB+
59
O-LVDS1
TTL
20
G1
O+LVDS0
VO
E-LVDS3
O-LVDS0
TC-
VOUT
TCLK+
VDD
IC4309
9
22
OUT2
E+LVDS0
17
VO
21
G2
D2
33
L
VDS
O+LVDS4
E-LVDS4
16
NRST
O-LVDS4
4
GOE0-9
26
21
31
(SERIAL)
31
22
19
GC_CLKIN
13
31
GC_HSIN
D2
GC_VSIN
8
13
52
6
OUT1
VOUT
19
57
D2
14
STB 3.3V
E+LVDS4
1
TA-
VOUT
CTL
12
38
DC-DC CONVERTER
E-LVDS0
38
5
P
ARALLEL
25
CLK7425
S1
54
VOUT
NRST
-FP
FB
TCLK-
IC4004
L
VDS-PD
VIN
40
FHQCKIN
33
S1
VCOIN
61
16
29
TC-
+1.8V
16
OUT2
9
ROE0-9
+2.5V
Q4306
30
FHQCIN0-9
[EVEN]
D1
P+15V
5
L
VDS
PO_FLD
9
62
9
VCC
P+15V
PO_RE0-9
-INC
46
VIN
[ODD]
D1
S2
CB
44
5
D
ATA
TD-
TB-
TE-
AVR 5V
Q4303
VDD
DN
51
51
D1
24
19
4
O-LVDS2
O+LVDS3
HSYNC
28
D1
IC4303
LVDS OUT[ODD]
5
CLKIN
24
P+15V
LVDS OUT[EVEN]
VCC
D2
CTL
21
42
4
63
E+LVDS3
VCC
E-LVDS2
11
23
19
CTL
23
LX
LVDS
TRANSMITTER
(10bit)
TRANSMITTER
(10bit)
23
5
48
64
18
30
IC4304
-INC
22
IIC_BUS
59
CLKM_20MHz
1.2V REG
62
10Bit LVDS
ROUT
CLK7425-1
VIN
VDD
TC4
VSYNC
LX
50
TE+
CLK_O
G2
VOUT
48
55
S1
21
9
CTL
P
ARALLEL
8
VDD
15
OUT2
27
G1
1
-INC
P_ON/OFF
GC5 PROCESOR
GC_HD
FPGA_NCONFIG
21
26
18
28
FHQYIN0-9
IC4001
GC_CLK
FPGA_DCLK
IC4307
IIC_BUS
20
8
GC_RGB IN
FPGA_DCLK
D
ATA
44
55
21
19
HSYNC
25
SCL
20
O+LVDS2
24
/PDWN
D1
VDD
GOUT
AVR 5V
CLK_O
CONFIGURATION
D1
5
BOUT
+1.5V
VSYNC
1
GC_GIN0-9
VO
LVDS
TRANSMITTER
(10bit)
TRANSMITTER
(10bit)
GC_RIN0-9
VIN
ROUT
18
OUT1
VSOE
GC_BIN0-9
PORT-FHQ
54
BOUT
IC4305
DC-DC CONVERTER
CLKOE
PO_GO0-9
(GC3E & HQ1)
GOUT
24
PO_BO0-9
20
4
PO_R
O0-9
50
24
17
21
18
IC5802
9
1
16
5
10Bit LVDS
G1
52
IC4306
D2
Q4301
PO_VS
E+LVDSCLK
PORT-E
/PDWN
TD-
[EVEN]
20
11
6
PO_HS
RGB 30bit OUT
PO_GE0-9
PO_A
CT
E-LVDS1
TA-
PO_BE0-9
TC5
D2
BOE0-9
1
5
TC+
G2
E-LVDSCLK
HSOE
IC4308
CLK3
FB
13
OUT2
NRST
LX
23
STB 1.5V
TE-
VDD
20
SD
A
DC-DC CONVERTER
24
TB-
GC_YO0-9
46
20
S2
VO
GC_CO0-9
FHQHIN
13
FPGA_DATA0
GC_VD
23
23
-INC
FHQVIN
OUT1
IC5801
TO D5
FPGA_NSTATUS
6
FPGA_CONFDONE
D1
TC5
S2
19
TB+
24
63
13
OSD IN
57
+3.3V
O-LVDS3
G1
D1
OSD_HDO
O+LVDS1
P+15V
OSD_VDO
CLKIN
15V->2.5V
VDD
[ODD]
G2
29
11
O+LVDSCLK
13
TC+
1
15V->1.8V
64
I-CHIPS RGB IN
17
IC5301
1
S1
15V->1.5V
FPGA3
TA+
29
17
23
TD+
25
5
17
23
TCLK-
CB
24
15V->3.3V
CB
10
TD+
DC-DC CONVERTER
S2
CLK1
OSD-HD
21
CLK0
7
TE+
+1.5V
OSD_DATA0-15
42
E+LVDS1
TTL
TA+
PO_CLK
12
30
+2.5V
CB
GC_YC OUT
OUT1
VIN
5
+3.3V
2
61
5
9
TC4
FB
18
IC4301
VCC
D2
40
12
LX
D2
18
VIN
Q4302
(SERIAL)
OSD_YS
25
OSD_YM
FB
28
TCLK+
O-LVDSCLK
E+LVDS2
OSD_CLK
DIGITAL SIGNAL PROCESSOR/MICOM
!
DN
(Exchange board only)
<TZTNP01YLTU>
TH-103PF9UK/EK
DN-Board (3 of 3) Block Diagram
TH-103PF9UK/EK
DN-Board (3 of 3) Block Diagram
TH-103PF9UK / TH-103PF9EK
96
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