DOWNLOAD Panasonic CF-Y2 Service Manual ↓ Size: 6 MB | Pages: 85 in PDF or view online for FREE

Model
CF-Y2
Pages
85
Size
6 MB
Type
PDF
Document
Service Manual
Brand
Device
PC / PERSONAL COMPUTER
File
cf-y2.pdf
Date
PREV: Panasonic CF-WHD2710 Service Manual

Panasonic CF-Y2 Service Manual ▷ View online

5
1
A
B
C
D
E
F
G
H
I
J
2
3
4
5
6
7
8
9
10
11
Main 5 DDR Dump R
SD_DQ[6]
SD_RDQ[32]
SD_MA[12]
SD_RDQ[4]
SD_RDQ[30]
SD_DQ[56]
SD_DQ[27]
SD_DQ[21]
SD_DQ[1]
SD_RDQ[8]
SD_DQ[2]
SD_MA[7]
SD_DQ[52]
SD_RDQ[13]
SD_DQ[16]
SD_RDQ[17]
SD_RDQ[0]
SD_DQ[62]
SD_DQ[53]
SD_RDQ[45]
SD_RDQ[48]
SD_DQ[7]
SD_DQ[9]
SD_RDQ[63]
SD_DQ[41]
SD_RDQ[34]
SD_RDQ[35]
SD_RDQ[16]
SD_RDQ[6]
SD_DQ[23]
SD_DQ[44]
SD_DQ[8]
SD_RDQ[53]
SD_RDQ[44]
SD_DQ[20]
SD_RDQ[9]
SD_RDQ[49]
SD_RDQ[43]
SD_DQ[46]
SD_DQ[33]
SD_DQ[60]
SD_DQ[38]
SD_RDQ[60]
SD_RDQ[23]
SD_RDQ[47]
SD_DQ[37]
SD_DQ[47]
SD_DQ[54]
SD_DQ[40]
SD_RDQ[25]
SD_RDQ[51]
SD_RDQ[28]
SD_RDQ[58]
SD_DQ[57]
SD_DQ[31]
SD_RDQ[31]
SD_RDQ[15]
SD_RDQ[22]
SD_RDQ[1]
SD_RDQ[10]
SD_DQ[35]
SD_MA[8]
SD_DQ[12]
SD_DQ[61]
SD_DQ[36]
SD_DQ[24]
SD_DQ[63]
SD_DQ[22]
SD_RDQ[42]
SD_DQ[43]
SD_DQ[59]
SD_RDQ[27]
SD_RDQ[12]
SD_MA[0]
SD_MA[3]
SD_RDQ[57]
SD_RDQ[59]
SD_DQ[4]
SD_RDQ[21]
SD_MA[6]
SD_MA[9]
SD_RDQ[26]
SD_RDQ[14]
SD_MA[10]
SD_RDQ[36]
SD_DQ[0]
SD_DQ[25]
SD_DQ[49]
SD_DQ[30]
SD_RDQ[20]
SD_RDQ[3]
SD_DQ[18]
SD_DQ[26]
SD_RDQ[62]
SD_DQ[15]
SD_DQ[39]
SD_DQ[10]
SD_RDQ[38]
SD_DQ[51]
SD_DQ[42]
SD_RDQ[11]
SD_DQ[28]
SD_RDQ[55]
SD_DQ[32]
SD_RDQ[37]
SD_RDQ[33]
SD_RDQ[50]
SD_RDQ[7]
SD_DQ[29]
SD_DQ[17]
SD_RDQ[46]
SD_RDQ[18]
SD_DQ[55]
SD_RDQ[54]
SD_DQ[58]
SD_DQ[5]
SD_DQ[14]
SD_RDQ[5]
SD_DQ[3]
SD_RDQ[39]
SD_DQ[34]
SD_RDQ[41]
SD_DQ[45]
SD_MA[11]
SD_DQ[19]
SD_DQ[11]
SD_RDQ[61]
SD_RDQ[29]
SD_RDQ[24]
SD_RDQ[19]
SD_RDQ[52]
SD_DQ[50]
SD_RDQ[40]
SD_RDQ[2]
SD_DQ[13]
SD_DQ[48]
SD_RDQ[56]
SD_DM[0]
SD_DM[1]
SD_DM[2]
SD_DM[4]
SD_DM[3]
SD_DM[5]
SD_DM[7]
SD_DM[6]
SD_DQS[0]
SD_DQS[1]
SD_DQS[2]
SD_DQS[3]
SD_DQS[4]
SD_DQS[5]
SD_DQS[6]
SD_DQS[7]
SD_RMA[0]
SD_RMA[3]
SD_RMA[6]
SD_RMA[7]
SD_RMA[8]
SD_RMA[9]
SD_RMA[10]
SD_RMA[11]
SD_RMA[12]
R77
33
SD_RDM[5]
006:E4;006:E10
RA6 33
4
3
2
1
5
15
16
7
6
8
9
13
14
11
12
10
SD_DQ[0-63]
;007:B1;008:G8,003:E1;007:B1;008:G8,003:E1;007:B1;008:G7
SD_RDQS[6]
006:A7;006:G10
RA4
33
4
3
2
1
5
15
16
7
6
8
9
13
14
11
12
10
R81
33
SD_RDM[0]
006:A4;006:B10
SD_BA0
003:C3;007:F2;008:B7
R83
10
SD_RDQS[2]
006:A6;006:C10
SD_RDM[7]
006:G4;006:G10
R73
33
RA10
33
4
3
2
1
5
15
16
7
6
8
9
13
14
11
12
10
SD_RDQS[5]
006:A6;006:E10
R68
33
SD_RCAS#
006:A4;006:B9;006:C4;006:C9;006:E4;006:E9
SD_BA1
003:C3;007:I2;008:F6
R78
33
RA12
10
4
3
2
1
5
15
16
7
6
8
9
13
14
11
12
10
RA9
33
4
3
2
1
5
15
16
7
6
8
9
13
14
11
12
10
SD_RBA1
006:A1;006:B7;006:C1;006:C7;006:E1;006:E7
SD_RDQ[0-63]
006:A1
SD_RWE#
006:A4;006:B9;006:C4;006:C9;006:E4;006:E9
SD_RBA0
006:A1;006:B7;006:C1;006:C7;006:E1;006:E7
RA11
10
4
3
2
1
5
6
7
8
R70
33
R69
33
SD_RDQS[0]
006:A4;006:B10
SD_RDQS[1]
006:A4;006:B10
SD_RRAS#
006:A4;006:B9;006:C4;006:C9;006:E4;006:E9
SD_RAS#
003:B8;007:I2;008:F7
R71
33
R79
33
R66
33
SD_RDQS[7]
006:A6;006:G10
RA3
33
4
3
2
1
5
15
16
7
6
8
9
13
14
11
12
10
RA8
33
4
3
2
1
5
15
16
7
6
8
9
13
14
11
12
10
RA5
33
4
3
2
1
5
15
16
7
6
8
9
13
14
11
12
10
SD_CAS#
003:B9;007:I2;008:F8
SD_RDQS[3]
006:A6;006:C10
SD_RDM[4]
006:E4;006:E10
SD_WE#
003:B9;007:F2;008:B7
SD_RDQS[4]
006:A6;006:E10
SD_RDM[1]
006:A4;006:B10
RA7
33
4
3
2
1
5
15
16
7
6
8
9
13
14
11
12
10
R75
33
R76
33
SD_RDM[3]
006:C4;006:C10
R74
33
R67
33
R82
10
R80
33
SD_RDM[2]
006:C4;006:C10
SD_RDM[6]
006:G4;006:G10
R72
33
SD_DM[0-7]
007:I4;008:F10,003:B4;007:I5;008:F7,003:B4;007:I6;008:F7
SD_DQS[0-7]
007:F4;008:B8,003:E8;007:F5;008:B10,003:E8;007:F6;008:B9
SD_RMA[0-12]
006:A1
SD_MA[0-12]
command signals 
data signals 
Y1
X0=SCK/SCK#[0:1]
X1=SCK/SCK#[2:3]
Xn-2.0" < SMA,SBA,SRAS#,SCAS#,SWE# Total(Yn) < Xn+2.0"
Zo=55
Ω
0.25"-2.5"
<0.5"
<0.25"
Y1
DDR
Y0
56
0.4"-0.8"
★
DQ,DQS,DQM
X0=SCK/SCK#[0:1]
X1=SCK/SCK#[2:3]
Xn-2.0" < DQ,DQS,DQM Total(Yn) < Xn+0.5"
<1.0"
DIMM
<1.25"
Y0
0.5"-4.0"
10
<1.0"
<0.25"
56
<0.75"
GMCH
DDR
GMCH
<0.1"
VC125
★
MA[12:6,3,0],BA,RAS#.CAS#,WE#
0.5"-1.5"
Zo=55
Ω
VC125
33
DDR
<1.25"
DIMM
<1.25"
See Package 
length table
See Package 
length table
DDR
<0.5"
DDR
DDR
DDR
DDR
DDR
DDR
6
1
A
B
C
D
E
F
G
H
I
J
2
3
4
5
6
7
8
9
10
11
Main 6 On Board Memory Bank 0 / 1
SD_RDQ[36]
SD_RDQ[4]
SD_RDQ[51]
SD_RDQ[53]
SD_RDQ[34]
SD_RDQ[11]
SD_RDQ[3]
SD_RMA[8]
SD_RDQ[26]
SD_RDQ[14]
SD_RDQ[43]
SD_RDQ[19]
SD_RDQ[51]
SD_RDQ[13]
SD_RDQ[38]
SD_RDQ[29]
SD_RDQ[60]
SD_RDQ[52]
SD_RDQ[19]
SD_RDQ[55]
SD_RDQ[49]
SD_RDQ[9]
SD_RDQ[50]
SD_RDQ[40]
SD_RDQ[44]
SD_RMA[11]
SD_RDQ[62]
SD_RDQ[24]
SD_RDQ[61]
SD_RDQ[39]
SD_RDQ[30]
SD_RDQ[7]
SD_RDQ[2]
SD_RMA[3]
SD_RDQ[8]
SD_RDQ[45]
SD_RDQ[54]
SD_RMA[9]
SD_RDQ[10]
SD_RDQ[52]
SD_RDQ[30]
SD_RDQ[28]
SD_RDQ[1]
SD_RDQ[25]
SD_RDQ[9]
SD_RDQ[6]
SD_RDQ[18]
SD_RDQ[42]
SD_RDQ[63]
SD_RDQ[60]
SD_RDQ[44]
SD_RDQ[23]
SD_RDQ[35]
SD_RDQ[29]
SD_RDQ[46]
SD_RDQ[57]
SD_RDQ[0]
SD_RDQ[8]
SD_RDQ[37]
SD_RDQ[41]
SD_RDQ[5]
SD_RDQ[38]
SD_RDQ[39]
SD_RDQ[36]
SD_RDQ[26]
SD_RDQ[16]
SD_RDQ[14]
SD_RDQ[32]
SD_RDQ[24]
SD_RDQ[62]
SD_RDQ[54]
SD_RDQ[59]
SD_RMA[10]
SD_RDQ[58]
SD_RDQ[31]
SD_RDQ[12]
SD_RDQ[20]
SD_RDQ[41]
SD_RDQ[20]
SD_RDQ[40]
SD_RDQ[47]
SD_RDQ[16]
SD_RDQ[28]
SD_RDQ[37]
SD_RDQ[56]
SD_RDQ[25]
SD_RDQ[55]
SD_RDQ[27]
SD_RDQ[32]
SD_RDQ[11]
SD_RDQ[21]
SD_RDQ[15]
SD_RDQ[43]
SD_RMA[0]
SD_RDQ[2]
SD_RDQ[13]
SD_RDQ[56]
SD_RDQ[34]
SD_RDQ[33]
SD_RDQ[33]
SD_RDQ[31]
SD_RDQ[7]
SD_RDQ[1]
SD_RDQ[50]
SD_RMA[6]
SD_RDQ[10]
SD_RDQ[59]
SD_RDQ[21]
SD_RDQ[22]
SD_RDQ[17]
SD_RDQ[0]
SD_RDQ[45]
SD_RDQ[17]
SD_RDQ[48]
SD_RDQ[4]
SD_RDQ[3]
SD_RDQ[47]
SD_RDQ[49]
SD_RDQ[18]
SD_RDQ[42]
SD_RDQ[63]
SD_RDQ[23]
SD_RDQ[6]
SD_RDQ[27]
SD_RDQ[15]
SD_RDQ[57]
SD_RDQ[53]
SD_RDQ[61]
SD_RDQ[35]
SD_RMA[7]
SD_RMA[12]
SD_RDQ[48]
SD_RDQ[46]
SD_RDQ[5]
SD_RDQ[58]
SD_RDQ[22]
SD_RDQ[12]
SD_RMA[0]
SD_RMA[7]
SD_RMA[3]
SD_RMA[9]
SD_RMA[8]
SD_RMA[10]
SD_RMA[6]
SD_RMA[11]
SD_RMA[12]
SD_RMA[10]
SD_RMA[3]
SD_RMA[11]
SD_RMA[12]
SD_RMA[6]
SD_RMA[9]
SD_RMA[7]
SD_RMA[0]
SD_RMA[8]
SD_RMA[3]
SD_RMA[8]
SD_RMA[12]
SD_RMA[7]
SD_RMA[6]
SD_RMA[10]
SD_RMA[9]
SD_RMA[11]
SD_RMA[0]
SD_RMA[0]
SD_RMA[7]
SD_RMA[3]
SD_RMA[9]
SD_RMA[8]
SD_RMA[10]
SD_RMA[6]
SD_RMA[11]
SD_RMA[12]
SD_RMA[0]
SD_RMA[7]
SD_RMA[3]
SD_RMA[9]
SD_RMA[8]
SD_RMA[10]
SD_RMA[6]
SD_RMA[11]
SD_RMA[12]
SD_RMA[0]
SD_RMA[7]
SD_RMA[3]
SD_RMA[9]
SD_RMA[8]
SD_RMA[10]
SD_RMA[6]
SD_RMA[11]
SD_RMA[12]
SD_RMA[0]
SD_RMA[7]
SD_RMA[3]
SD_RMA[9]
SD_RMA[8]
SD_RMA[10]
SD_RMA[6]
SD_RMA[11]
SD_RMA[12]
SD_CLK0
K4H561638D-GCB3
FBGA60
IC6
SAMSUMG
G7
WE#
H8
CS#
M2
A4
L3
A5
L2
A6
K3
A7
K2
A8
J3
A9
K8
A10/AP
J2
A11
A2
D15
B1
D14
B3
D13
A3
VSS
C1
D12
C3
D11
D1
D10
D3
D9
E1
D8
F3
UDM
L8
A1
F7
LDM
K7
A0
L7
A2
M8
A3
H7
RAS#
J8
BA0
J7
BA1
F9
NC
H3
CKE
G2
CLK
E9
D7
D7
D6
D9
D5
C7
D4
C9
D3
B7
D2
B9
D1
A8
D0
M7
VDD
F8
VDD
A7
VDD
D2
VDDQ
F2
VSS
M3
VSS
G8
CAS#
C8
VDDQ
B2
VDDQ
A9
VDDQ
A1
VSSQ
B8
VSSQ
C2
VSSQ
D8
VSSQ
G3
CLK#
H2
A12
E8
VDDQ
E3
UDQS
E7
LDQS
F1
VREF
E2
VSSQ
SD_CLK0#
SD_CS#1
003:B7;006:C9;006:E9;006:G9;008:F8
10V
C144
1u
SD_CLK1#
003:B6;006:A9;006:C9;006:E9;006:G9;006:J4
SD_RBA0
MEMREF
SD_RBA1
SD_CLK0#
VB25
SD_RWE#
MEMREF
C139
0.1u
10V
C145
1u
SD_RCAS#
SD_RWE#
SD_RCAS#
SD_RBA1
I3;006:B7;006:C1;006:C7;006:E1;006:E7;006:G1;006:G7
SD_RDM[3]
005:D9;006:C10
SD_CLK0
SD_RDQS[7]
K4H561638D-GCB3
FBGA60
IC13
SAMSUMG
G7
WE#
H8
CS#
M2
A4
L3
A5
L2
A6
K3
A7
K2
A8
J3
A9
K8
A10/AP
J2
A11
A2
D15
B1
D14
B3
D13
A3
VSS
C1
D12
C3
D11
D1
D10
D3
D9
E1
D8
F3
UDM
L8
A1
F7
LDM
K7
A0
L7
A2
M8
A3
H7
RAS#
J8
BA0
J7
BA1
F9
NC
H3
CKE
G2
CLK
E9
D7
D7
D6
D9
D5
C7
D4
C9
D3
B7
D2
B9
D1
A8
D0
M7
VDD
F8
VDD
A7
VDD
D2
VDDQ
F2
VSS
M3
VSS
G8
CAS#
C8
VDDQ
B2
VDDQ
A9
VDDQ
A1
VSSQ
B8
VSSQ
C2
VSSQ
D8
VSSQ
G3
CLK#
H2
A12
E8
VDDQ
E3
UDQS
E7
LDQS
F1
VREF
E2
VSSQ
SD_CLK0#
SD_CKE1
003:B8;006:C9;006:E9;006:G9;008:F2
MEMREF
K4H561638D-GCB3
FBGA60
IC9
SAMSUMG
G7
WE#
H8
CS#
M2
A4
L3
A5
L2
A6
K3
A7
K2
A8
J3
A9
K8
A10/AP
J2
A11
A2
D15
B1
D14
B3
D13
A3
VSS
C1
D12
C3
D11
D1
D10
D3
D9
E1
D8
F3
UDM
L8
A1
F7
LDM
K7
A0
L7
A2
M8
A3
H7
RAS#
J8
BA0
J7
BA1
F9
NC
H3
CKE
G2
CLK
E9
D7
D7
D6
D9
D5
C7
D4
C9
D3
B7
D2
B9
D1
A8
D0
M7
VDD
F8
VDD
A7
VDD
D2
VDDQ
F2
VSS
M3
VSS
G8
CAS#
C8
VDDQ
B2
VDDQ
A9
VDDQ
A1
VSSQ
B8
VSSQ
C2
VSSQ
D8
VSSQ
G3
CLK#
H2
A12
E8
VDDQ
E3
UDQS
E7
LDQS
F1
VREF
E2
VSSQ
SD_CLK1
SD_RDM[2]
SD_RDM[5]
SD_RCAS#
SD_RBA0
I3;006:B7;006:C1;006:C7;006:E1;006:E7;006:G1;006:G7
SD_RCAS#
SD_RDM[5]
005:D10;006:E10
SD_RDQS[0]
K4H561638D-GCB3
FBGA60
IC11
SAMSUMG
G7
WE#
H8
CS#
M2
A4
L3
A5
L2
A6
K3
A7
K2
A8
J3
A9
K8
A10/AP
J2
A11
A2
D15
B1
D14
B3
D13
A3
VSS
C1
D12
C3
D11
D1
D10
D3
D9
E1
D8
F3
UDM
L8
A1
F7
LDM
K7
A0
L7
A2
M8
A3
H7
RAS#
J8
BA0
J7
BA1
F9
NC
H3
CKE
G2
CLK
E9
D7
D7
D6
D9
D5
C7
D4
C9
D3
B7
D2
B9
D1
A8
D0
M7
VDD
F8
VDD
A7
VDD
D2
VDDQ
F2
VSS
M3
VSS
G8
CAS#
C8
VDDQ
B2
VDDQ
A9
VDDQ
A1
VSSQ
B8
VSSQ
C2
VSSQ
D8
VSSQ
G3
CLK#
H2
A12
E8
VDDQ
E3
UDQS
E7
LDQS
F1
VREF
E2
VSSQ
SD_RBA0
SD_CKE0
003:B8;006:C3;006:E3;006:G3;008:F2
SD_RRAS#
SD_RBA0
SD_CLK1#
C134
0.1u
SD_CS#1
VB25
SD_RDQS[1]
005:D10;006:B10
MEMREF
SD_RDQS[2]
SD_RBA1
SD_RDM[7]
005:D10;006:G10
SD_RDM[6]
SD_RDM[3]
SD_RDQ[0-63]
005:D1
SD_RBA0
SD_RRAS#
SD_RRAS#
SD_CLK1#
SD_CLK1
SD_RDQS[3]
005:D11;006:C10
MEMREF
10V
C141
1u
SD_RDM[1]
SD_CKE1
SD_CLK1
SD_RBA1
SD_CKE0
C147
0.1u
MEMREF
SD_CLK1
SD_RCAS#
SD_RDQS[2]
005:D11;006:C10
SD_RRAS#
SD_RWE#
SD_CKE0
SD_RDQS[4]
005:D11;006:E10
SD_CKE1
10V
C132
1u
SD_RCAS#
005:I4;006:B9;006:C4;006:C9;006:E4;006:E9;006:G4;006:G9
R86
120
1%
C142
0.1u
SD_RWE#
SD_CLK0
003:B6;006:A3;006:C3;006:E3;006:G3;006:J2
K4H561638D-GCB3
FBGA60
IC12
SAMSUMG
G7
WE#
H8
CS#
M2
A4
L3
A5
L2
A6
K3
A7
K2
A8
J3
A9
K8
A10/AP
J2
A11
A2
D15
B1
D14
B3
D13
A3
VSS
C1
D12
C3
D11
D1
D10
D3
D9
E1
D8
F3
UDM
L8
A1
F7
LDM
K7
A0
L7
A2
M8
A3
H7
RAS#
J8
BA0
J7
BA1
F9
NC
H3
CKE
G2
CLK
E9
D7
D7
D6
D9
D5
C7
D4
C9
D3
B7
D2
B9
D1
A8
D0
M7
VDD
F8
VDD
A7
VDD
D2
VDDQ
F2
VSS
M3
VSS
G8
CAS#
C8
VDDQ
B2
VDDQ
A9
VDDQ
A1
VSSQ
B8
VSSQ
C2
VSSQ
D8
VSSQ
G3
CLK#
H2
A12
E8
VDDQ
E3
UDQS
E7
LDQS
F1
VREF
E2
VSSQ
SD_RDQS[4]
SD_RBA0
SD_RMA[0-12]
005:J2
C133
0.1u
SD_RDQS[6]
005:D11;006:G10
SD_CS#0
SD_RDM[2]
005:D9;006:C10
R85
120
1%
SD_RDQS[6]
C148
0.1u
SD_RBA0
SD_CLK1#
K4H561638D-GCB3
FBGA60
IC10
SAMSUMG
G7
WE#
H8
CS#
M2
A4
L3
A5
L2
A6
K3
A7
K2
A8
J3
A9
K8
A10/AP
J2
A11
A2
D15
B1
D14
B3
D13
A3
VSS
C1
D12
C3
D11
D1
D10
D3
D9
E1
D8
F3
UDM
L8
A1
F7
LDM
K7
A0
L7
A2
M8
A3
H7
RAS#
J8
BA0
J7
BA1
F9
NC
H3
CKE
G2
CLK
E9
D7
D7
D6
D9
D5
C7
D4
C9
D3
B7
D2
B9
D1
A8
D0
M7
VDD
F8
VDD
A7
VDD
D2
VDDQ
F2
VSS
M3
VSS
G8
CAS#
C8
VDDQ
B2
VDDQ
A9
VDDQ
A1
VSSQ
B8
VSSQ
C2
VSSQ
D8
VSSQ
G3
CLK#
H2
A12
E8
VDDQ
E3
UDQS
E7
LDQS
F1
VREF
E2
VSSQ
SD_CLK0
SD_RRAS#
005:I4;006:B9;006:C4;006:C9;006:E4;006:E9;006:G4;006:G9
SD_RBA1
C138
0.1u
VB25
VB25
SD_RDM[0]
005:D9;006:B10
SD_CS#0
10V
C140
1u
VB25
SD_CKE0
SD_RDM[6]
005:D10;006:G10
SD_RDM[4]
SD_CLK0#
SD_CLK1
003:B6;006:A9;006:C9;006:E9;006:G9;006:J3
SD_RCAS#
SD_CLK1
VB25
SD_RBA1
SD_RWE#
SD_RBA1
SD_CLK0
SD_RWE#
SD_RRAS#
K4H561638D-GCB3
FBGA60
IC7
SAMSUMG
G7
WE#
H8
CS#
M2
A4
L3
A5
L2
A6
K3
A7
K2
A8
J3
A9
K8
A10/AP
J2
A11
A2
D15
B1
D14
B3
D13
A3
VSS
C1
D12
C3
D11
D1
D10
D3
D9
E1
D8
F3
UDM
L8
A1
F7
LDM
K7
A0
L7
A2
M8
A3
H7
RAS#
J8
BA0
J7
BA1
F9
NC
H3
CKE
G2
CLK
E9
D7
D7
D6
D9
D5
C7
D4
C9
D3
B7
D2
B9
D1
A8
D0
M7
VDD
F8
VDD
A7
VDD
D2
VDDQ
F2
VSS
M3
VSS
G8
CAS#
C8
VDDQ
B2
VDDQ
A9
VDDQ
A1
VSSQ
B8
VSSQ
C2
VSSQ
D8
VSSQ
G3
CLK#
H2
A12
E8
VDDQ
E3
UDQS
E7
LDQS
F1
VREF
E2
VSSQ
SD_CS#1
SD_RDM[1]
005:D9;006:B10
SD_CKE1
10V
C131
1u
SD_CS#1
SD_CLK1#
SD_RDQS[1]
SD_RBA0
SD_RRAS#
C143
0.1u
SD_CLK0#
SD_RDM[0]
SD_CLK1#
MEMREF
SD_RDM[4]
005:D10;006:E10
SD_RDM[7]
VB25
C137
0.1u
MEMREF
SD_RDQS[5]
C146
0.1u
K4H561638D-GCB3
FBGA60
IC8
SAMSUMG
G7
WE#
H8
CS#
M2
A4
L3
A5
L2
A6
K3
A7
K2
A8
J3
A9
K8
A10/AP
J2
A11
A2
D15
B1
D14
B3
D13
A3
VSS
C1
D12
C3
D11
D1
D10
D3
D9
E1
D8
F3
UDM
L8
A1
F7
LDM
K7
A0
L7
A2
M8
A3
H7
RAS#
J8
BA0
J7
BA1
F9
NC
H3
CKE
G2
CLK
E9
D7
D7
D6
D9
D5
C7
D4
C9
D3
B7
D2
B9
D1
A8
D0
M7
VDD
F8
VDD
A7
VDD
D2
VDDQ
F2
VSS
M3
VSS
G8
CAS#
C8
VDDQ
B2
VDDQ
A9
VDDQ
A1
VSSQ
B8
VSSQ
C2
VSSQ
D8
VSSQ
G3
CLK#
H2
A12
E8
VDDQ
E3
UDQS
E7
LDQS
F1
VREF
E2
VSSQ
SD_RDQS[5]
005:D11;006:E10
SD_RDQS[7]
005:D11;006:G10
SD_RCAS#
SD_CS#0
SD_RWE#
I4;006:B9;006:C4;006:C9;006:E4;006:E9;006:G4;006:G9
SD_RDQS[3]
10V
C135
1u
VB25
10V
C136
1u
SD_RWE#
SD_CLK0
SD_RDQS[0]
005:D10;006:B10
SD_RBA1
SD_CS#0
003:B7;006:C3;006:E3;006:G3;008:F8
SD_CLK0#
003:B6;006:A3;006:C3;006:E3;006:G3;006:J3
SD_RRAS#
SD_MA[5]
8;006:C2;006:C8;006:E2;006:E8;006:G2;006:G8;008:F5
SD_MA[4]
8;006:C2;006:C8;006:E2;006:E8;006:G2;006:G8;008:F5
SD_MA[2]
8;006:C3;006:C8;006:E3;006:E8;006:G3;006:G8;008:F5
SD_MA[1]
8;006:C3;006:C8;006:E3;006:E8;006:G3;006:G8;008:F6
SD_MA[5]
SD_MA[4]
SD_MA[1]
SD_MA[2]
SD_MA[4]
SD_MA[5]
SD_MA[1]
SD_MA[2]
SD_MA[2]
SD_MA[1]
SD_MA[4]
SD_MA[5]
SD_MA[2]
SD_MA[1]
SD_MA[4]
SD_MA[5]
SD_MA[2]
SD_MA[1]
SD_MA[4]
SD_MA[5]
SD_MA[2]
SD_MA[1]
SD_MA[4]
SD_MA[5]
SD_MA[5]
SD_MA[4]
SD_MA[1]
SD_MA[2]
BANK 0/1 (ON BOARD)
<0.25"
0.25"-1.0"
DDR
<0.5"
DDR
X0
0.25"-4.8"
Zo=42
Ω
/Zdiff=70
Ω
★
CLK[0,1].CLK#[0,1]
DDR
DDR
GMCH
120
See Package 
length table
★
CKE[0,1]#,CS#[0,1]
56
DDR
DDR
0.5"-1.5"
Zo=55
Ω
DDR
0.3-0.7"
DDR
See Package 
length table
Y0
GMCH
0.5"-5.5"
0.3"-0.7"
VC125
X0=SCK/SCK#[0:1]
X0-2.0" < SCS[0:1]#,SCKE[0:1]# Total(Y0) < X0-0.5"
0.2"-2.0"
256Mbit PKG size =  8x14mm
512Mbit PKG size = 10x12mm
7
1
A
B
C
D
E
F
G
H
I
J
2
3
4
5
6
7
8
9
10
11
Main 7 Micro - DIMM Bank 2 / 3
SD_DQ[49]
SD_DQ[2]
SD_DQ[17]
SD_DQ[31]
SD_DQ[16]
SD_DQ[41]
SD_DQ[37]
SD_DQ[28]
SD_DQ[15]
SD_DQ[6]
SD_DQ[18]
SD_DQ[8]
SD_DQ[55]
SD_DQ[29]
SD_DQ[39]
SD_DQ[46]
SD_DQ[54]
SD_DQ[45]
SD_DQ[40]
SD_DQ[48]
SD_DQ[13]
SD_DQ[19]
SD_DQ[58]
SD_DQ[62]
SD_DQ[35]
SD_DQ[7]
SD_DQ[26]
SD_DQ[60]
SD_DQ[36]
SD_DQ[57]
SD_DQ[56]
SD_DQ[3]
SD_DQ[27]
SD_DQ[63]
SD_DQ[33]
SD_DQ[0]
SD_DQ[51]
SD_DQ[14]
SD_DQ[34]
SD_DQ[20]
SD_DQ[21]
SD_DQ[23]
SD_DQ[43]
SD_DQ[50]
SD_DQ[44]
SD_DQ[22]
SD_DQ[38]
SD_DQ[47]
SD_DQ[42]
SD_DQ[25]
SD_DQ[12]
SD_DQ[5]
SD_DQ[10]
SD_DQ[1]
SD_DQ[52]
SD_DQ[24]
SD_DQ[11]
SD_DQ[9]
SD_DQ[61]
SD_DQ[4]
SD_DQ[32]
SD_DQ[30]
SD_DQ[53]
SD_DQ[59]
SD_MA[0]
003:B1;005:G2;008:F6
SD_MA[9]
003:B1;005:G2;008:B6
SD_MAB[1]
003:C3;008:B5
VB25
SD_MA[10]
003:B1;005:G2;008:B8
SD_MA[6]
003:B1;005:G2;008:F6
SD_MAB[2]
003:C3;008:F6
SD_MA[11]
003:B1;005:G2;008:B6
SD_MA[3]
003:B1;005:G2;008:B5
1-1746705-1
CN1
AMP
MicroDDR
89
VDD
87
A10/AP
91
BA0
93
WE#
95
S0#
97
A13
99
VSS
101
DQ32
103
DQ33
105
VDD
107
DQS4
109
DQ34
111
VSS
113
DQ35
115
DQ40
117
VDD
119
DQ41
121
DQS5
123
VSS
125
DQ42
127
DQ43
129
VDD
131
VDD
133
VSS
135
VSS
137
DQ48
139
DQ49
141
VDD
143
DQS6
145
DQ50
147
VSS
149
DQ51
151
DQ56
153
VDD
155
DQ57
157
DQS7
159
VSS
161
DQ58
163
DQ59
165
VDD
167
SDA
169
SCL
171
VDDSPD
90
VDD
88
BA1
92
RAS#
94
CAS#
96
S1#
98
RFU
100
VSS
102
DQ36
104
DQ37
106
VDD
108
DM4
110
DQ38
112
VSS
114
DQ39
116
DQ44
118
VDD
120
DQ45
122
DM5
124
VSS
126
DQ46
128
DQ47
130
VDD
132
CK1#
134
CK1
136
VSS
138
DQ52
140
DQ53
142
VDD
144
DM6
146
DQ54
148
VSS
150
DQ55
152
DQ60
154
VDD
156
DQ61
158
DM7
160
VSS
162
DQ62
164
DQ63
166
VDD
168
SA0
170
SA1
172
SA2
SD_CKE3
003:B8;008:B5
SMBCLK1
009:B6
MEMREF
SD_CS#3
003:B8;008:F8
SMBDATA
SD_DM[7]
003:B4;005:A9;008:F7
SD_DM[4]
003:B4;005:A9;008:F9
SD_DM[1]
003:B4;005:A9;008:F2
VB3
10V
C160
1u
1608
SD_RAS#
003:B8;005:G4;008:F7
10V
C159
1u
1608
SD_MA[8]
003:B1;005:G2;008:F6
SD_DQS[1]
003:E8;005:A10;008:B1
SN74AHC2G66HDCTR
IC14
TI
1 IN/OUT1
5 IN/OUT2
7 CONT1
3 CONT2
4
GND
8
VCC
6
OUT/IN2
2
OUT/IN1
SD_MA[12]
003:B1;005:G2;008:B6
SD_MA[7]
003:B1;005:G2;008:B6
SD_DQS[7]
003:E8;005:A10;008:B9
16V
C152
0.1u
SD_DM[6]
003:B4;005:A9;008:F7
SD_CAS#
003:B9;005:G4;008:F8
SD_CS#2
003:B7;008:B7
SD_DQS[6]
003:E8;005:A10;008:B10
SD_CKE2
003:B8;008:F5
SD_DM[2]
003:B4;005:A9;008:F4
C161
0.1u
1-1746705-1
CN1
AMP
MicroDDR
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CKE1
73
A12
2
VREF
4
VSS
6
DQ4
8
DQ5
10
VDD
12
DM0
14
DQ6
16
VSS
18
DQ7
20
DQ12
22
VDD
24
DQ13
26
DM1
28
VSS
30
DQ14
32
DQ15
34
VDD
36
VDD
38
VSS
40
VSS
42
DQ20
44
DQ21
46
VDD
48
DM2
50
DQ22
52
VSS
54
DQ23
56
DQ28
58
VDD
60
DQ29
62
DM3
64
VSS
66
DQ30
68
DQ31
70
VDD
72
CKE0
74
A11
75
A9
79
VSS
77
A7
81
A5
83
A3
85
A1
76
A8
80
VSS
78
A6
82
A4
84
A2
86
A0
SD_DQS[5]
003:E8;005:A10;008:B8
SD_MAB[5]
003:C3;008:B6
SD_MAB[4]
003:C3;008:F6
MEMREF
SD_DQS[4]
003:E8;005:A10;008:B7
6.3V
C156
NU
2125
B
16V
C153
0.1u
C149
0.1u
10V
C155
1u
1608
6.3V
C151
NU
2125
B
VB25
SMBDATA1
009:B6
VB25
VB25
10V
C154
1u
1608
SMBCLK
C150
0.1u
16V
C158
0.1u
SD_DM[5]
003:B4;005:A9;008:F10
SD_WE#
003:B9;005:G4;008:B7
16V
C157
0.1u
SD_DQS[3]
003:E8;005:A10;008:B5
SD_DQ[0-63]
A1;008:G8,003:E1;005:A1;008:G8,003:E1;005:A1;008:G8,003:E1;005:A1;008:G7
SD_DQS[2]
003:E8;005:A10;008:F4
1-1746705-1
CN1
MicroDDR
AMP
173
174
SD_DM[3]
003:B4;005:A9;008:B5
SMBCLK
007:F7;010:C1;010:D3
VB25
VCRST#
010:C2;010:F2;017:C9;022:D4;025:F4;028:B11
SD_BA0
003:C3;005:G3;008:B7
SD_BA1
003:C3;005:G3;008:F6
SD_DQS[0]
003:E8;005:A10;008:B1
SD_DM[0]
003:B4;005:A9;008:F2
SMBDATA
007:F7;010:C1;010:D3
R557
120
1%
SD_CLK3#
SD_CLK4
003:B7;007:D10;007:I5
SD_CLK4
SD_CLK4#
R561
120
1%
SD_CLK3#
003:B7;007:B4;007:D10
SD_CLK3
SD_CLK3
003:B6;007:B4;007:D9
SD_CLK4#
003:B7;007:D11;007:I5
SD_CLK3
003:B6;007:C9;007:D9
SD_CLK3#
003:B7;007:C10;007:D10
SD_CLK4#
003:B7;007:C11;007:D11
SD_CLK4
003:B7;007:C10;007:D10
DDRTHRM
022:B9;022:D5
R84
1608
NTCG163JF103HT
BANK 2/3 (Micro-DIMM)
DIMM
★
CLK[4,5],CLK#[4.5]
Zo=42
Ω
/Zdiff=70
Ω
0.25"-4.8"
120
GMCH
<0.5"
See Package 
length table
X1
56
X1=SCK/SCK#[4:5]
X1-2.0" < SCS[2:3]#,SCKE[2:3]# Total(Y1) < X1-0.5"
GMCH
0.2"-2.0"
< 0.25"
Zo=55
Ω
★
CKE[2,3]#,CS#[2,3]
0.25"-4.0"
VC125
DIMM
Y1
See Package 
length table
8
1
A
B
C
D
E
F
G
H
I
J
2
3
4
5
6
7
8
9
10
11
Main 8 DDR Term
RA19
56
10
1
2
3
4
6
7
8
9
SD_MAB[4]
003:C3;007:E7
SD_RAS#
003:B8;005:G4;007:I2
C162
0.1u
SD_MA[3]
003:B1;005:G2;007:B7
RA20
56
10
1
2
3
4
6
7
8
9
C170
0.1u
RA15
56
10
1
2
3
4
6
7
8
9
C166
0.1u
VC125
RA16
56
10
1
2
3
4
6
7
8
9
C169
0.1u
C174
0.1u
SD_MAB[1]
003:C3;007:B7
RA24
56
10
1
2
3
4
6
7
8
9
VC125
C165
0.1u
C172
0.1u
RA13
56
10
1
2
3
4
6
7
8
9
RA26
56
10
1
2
3
4
6
7
8
9
SD_BA1
003:C3;005:G3;007:I2
SD_MAB[5]
003:C3;007:B7
RA14
56
10
1
2
3
4
6
7
8
9
C168
0.1u
C171
0.1u
C164
0.1u
RA23
56
10
1
2
3
4
6
7
8
9
C163
0.1u
C175
0.1u
RA18
56
10
1
2
3
4
6
7
8
9
C173
0.1u
SD_MAB[2]
003:C3;007:E7
RA21
56
10
1
2
3
4
6
7
8
9
C167
0.1u
SD_MA[0]
003:B1;005:G2;007:E7
SD_MA[7]
003:B1;005:G2;007:B7
SD_MA[6]
003:B1;005:G2;007:E7
SD_MA[11]
003:B1;005:G2;007:E6
SD_MA[9]
003:B1;005:G2;007:B6
SD_MA[8]
003:B1;005:G2;007:E6
SD_MA[12]
003:B1;005:G2;007:B6
SD_DQS[4]
003:E8;005:A10;007:F3
SD_DQS[5]
003:E8;005:A10;007:F4
SD_DQS[6]
003:E8;005:A10;007:F5
SD_DM[6]
003:B4;005:A9;007:I5
SD_CKE3
003:B8;007:B6
SD_BA0
003:C3;005:G3;007:F2
SD_WE#
003:B9;005:G4;007:F2
SD_MA[10]
003:B1;005:G2;007:F2
SD_CS#2
003:B7;007:F3
SD_CKE2
003:B8;007:E6
SD_CS#3
003:B8;007:I3
SD_CAS#
003:B9;005:G4;007:I2
SD_CS#0
003:B7;006:A3;006:C3;006:E3;006:G3
SD_CS#1
003:B7;006:A9;006:C9;006:E9;006:G9
RA17
56
4
3
2
1
5
6
7
8
RA47
56
4
3
2
1
5
6
7
8
SD_DM[5]
003:B4;005:A9;007:I4
SD_DM[4]
003:B4;005:A9;007:I3
RA25
56
4
3
2
1
5
6
7
8
RA43
56
4
3
2
1
5
6
7
8
RA22
56
4
3
2
1
5
6
7
8
RA44
56
4
3
2
1
5
6
7
8
RA45
56
4
3
2
1
5
6
7
8
SD_CKE1
003:B8;006:A9;006:C9;006:E9;006:G9
SD_CKE0
003:B8;006:A3;006:C3;006:E3;006:G3
SD_DQ[11]
003:E1;005:A1;007:B1
SD_DQ[27]
003:E1;005:A1;007:B1
SD_DQ[26]
003:E1;005:A1;007:B1
SD_DQ[35]
003:E1;005:A1;007:B1
SD_DQ[34]
003:E1;005:A1;007:B1
SD_DQ[33]
003:E1;005:A1;007:B1
SD_DQ[32]
003:E1;005:A1;007:B1
SD_DQ[37]
003:E1;005:A1;007:B1
SD_DQ[39]
003:E1;005:A1;007:B1
SD_DQ[46]
003:E1;005:A1;007:B1
SD_DQ[45]
003:E1;005:A1;007:B1
SD_DQ[23]
003:E1;005:A1;007:B1
SD_DQ[15]
003:E1;005:A1;007:B1
SD_DQ[14]
003:E1;005:A1;007:B1
SD_DQ[30]
003:E1;005:A1;007:B1
SD_DQ[38]
003:E1;005:A1;007:B1
SD_DQ[36]
003:E1;005:A1;007:B1
SD_DQ[44]
003:E1;005:A1;007:B1
SD_DQ[31]
003:E1;005:A1;007:B1
SD_DQ[47]
003:E1;005:A1;007:B1
SD_DQ[53]
003:E1;005:A1;007:B1
SD_DQ[55]
003:E1;005:A1;007:B1
SD_DQ[52]
003:E1;005:A1;007:B1
SD_DQ[54]
003:E1;005:A1;007:B1
SD_MA[4]
003:B1;005:G2;006:A2;006:B8;006:C2;006:C8;006:E2;006:E8;006:G2;006:G8
SD_MA[2]
003:B1;005:G2;006:A3;006:B8;006:C3;006:C8;006:E3;006:E8;006:G3;006:G8
SD_MA[5]
003:B1;005:G2;006:A2;006:B8;006:C2;006:C8;006:E2;006:E8;006:G2;006:G8
SD_MA[1]
003:B1;005:G2;006:A3;006:B8;006:C3;006:C8;006:E3;006:E8;006:G3;006:G8
SD_DM[0]
003:B4;005:A9;007:E3
SD_DM[1]
003:B4;005:A9;007:E3
SD_DM[3]
003:B4;005:A9;007:E6
SD_DM[7]
003:B4;005:A9;007:I6
SD_DQ[6]
003:E1;005:A1;007:B1
SD_DQ[7]
003:E1;005:A1;007:B1
SD_DQ[12]
003:E1;005:A1;007:B1
SD_DQ[22]
003:E1;005:A1;007:B1
SD_DM[2]
003:B4;005:A9;007:E5
SD_DQ[60]
003:E1;005:A1;007:B1
SD_DQ[8]
003:E1;005:A1;007:B1
SD_DQS[0]
003:E8;005:A10;007:B3
SD_DQ[3]
003:E1;005:A1;007:B1
SD_DQS[1]
003:E8;005:A10;007:B3
SD_DQS[2]
003:E8;005:A10;007:B5
SD_DQS[3]
003:E8;005:A10;007:B6
SD_DQ[59]
003:E1;005:A1;007:B1
SD_DQS[7]
003:E8;005:A10;007:F6
SD_DQ[0]
003:E1;005:A1;007:B1
SD_DQ[1]
003:E1;005:A1;007:B1
SD_DQ[9]
003:E1;005:A1;007:B1
SD_DQ[10]
003:E1;005:A1;007:B1
SD_DQ[13]
003:E1;005:A1;007:B1
SD_DQ[18]
003:E1;005:A1;007:B1
SD_DQ[16]
003:E1;005:A1;007:B1
SD_DQ[17]
003:E1;005:A1;007:B1
SD_DQ[19]
003:E1;005:A1;007:B1
SD_DQ[20]
003:E1;005:A1;007:B1
SD_DQ[21]
003:E1;005:A1;007:B1
SD_DQ[24]
003:E1;005:A1;007:B1
SD_DQ[25]
003:E1;005:A1;007:B1
SD_DQ[28]
003:E1;005:A1;007:B1
SD_DQ[29]
003:E1;005:A1;007:B1
SD_DQ[2]
003:E1;005:A1;007:B1
SD_DQ[5]
003:E1;005:A1;007:B1
SD_DQ[4]
003:E1;005:A1;007:B1
SD_DQ[40]
003:E1;005:A1;007:B1
SD_DQ[41]
003:E1;005:A1;007:B1
SD_DQ[49]
003:E1;005:A1;007:B1
SD_DQ[42]
003:E1;005:A1;007:B1
SD_DQ[48]
003:E1;005:A1;007:B1
SD_DQ[51]
003:E1;005:A1;007:B1
SD_DQ[50]
003:E1;005:A1;007:B1
SD_DQ[58]
003:E1;005:A1;007:B1
SD_DQ[56]
003:E1;005:A1;007:B1
SD_DQ[57]
003:E1;005:A1;007:B1
SD_DQ[63]
003:E1;005:A1;007:B1
SD_DQ[62]
003:E1;005:A1;007:B1
SD_DQ[61]
003:E1;005:A1;007:B1
SD_DQ[43]
003:E1;005:A1;007:B1
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