Panasonic KX-TDA6382X / KX-TDA6382SX Service Manual ▷ View online
65
KX-TDA6382X/KX-TDA6382SX
172
P32
O
H
Reserve
171
P31
O
H
Reserve
170
P30
O
H
Reserve
199
P47
DT_OE7
O
H
DTMF data output control signal
198
P46
DT_OE6
O
H
DTMF data output control signal
197
P45
DT_OE5
O
H
DTMF data output control signal
196
P44
DT_OE4
O
H
DTMF data output control signal
195
P43
DT_OE3
O
H
DTMF data output control signal
194
P42
DT_OE2
O
H
DTMF data output control signal
111
P41
DT_OE1
O
H
DTMF data output control signal
110
P40
DT_OE0
O
H
DTMF data output control signal
208
P57
O
H
Reserve
207
P56
O
H
Reserve
206
P55
O
H
Reserve
205
P54
O
H
Reserve
204
P53
O
H
Reserve
203
P52
O
H
Reserve
202
P51
O
H
Reserve
201
P50
O
H
Reserve
Pin No.
Pin Name
Signal Name
I/O
ACT
Description
66
KX-TDA6382X/KX-TDA6382SX
11.1.2.
IC401(CPU) I/O Port
Pin No.
Pin name
Signal name
I/O
ACT
Description
Remarks
68
PA15
67
PA14
66
PA13
nIRQ1
I
L
EMPR interrupt
Used as nIRQ1
65
PA12
HALT
I
H
DC power down recovery detection
Used as nIRQ0
64
PA11
nRTS
O
L
Serial I/F for debug
62
PA10
nCTS
I
L
Serial I/F for debug
61
PA9
O
H
Not used
60
PA8
nBREQ
I
L
Bus request from EMPR
Used as nBREQ
58
PA7
nBACK
O
L
Response to bus request from EMPR
Used as nBACK
57
PA6
nRD
O
L
Read signal
Used as nRD
56
PA5
O
H
Not used
55
PA4
nWR
O
L
Write signal
Used as nWR
54
PA3
nWAIT
I
L
Wait signal
Used as nWAIT
53
PA2
O
Not used
52
PA1
O
Not used
51
PA0
O
Not used
100
PB15
O
Not used
99
PB14
O
Not used
98
PB13
O
Not used
97
PB12
O
Not used
96
PB11
I
Not used
95
PB10
O
Not used
94
PB9
TX
Serial I/F for debug
Used as TXD0
93
PB8
RX
Serial I/F for debug
Used as RXD0
91
PB7
BID2
I
L
Board classification judgment (Use undecided)
90
PB6
BID1
I
L
Board classification judgment (Use undecided)
89
PB5
BID0
I
L
Board classification judgment (Use undecided)
87
PB4
PB4
I
H
H: Operation, L: Debug
86
PB3
nFlash Busy
I
L
Flash Memory Busy
85
PB2
O
Not used
84
PB1
O
Not used
83
PB0
O
Not used
67
KX-TDA6382X/KX-TDA6382SX
11.1.3.
IC6, IC7 of Main Board and IC6, IC7 of Sub Board(CODEC)
Line wire port
Pin No.
Pin Name
Signal Name
I/O
ACT
Description
CO1
(IC6)
CO5
(IC7)
CO9
(IC6)
CO13
(IC7)
40
SO1_1
SHNT0/4/8/12
O
L
Pulse Control/Bell Receive Control
37
SB1_2
DIAL0/4/8/12
O
L
Line Acquisition
38
SB1_1
BELLI0/4/8/12
I
L
Receiving Bell Signal
39
SB1_0
REVDET0/4/8/12
I
H/L Line Reversal Detection
35
SI1_1
CPCDET0/4/8/12
I
H
Disconnect Detection
36
SI1_0
DT_STD0/4/8/12
I
H
DTMF Detection
CO2
(IC6)
CO6
(IC7)
CO10
(IC6)
CO14
(IC7)
43
SO2_1
SHNT1/5/9/13
O
L
Pulse Control/Bell Receive Control
46
SB2_2
DIAL1/5/9/13
O
L
Line Acquisition
45
SB2_1
BELLI1/5/9/13
I
L
Receiving Bell Signal
44
SB2_0
REVDET1/5/9/13
I
H/L Line Reversal Detection
48
SI2_1
CPCDET1/5/9/13
I
H
Disconnect Detection
47
SI2_0
DT_STD1/5/9/13
I
H
DTMF Detection
CO3
(IC6)
CO7
(IC7)
CO10
(IC6)
CO14
(IC7)
6
SO3_1
SHNT2/6/10/14
O
L
Pulse Control/Bell Receive Control
3
SB3_2
DIAL2/6/10/14
O
L
Line Acquisition
4
SB3_1
BELLI2/6/10/14
I
L
Receiving Bell Signal
5
SB3_0
REVDET2/6/10/14
I
H/L Line Reversal Detection
1
SI3_1
CPCDET2/6/10/14
I
H
Disconnect Detection
2
SI3_0
DT_STD2/6/10/14
I
H
DTMF Detection
CO4
(IC6)
CO8
(IC7)
CO12
(IC6)
CO16
(IC7)
9
SO4_1
SHNT3/7/11/15
O
L
Pulse Control/Bell Receive Control
12
SB4_2
DIAL3/7/11/15
O
L
Line Acquisition
11
SB4_1
BELLI3/7/11/15
I
L
Receiving Bell Signal
10
SB4_0
REVDET3/7/11/15
I
H/L Line Reversal Detection
14
SI4_1
CPCDET3/7/11/15
I
H
Disconnect Detection
13
SI4_0
DT_STD3/7/11/15
I
H
DTMF Detection
IC6, IC7
CODEC
SB3_0
SO3_1
S03_0
GNDA1
INT34
VDDA34
INT12
DRB
PCLK
FSC
DOUT
DIN
DXB
RESET
MCLK
CS
DCLK
SB3_1
SI3_1
SI3_0
SB3_2
VDDD
VDDA12
GNDA2
SO4_1
S04_0
SB4_0
SB4_1
SI4_1
SI4_0
SB4_2
SB1_0
SB1_1
SI1_1
SI1_0
SB1_2
SB2_0
SB2_1
SI2_1
SI2_0
SB2_2
VDDREF
SO1_1
S01_0
VREF
SO2_1
S02_0
GNDA3
GNDA4
GNDD
CHCLK1
CHCLK2
TCB
DRA
DXA
TCA
Vout1
Vin1
Vout2
Vin2
Vout3
Vin3
Vout4
Vin4
39
38
35
36
37
40
41
51
49
44
45
48
47
46
43
42
53
55
5
6
7
4
1
2
3
60
58
9
8
10
11
14
13
12
62
64
15
34
30
32
31
20
19
29
23
22
17
18
33
16
28
27
26
25
50
61
24
52
54
57
56
59
21
63
68
KX-TDA6382X/KX-TDA6382SX
11.1.4.
IC308, IC409 of Main Board and IC508, IC609 of Sub Board(Caller ID ASIC)
Pin No.
Terminal Name
I/O
Description
1
AVSS
-
GND (For analog interface)
2
AVDD
-
Power Supply (3.3V: For analog interface)
3
AINP3
in
Amplifier input
4
AINM3
in
Amplifier input
5
GS3
out
Amplifier output
6
AIN3
in
ADC input
7
AINP2
in
Amplifier input
8
AINM2
in
Amplifier input
9
GS2
out
Amplifier output
10
AIN2
in
ADC input
11
AVSS
-
GND (For analog interface)
12
AVDD
-
Power Supply (3.3V: For analog interface)
13
AINP1
in
Amplifier input
14
AINM1
in
Amplifier input
15
GS1
out
Amplifier output
16
AIN1
in
ADC input
17
AINP0
in
Amplifier input
18
AINM0
in
Amplifier input
19
GS0
out
Amplifier output
20
AIN0
in
ADC input
21
VREF
out
Voltage Reference
22
AVSS
-
GND (For analog interface)
23
AVDD
-
Power Supply (3.3V: For analog interface)
24
MODE3
in
Mode select bit (5V tolerant)
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