Panasonic KX-TDA6381X / KX-TDA6381SX Service Manual ▷ View online
7
KX-TDA6381X/KX-TDA6381SX
4.1.2.
Block Diagram of Sub Board
nRES
A[4:0]
D[7:0]
ASIC
(CIDAك
nWR
nRD
nRES
C_CS[2]
DHW[0]
UHW[0]
CLK
FH
DOUT
DXA
DXB
PCLK
MCLK
MCLK
DIN
DCLK
CS
DRA
DRB
CODEC
PEB
2466
2466
FSC
RESET
NCS0
NWR
NRST
NRD
nCS[0]
nCPCDET[0]
SHUNT[0]
SHUNT[0]
Rev&Bell
&Shunt
Detector
Port I
Transformer
DIAL &
DC Loop &
CPC
Detector
nBELDET[0]
nLOOP[0]
Serge
EMC
nREVDET][0]
OP AMP
Rev&Bell
&Shunt
Detector
Port J
Transformer
DIAL &
DC Loop &
CPC
Detector
nBELDET[ڭ]
nLOOP[ڭ]
Serge
EMC
nREVDET][ڭ]
OP AMP
Rev&Bell
&Shunt
Detector
Port K
Transformer
DIAL &
DC Loop &
CPC
Detector
nBELDET[ڮ]
nLOOP[ڮ]
Serge
EMC
nREVDET][ڮ]
OP AMP
Rev&Bell
&Shunt
Detector
Port L
Transformer
DIAL &
DC Loop &
CPC
Detector
nBELDET[䠏]
nLOOP[䠏]
Serge
EMC
nREVDET][䠏]
nCPCDET[ڭ]
SHUNT[ڭ]
SHUNT[ڭ]
nCPCDET[ڮ]
SHUNT[ڮ]
SHUNT[ڮ]
nCPCDET[䠏]
SHUNT[䠏]
SHUNT[䠏]
+2.5V
+2.5V
DXA
DXB
PCLK
MCLK
MCLK
DIN
DCLK
CS
DRA
DRB
CODEC
PEB
2466
2466
FSC
RESET
nCPCDET[ڰ]
SHUNT[ڰ]
SHUNT[ڰ]
OP AMP
Rev&Bell
&Shunt
Detector
Port M
Transformer
DIAL &
DC Loop &
CPC
Detector
nBELDET[ڰ]
nLOOP[ڰ]
Serge
EMC
nREVDET][ڰ]
OP AMP
Rev&Bell
&Shunt
Detector
Port N
Transformer
DIAL &
DC Loop &
CPC
Detector
nBELDET[ڱ]
nLOOP[ڱ]
Serge
EMC
nREVDET][ڱ]
OP AMP
Rev&Bell
&Shunt
Detector
Port O
Transformer
DIAL &
DC Loop &
CPC
Detector
nBELDET[ڲ]
nLOOP[ڲ]
Serge
EMC
nREVDET][ڲ]
OP AMP
Rev&Bell
&Shunt
Detector
Port P
Transformer
DIAL &
DC Loop &
CPC
Detector
nBELDET[ڳ]
nLOOP[ڳ]
Serge
EMC
nREVDET][ڳ]
nCPCDET[ڱ]
SHUNT[ڱ]
SHUNT[ڱ]
nCPCDET[ڲ]
SHUNT[ڲ]
SHUNT[ڲ]
nCPCDET[ڳ]
SHUNT[ڳ]
SHUNT[ڳ]
A[4:0]
D[7:0]
ASIC
(CIDAك
NCS0
NWR
NRST
NRD
+2.5V
+2.5V
nRES
DIN
C_CS[0]
DHW[0]
UHW[0]
CLK
FH
nWR
nRD
nRES
T/R[8]
T/R[9]
T/R[10]
T/R[11]
T/R[12]
T/R[13]
T/R[14]
T/R[15]
+15V
+5V
+3.3V
+2.5V
Connector
fr
om
Main
boa
rd
(CO
L
L
ine)
Connect to
Control & Power line
connector
C_CS[3]
DOUT
OP AMP
T/R [11:8]
DEC_AD
A[5]
OSI
OSI
Not
Mounted
Not
Mounted
T/R [15:12]
Connector
fr
o
m
Main
Main
Boa
rd(
Contr
Contr
o
l
&
power
power
L
in
e
)
4MCLK+15V
KX-TDA6381
Sub Board
Brock Diagram
Sub Board
Brock Diagram
8
KX-TDA6381X/KX-TDA6381SX
4.2.
Circuit Operations
4.2.1.
Description of Control System Circuits
4.2.1.1.
Reset
On startup, releasing the ASIC reset is executed by EC_nRST through MPR.
After releasing the ASIC, the local reset signal should be sent to CODEC by releasing the soft rest from MPR, and CODEC fac-
tor should be downloaded from MPR.
After releasing the ASIC, the local reset signal should be sent to CODEC by releasing the soft rest from MPR, and CODEC fac-
tor should be downloaded from MPR.
• LED operational state display LED (2 colors)
Red ON: Fault (includes RESET)
Green ON: INS (line free)
Green flash (60/sec): INS (line busy)
Red flash (60/sec): OUS
OFF: the power section failure
Green ON: INS (line free)
Green flash (60/sec): INS (line busy)
Red flash (60/sec): OUS
OFF: the power section failure
4.2.1.2.
Local Highway Interface
Packs 2.048, 4.096, 8.192 MHz highway (Max.64 timeslot). (voice communication bus in the circuit board)
The PCM data of arbitrary streams 0~15 (128 timeslot / 1 stream) on the CT bus can switch to the arbitrary local highway (64
timeslot) by the local TSW.
The timeslot configuration example of the local highway is shown below.
Timeslots between slot 8 and slot 15 are used by the Sub Board.
The PCM data of arbitrary streams 0~15 (128 timeslot / 1 stream) on the CT bus can switch to the arbitrary local highway (64
timeslot) by the local TSW.
The timeslot configuration example of the local highway is shown below.
Timeslots between slot 8 and slot 15 are used by the Sub Board.
Slot
PCM Data
Slot
PCM Data
Slot
PCM Data
0
CO#1
16
Not used
32-63
Not used
1
CO#2
17
Not used
2
CO#3
18
Not used
3
CO#4
19
Not used
4
CO#5
20
Not used
5
CO#6
21
Not used
6
CO#7
22
Not used
7
CO#8
23
Not used
8
CO#9
24
Not used
9
CO#10
25
Not used
10
CO#11
26
Not used
11
CO#12
27
Not used
12
CO#13
28
Not used
13
CO#14
29
Not used
14
CO#15
30
Not used
15
CO#16
31
Not used
Software reset
EC_nRST
IC3
Reset IC
IC4
+5V
+3.3V
+3.3V
+3.3V
(Green)
LED
(Red)
P22
P23
nHALT
U1-1/2
Q3
System reset in ASIC
E
C
B
U
S
C
B
U
S
LPR reset
ASIC
RST
LED
CPU
IC401
nlRQ0
nRES
9
KX-TDA6381X/KX-TDA6381SX
4.2.1.3.
ASIC...IC3
• EC bus Interface
16bit/8MHz two-way address data multiplex self-bus (communication bus with MPR)
• CT bus Interface
Supports eight of 8.192MHz highway (128 timeslot) (voice communication bus with MPR)
• Local TSW
Timeslot switching between CT bus (1024ch) and local highway (64ch)
(Timeslot switching between the voice communication bus in MPR and that in the circuit board)
(Timeslot switching between the voice communication bus in MPR and that in the circuit board)
• Local Gain Control
Gain control of the local highway up-down 64ch by 1dB/step randomly
• GPIO Interface
A parallel interface that can be set in random interactively
Refer to IC3 (ASIC) (P.60).
Refer to IC3 (ASIC) (P.60).
Host-EC
bridge
(slave)
CT_IF
Local
TSW
Host
Local-bus I/F
DPLL
JTAG
GAIN
Internal Highway
Internal bus
System bus
APT
controller
HDLC
8ch
FIFO/
DPRAM
DPT
controller
Local
Highway I/F
PT
DR/RV
GPIO
CODEC
Controller
RT_SND
CS-IF
Local
Bus
EC
CT
Highway
PT-I/F
GPIO-i/f
CS-I/F
10
KX-TDA6381X/KX-TDA6381SX
4.2.1.4.
8-Port Sub Board
8-Port Sub Board is mounterd to Main Board.
DT_OE[15]
DT_OE[11]
DT_OE[13]
DT_OE[12]
DT_OE[14]
DT_OE[8]
DT_OE[9]
DT_OE[8-15]
D[0-7]
DT_OE[10]
DT_OE[13]
DT_OE[15]
LA[0-5]
DT_OE[9]
R[14]
R[15]
R[8]
R[10]
R[9]
R[11]
R[13]
R[12]
T[8]
DT_OE[8]
LA[1]
LA[2]
LA[5]
D[0]
D[1]
D[2]
D[3]
D[4]
D[5]
D[6]
D[7]
LA[4]
LA[0]
LA[3]
DT_OE[12]
T[9]
T[10]
T[11]
T[12]
T[13]
T[14]
T[15]
DT_OE[11]
DT_OE[14]
DT_OE[10]
OPT[1]
DG
DG
CLK
FH
DHW
UHW
C_CS[2]
C_CS[3]
DCLK
DIN
DOUT
DG
+5V
nRD
CLK
nWR
nCS_CID[1]
nRST
11
19
31
17
18
49
57
22
56
28
52
21
51
48
55
2
1
47
3
29
30
59
34
33
53
23
4
45
60
17
25
27
15
13
19
26
54
6
5
7
38
3
9
32
12
8
8
13
CN8
5
24
20
46
50
16
43
40
58
39
7
10
15
41
11
42
14
36
35
6
37
9
12
44
CN2
12
34
CN2
9
CN2
10
35
37
CN2
11
36
CN2
13
38
CN2
14
39
CN2
15
40
CN2
16
41
5
6
7
8
5
6
7
8
CN6
1
2
14
16
18
4
10
20
J1I
J1J
J1K
J1L
J1M
J1N
J1O
J1P
SFG
+3.3V
+2.5V
DG
TH1I
TH1J
TH1K
TH1L
TH1M
TH1N
TH1O
TH1P
+15V
DG
C
928
C
929
C
930
C
931
SFG
C9
1
C9
0
RA
6
R
A
5
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