Panasonic KX-TDA100DUP Service Manual ▷ View online
13
KX-TDA100DUP
5.2.3.2.
Detail of Block Description
• CPU block
Configuration: IC5(CPU), IC8 (reset IC), IC6 (spread clock IC), X2 (CPU source clock), X1 (clocking clock) etc.
Function: (IC10)
Generates the select signal in accordance with the memory map and operates read/write of data between each peripheral.
Controls the DMA transfer between USB I/F or built-in serial controller and memory.
Operates input/output control of each I/O signal in accordance with the program.
Contains the built-in clock function (battery backup) with the source clock X1 (32.768 kHz).
(IC8)
Monitoring the power voltage, it generates a reset signal when the voltage drops under the constant value (2.9Vtyp) or when
the reset switch is pressed down.
(IC6)
To reduce unnecessary radiation, it generates the clock with the constant blurring mainly X2 clock output (16.384 MHz).
Function: (IC10)
Generates the select signal in accordance with the memory map and operates read/write of data between each peripheral.
Controls the DMA transfer between USB I/F or built-in serial controller and memory.
Operates input/output control of each I/O signal in accordance with the program.
Contains the built-in clock function (battery backup) with the source clock X1 (32.768 kHz).
(IC8)
Monitoring the power voltage, it generates a reset signal when the voltage drops under the constant value (2.9Vtyp) or when
the reset switch is pressed down.
(IC6)
To reduce unnecessary radiation, it generates the clock with the constant blurring mainly X2 clock output (16.384 MHz).
Description of the Signal on MPR
• ASIC block
• ASIC block
Configuration: IC10 (ASIC), IC13, X2 and so on.
Function: (IC10)
Functions as the bus master of EC bus (synchronous bus with 16 bit width, transmission rate max.10Mbps). Communicates
with ASIC mounted to each option card via EC bus and controls the option card.
Controls CT bus (HW clock 8.192MHz, 8 highway, 128 timeslot) for TSW function.
(A detailed description of TSW will be added later.)
Controls the conference call for 3 people x ~8 parties ~ 8 people x ~3 parties.
Generates single and DTMF tone in any highway and timeslot.
Provides the digital gain control function by data conversion.
Provides some I/O ports for CODEC channel pulse generation, modem encoding rule setting and music on hold switching and
is controlled by CPU.
Function: (IC10)
Functions as the bus master of EC bus (synchronous bus with 16 bit width, transmission rate max.10Mbps). Communicates
with ASIC mounted to each option card via EC bus and controls the option card.
Controls CT bus (HW clock 8.192MHz, 8 highway, 128 timeslot) for TSW function.
(A detailed description of TSW will be added later.)
Controls the conference call for 3 people x ~8 parties ~ 8 people x ~3 parties.
Generates single and DTMF tone in any highway and timeslot.
Provides the digital gain control function by data conversion.
Provides some I/O ports for CODEC channel pulse generation, modem encoding rule setting and music on hold switching and
is controlled by CPU.
• Memory block
Configuration: IC202, IC203 (SRAM), IC204 (FlashROM), IC205, IC206 (SDRAM), IC200, IC201 (logic IC) and so on.
Function: (IC202, IC203)
Saves the user configuration data (such as key assign data per PT).
This memory is battery backup.
(IC204)
Saves (some of) the system boot program and the system data.
(IC205, IC206)
The main program is loaded from the SD card on the system start-up.
Used as the program area and the CPU work area after start-up.
Makes a direct bus connection to CPU due to high-speed action (bus clock 66MHz).
(IC200, IC201)
Generates each memory select signal from the memory area select signal and upper address. Generates the write signal and
upper/lower byte select signal.
Function: (IC202, IC203)
Saves the user configuration data (such as key assign data per PT).
This memory is battery backup.
(IC204)
Saves (some of) the system boot program and the system data.
(IC205, IC206)
The main program is loaded from the SD card on the system start-up.
Used as the program area and the CPU work area after start-up.
Makes a direct bus connection to CPU due to high-speed action (bus clock 66MHz).
(IC200, IC201)
Generates each memory select signal from the memory area select signal and upper address. Generates the write signal and
upper/lower byte select signal.
• USB block
Configuration: IC108 (USB I/F), X101 (source clock: 12.000MHz), CN133 (USB connector) etc.
Function: Connects to the USB host system (mainly PC) via CN133 (B type connector) as a USB device and makes data
transfer by max.11Mbps. DMA function of CPU is utilized to transfer the data.
Function: Connects to the USB host system (mainly PC) via CN133 (B type connector) as a USB device and makes data
transfer by max.11Mbps. DMA function of CPU is utilized to transfer the data.
• SD card block
Configuration: IC103 (SD card I/F), IC104 (32.768MHz), CN132 (SD card connector) and so on.
Function: Loads the main program and the system data from the SD card connected to CN132 by 10Mbps. Restores the sys-
tem data periodically.
Function: Loads the main program and the system data from the SD card connected to CN132 by 10Mbps. Restores the sys-
tem data periodically.
• DPT block
Configuration: Parts of circuit numbers 400-499, 500-599, 600-699, 700-799 and IC10
Function: the control of feed and communication to each circuit is performed on the DPT interface of the IC10 (ASIC). Only a
connectable DPT and CS operable at +40V can be used.
Function: the control of feed and communication to each circuit is performed on the DPT interface of the IC10 (ASIC). Only a
connectable DPT and CS operable at +40V can be used.
• RS-232C block
Configuration: IC20, CN135
Function: connected to a PC or printer via IC20 (driver/receiver), CN135 (D-SUB connector).
Function: connected to a PC or printer via IC20 (driver/receiver), CN135 (D-SUB connector).
• MOH/PAGING block
Configuration: IC301, IC302 (CODEC), IC306, IC307 (OP Amp), IC308 (Melody IC), Q304~Q307 (transistor), CN300 (RJ45)
etc.
Function: The external music on hold 1 is input from CN300 and is A/D converted in IC301 via AGC (Auto Gain Control) circuit,
which consists of IC307, Q305, Q307 and other CR, and then is connected to the call line HW. Likewise the external music on
etc.
Function: The external music on hold 1 is input from CN300 and is A/D converted in IC301 via AGC (Auto Gain Control) circuit,
which consists of IC307, Q305, Q307 and other CR, and then is connected to the call line HW. Likewise the external music on
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KX-TDA100DUP
hold 2 is input from CN300 and is made A/D conversion in IC302 via AGC (Auto Gain Control) circuit, which consists of IC306,
Q304, Q306 and other CR, and then is connected to the call line HW. The external music on hold 2 and IC308 is exclusively
connected to IC302 input (by software control).
The various tones & DTMF tone and the voice data generated in IC102 (ASIC) are made D/A conversion in IC301 and IC302.
They are output via CN300 respectively.
Q304, Q306 and other CR, and then is connected to the call line HW. The external music on hold 2 and IC308 is exclusively
connected to IC302 input (by software control).
The various tones & DTMF tone and the voice data generated in IC102 (ASIC) are made D/A conversion in IC301 and IC302.
They are output via CN300 respectively.
• Power Supply block
Configuration: IC300 (DC/DC converter), IC304 (1.8V regulator), IC303 (1.9V regulator), IC305 (OP Amp), Q300, Q301 (tran-
sistor), L301, C308, D302~D304, BAT300, F300 (FUSE) and so on.
Function:
+15V input is made step-down to +3.3V by DC/DC converter circuit that consists of IC300, L301, Q301 and C308, and is sup-
plied to each IC power. Also, it monitors +3.3V output voltage and turns ON Q300 to block +15V input when over voltage is
supplied.
+3.3V generated in DC/DC converter is converted to 1.8V IC304 and supplied to IC5 core power, and also is converted to 1.9V
in IC303 via the back-flow prevention diode D302 and supplied to IC5 clock block power.
BAT300, which is a lithium battery for memory backup, is connected to the power supply of IC202, IC203 (SRAM) via D303,
D304.
IC305 compares BAT300 output voltage to the reference voltage (about 2.8V) and drives LED (BATALM) that indicates drop-
ping of backup voltage.
sistor), L301, C308, D302~D304, BAT300, F300 (FUSE) and so on.
Function:
+15V input is made step-down to +3.3V by DC/DC converter circuit that consists of IC300, L301, Q301 and C308, and is sup-
plied to each IC power. Also, it monitors +3.3V output voltage and turns ON Q300 to block +15V input when over voltage is
supplied.
+3.3V generated in DC/DC converter is converted to 1.8V IC304 and supplied to IC5 core power, and also is converted to 1.9V
in IC303 via the back-flow prevention diode D302 and supplied to IC5 clock block power.
BAT300, which is a lithium battery for memory backup, is connected to the power supply of IC202, IC203 (SRAM) via D303,
D304.
IC305 compares BAT300 output voltage to the reference voltage (about 2.8V) and drives LED (BATALM) that indicates drop-
ping of backup voltage.
5.3.
Back Board Circuit Operation
The back board (BB) connects signals between all cards in main unit. It also supplies power from the power supply unit (PSU) to
the cards.
CONNECTORS EXPLANATION
(1) Power Supply Unit Connector: CN100
(2) Free Slot Connectors: CN101-CN107
(3) DMPR Card Connector: CN112
(4) LED Connector: CN114
CN114 is connected to LED Board on the product.
the cards.
CONNECTORS EXPLANATION
(1) Power Supply Unit Connector: CN100
(2) Free Slot Connectors: CN101-CN107
(3) DMPR Card Connector: CN112
(4) LED Connector: CN114
CN114 is connected to LED Board on the product.
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KX-TDA100DUP
5.4.
Line-System Circuit
5.4.1.
PT Interface
• DPT data communications
Bch/Dch/Cch data is transmitted from the DTL/DTH terminal of ASIC, and the AMI-converted pulse signal is output to DPT
(between D1 and D2) by way of the driver U403 and the pulse transformer T400. The Bch/Dch/Cch data transmitted from DPT is
input to the DR terminal of ASIC by way of the pulse transformer T400 and R411. ASIC compares VREF+ and VREF- with the
input waveform, and receives a valid pulse.
Do the same for the 2nd to 4th ports (circuit numbers 500-599, 600-699, 700-799)
(between D1 and D2) by way of the driver U403 and the pulse transformer T400. The Bch/Dch/Cch data transmitted from DPT is
input to the DR terminal of ASIC by way of the pulse transformer T400 and R411. ASIC compares VREF+ and VREF- with the
input waveform, and receives a valid pulse.
Do the same for the 2nd to 4th ports (circuit numbers 500-599, 600-699, 700-799)
• Bch communications
Communicated by the PCM data (64kbps x 2) connected from the local highway by ASIC.
Used mainly for the audio signal of DPT.
Used mainly for the audio signal of DPT.
• Dch communications
Communicated by the data (16kbps) protocol-converted by the HDLC controller in ASIC.
Used mainly for the control signal of DPT.
Used mainly for the control signal of DPT.
• Cch communications
Communicated by the data (8kbps) converted by the serial/parallel-converting circuit in ASIC.
Used mainly for recognizing the terminal model.
Used mainly for recognizing the terminal model.
• PT current-supply circuit
+40V is superimposed on the transmit/receive data line (D1, D2), and fed to PT. Supply voltage is and +40V for new DPT. It will
be switched after the connected PT is judged through communications. I/O control is as follows.
be switched after the connected PT is judged through communications. I/O control is as follows.
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KX-TDA100DUP
For the protection against such as an over current owing to short in wiring, +40V, 20mA and 80mA constant-current circuits by
Q400, U402, R408, and R410 are used.
The following is the flow chart of telephone switching at boot-up.
Do the same for the 2nd to 4th ports (circuit numbers 500-599, 600-699, 700-799)
Q400, U402, R408, and R410 are used.
The following is the flow chart of telephone switching at boot-up.
Do the same for the 2nd to 4th ports (circuit numbers 500-599, 600-699, 700-799)
PT_POW
PT_CUR
H
H
0V
H
L
0V
L
H
40V80mA
L
L
40V20mA
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