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5

PRI BLOCK

PRI30/E1 I/F

NUMBER OF PORT

PRI30/E1 : 30 PORTS

Transfer rate

PRI30/E1 : 2.048Mbit/s

Line code

PRI30/E1 : HDB3

Framing

PRI30/E1 : CRC-Multiframe or SMF(Sub Multiframe)

PRI FRAMER IC

Lantiq PEF2256H VER.2.2

DPLL

Build-in IC

Line i/f circuit

Main frontend parts

 Pulse trans

 Surge protector

 EMC filter

 Termination : 120



 RJ45 connecter

Line SYNC

Line SYNC clock Freq. : 2.048MHz

CNG Detection

Channel

2ch

device

DSPG DE56K

DTMF Receiver/Generator
 (In-band Signaling Function)

Channel

30ch

Level
MFC-R2 

DTMF

Output : Programmable and variable in the range of -31 to 0dB
Detection : Programmable and variable in the range of -38 to 0dB
Output : Programmable and variable in the range of -12 to +3dB
Detection : Programmable and variable in the range of -42 to 0dB

device

TI TMS320VC540

LED

Line Status Display LED : 1

 - 

6

LUHW[3]

HighWay i/f

LDHW[3]
LDHW[4]

HWFH4

HWCLK4

HWFH5

HWCLK5

CPU i/f

LD[7:0]

LA[11:0]

etc

CN501

[60pin]

CN500

[60pin]

PLD

IC506

Card ID

FALC56

IC501

LDHW4_PLD

HWCLKFHO[0]

Trans

Tx  2.4:1

Rx     1:1

3.3V

RJ45

JK501

LUHW[4]

TI-DSP

IC502

DSPG

IC505

HWCLKFHO[6]

HWCLKFHO[1]

HWCLKFHO[5]

HWCLKFHO[2]

HWCLKFHO[3]
HWCLKFHO[4]

LDHW3_PLD[0]

LDHW3_DSP

INT_MISC[2]

INT_MISC[3]

INT_MISC[1:0]

RL1/RL2

XL1/XL2

7

The reference point of the line interface on the PRI30/E1 card is Point S/T (Point U is not supported.) and the external and inter-
nal line modes are supported as operating mode.
Also, the PRI30/E1 cards employ the PRI-IC (IC501) as the IC for Interface. Shows the characteristics of the PRI-IC.
See the PRI-IC data sheet for detailed specifications.

Characteristics of the PRI-IC

This card has the local highway at 2.048Mbps rate and local TSW in order to switch the talk channel (Bch), which is extracted
from ISDN primary rate by PRI-IC (IC501).
Shows the highway timing.

Item

Contents

Remarks

Line Extraction Clock

2.048MHz

 

DPLL

Low Jitter DPLL for clk generation 

 

Elastic Buffer

Programmable elastic buffer (Rx & Tx)

 MAX  512kbit

Signaling Controller

• HDLC Controller 
• CAS Controller
• Multiframe synchronization and synthesis ITU-T G.732 

 

FIFO

64Byte x 2

 

PCM Highway Interface

2.048Mbps Highway Interface

 

P-Interface

8bit parallel Bus (Intel)

bit0

bit1

bit2

bit3

bit0

bit1

bit2

bit3

bit255

bit255

bit0

bit1

bit2

bit3

8

A reset to devices(IC501, IC502 and IC505) in this card is controlled by reset signals from PLD(IC506). 
Shows the reset schematic diagram.

This card is supplied +3.3V power through the SMT connector (CN501) via Base card.

The PCM data of arbitrary streams (128 timeslot / 1 stream) on the bus can switch to the arbitrary local highway (64timeslot) by the
local TSW.

96

PRI30#1/PRI23_FSDL/LCOT#7

112

PRI30#16/PRI23#16

97

PRI30#2/PRI23#1/LCOT#8

113

PRI30#17/PRI23#17

98

PRI30#3/PRI23#2/LCOT#9

114

PRI30#18/PRI23#18

99

PRI30#4/PRI23#3/LCOT#10

115

PRI30#19/PRI23#19

100

PRI30#5/PRI23#4/LCOT#11

116

PRI30#20/PRI23#20

101

PRI30#6/PRI23#5/LCOT#12

117

PRI30#21/PRI23#21

102

PRI30#7/PRI23#6/BRI#1_B1

118

PRI30#22/PRI23#22

103

PRI30#8/PRI23#7/BRI#1_B2

119

PRI30#23/PRI23#23

104

PRI30#9/PRI23#8/BRI#2_B1

120

PRI30#24/PRI23#24(DCH)

105

PRI30#10/PRI23#9/BRI#2_B2

121

PRI30#25

106

PRI30#11/PRI23#10/BRI#3_B1

122

PRI30#26

107

PRI30#12/PRI23#11/BRI#3_B2

123

PRI30#27

108

PRI30#13/PRI23#12/BRI#4_B1

124

PRI30#28

109

PRI30#14/PRI23#13/BRI#4_B2

125

PRI30#29

110

PRI30#15/PRI23#14/DoorPhone#3

126

PRI30#30

111

PRI23#15//DoorPhone#4

127

reserve

FLAMER (IC501)

TI DSP (IC502)

DSPG (IC505)

PLD (IC506)

RESET command by sofware

nRESET_FALC56

nRESET_DSPG

nRESET_TI-DSP