Panasonic KX-NS0290CE Service Manual ▷ View online
7
KX-NS0290CE
4 Technical Descriptions
4.1.
Block Diagram
SLC2 BLOCK
+15V
VBATL
VHR
DC/DC
Ringer
and
T/R Voltage
DC/DC
+3.3V
PRI BLOCK
RJ45
LED X 5
SERR RAI AI SYNC DLK
LOOPBACK
RELAY
TRANS.
TX 2.4 : 1
RX 1 : 1
PEF2256H
Ver.2.2
SCLKR / SCLKX
SYPR / SYPX
RDO
XDI
CLK
SYNC
A0-7
D0-7
/CS
/WR
/RD
/RES
nINT0
MCLK
+3.3V
GND
GND
RL1/RL2
XL1/XL2
OSC(16.384MHz)
HW_CLK (2MHz)
HW_FH
UHW
DHW
DHW
SLC
/INT1
Reset IC
NET_REF
RJ45
SLIC
2CH
PEF4365
SERIAL I/F
PCM HIGHWAY : 4MHz
/RESET0
/RESET1
/INT0
CODEC
2CH
PEB3265
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KX-NS0290CE
4.2.
Circuit Operation (PRIBlock)
4.2.1.
ISDN Primary Rate Interface Function
4.2.1.1.
Line Interface Outline
The reference point of the line interface on the PRI30 card is Point S/T (Point U is not supported.) and the external and internal
line modes are supported as operating mode.
Also, the PRI23/PRI30 cards employ the PRI-IC (IC501) as the IC for Interface. See the "Line Interface Block" or the outline of
the interface connection. Shows the characteristics of the PRI-IC.
See the PRI-IC data sheet for detailed specifications.
line modes are supported as operating mode.
Also, the PRI23/PRI30 cards employ the PRI-IC (IC501) as the IC for Interface. See the "Line Interface Block" or the outline of
the interface connection. Shows the characteristics of the PRI-IC.
See the PRI-IC data sheet for detailed specifications.
Characteristics of the PRI-IC
4.2.1.2.
Line Interface Loopback
This card has a relay for loopback test on the primary side of the line to cut and divide into the line failure or the PBX's own fail-
ure, when there is a defect in operation.
Shows The outline diagram of the line interface loopback.
ure, when there is a defect in operation.
Shows The outline diagram of the line interface loopback.
Outline diagram of the line interface
4.2.2.
Local Highway Interface Function
This card has the local highway at 2.048Mbps rate and local TSW in order to switch the talk channel (Bch), which is extracted
from ISDN primary rate by PRI-IC (IC501).
Also, the highway assignment is different for that the number of Bch differs in 2.048M system and 1.544M system. Shows the
highway timing.
For more information, see PRI-IC (IC501) databook.
from ISDN primary rate by PRI-IC (IC501).
Also, the highway assignment is different for that the number of Bch differs in 2.048M system and 1.544M system. Shows the
highway timing.
For more information, see PRI-IC (IC501) databook.
Highway timing
Item
Contents
Remarks
Line Extraction Clock
2.048MHz
DPLL
Low Jitter DPLL for clk generation
Elastic Buffer
Programmable elastic buffer (Rx & Tx)
MAX 512kbit
Signaling Controller
• HDLC Controller
• CAS Controller
• Multiframe synchronization and synthesis ITU-T G.732
• CAS Controller
• Multiframe synchronization and synthesis ITU-T G.732
FIFO
64Byte x 2
PCM Highway Interface
2.048Mbps Highway Interface
µP-Interface
8bit parallel Bus (Intel)
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KX-NS0290CE
4.3.
Circuit Operation (SLC2Block)
4.3.1.
Description of Functions and Circuits (SLC)
4.3.1.1.
CODEC Function (IC602)
Infineon(Lantiq) PEB3265 CODEC is installed. The analogue features such as BN, frequency characteristic, volume level, sidetone
are configured by FPGA CODEC interface DCLK, CS, DOUT, DIN. Also, it converts A/D to D/A, and 4-line-analogue signal to PCM
code in G.711 format.
are configured by FPGA CODEC interface DCLK, CS, DOUT, DIN. Also, it converts A/D to D/A, and 4-line-analogue signal to PCM
code in G.711 format.
4.3.1.2.
2W-4W Conversion
It converts 4W-VOX signal used in the PBX to 2W-VOX signal used in SLT, and vice versa. It consists of an operational amplifier in
the SLIC and a balanced network (B/N) in the CODEC. It can control the return loss of the audio data and frequency characteristics.
By modifying the CODEC program, it can match the corresponding impedance.
the SLIC and a balanced network (B/N) in the CODEC. It can control the return loss of the audio data and frequency characteristics.
By modifying the CODEC program, it can match the corresponding impedance.
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KX-NS0290CE
4.3.1.3.
DTMF Signal Detection
Each port has its own DTMF receiver in the codec.
Detection of DTMF signal by Codec transmits this data to the MPR via the NS_MAIN.
Via the FPGA, MPR reads the DTMF signal which is received in the Codec.
Detection of DTMF signal by Codec transmits this data to the MPR via the NS_MAIN.
Via the FPGA, MPR reads the DTMF signal which is received in the Codec.
4.3.1.4.
Power Supply
Voltage and current generated by the SLIC is supplied to the phones.
Preset voltage is -52V.
Current is set as 26mA.
Preset voltage is -52V.
Current is set as 26mA.
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