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The reference point of the line interface on the PRI30 card is Point S/T (Point U is not supported.) and the external and internal
line modes are supported as operating mode.
Also, the PRI23/PRI30 cards employ the PRI-IC (IC301) as the IC for Interface. See the "Line Interface Block" or the outline of
the interface connection. Shows the characteristics of the PRI-IC.
See the PRI-IC data sheet for detailed specifications.

Characteristics of the PRI-IC

This card has a relay for loopback test on the primary side of the line to cut and divide into the line failure or the PBX's own fail-
ure, when there is a defect in operation.
Shows The outline diagram of the line interface loopback.

Outline diagram of the line interface

Item

Contents

Remarks

Line Extraction Clock

2.048MHz/PRI30

 

DPLL

Low Jitter DPLL for clk generation (IC302)

 

Elastic Buffer

Two-frame elastic buffer (Rx & Tx)

 

Signaling Controller

• HDLC Controller 
• CAS Controller
• Multiframe synchronization and synthesis ITU-T G.732 etc.

 

FIFO

64Byte x 2     128Byte x 3

 

PCM Highway Interface

2.048Mbps highway Interface

 

µP-Interface

8bit parallel Bus (Intel/Motorola)

Used Intel Mode for PRI30 Card.

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This card has the local highway at 2.048Mbps rate and local TSW in order to switch the talk channel (Bch), which is extracted
from ISDN primary rate by PRI-IC (IC301), to H.100 interface. (ASIC (IC2) internal module)
Also, the highway assignment is different for that the number of Bch differs in 2.048M system and 1.544M system. Shows the
highway timing.
For more information, see the ASIC (IC2) specification and PRI-IC (IC301) databook.

Highway timing

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This card transmits and receives data between itself and MPR (EC bus) in a dual port RAM communication basically.
Shows the diagrammic illustration.

DPRAM Communication diagrammic illustration

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A reset to CPU (and the device under the control of CPU) in this card is dominant in a reset from the main frame (MPR), and
normally it is only available for software command reset or hardware reset using ASIC (IC2) from MPR. The power on reset cir-
cuit in this card is for the reset of ASIC in a hot plug
Shows the reset class of PRI23/PRI30 card, and shows the reset schematic diagram

Reset Class

A reset schematic diagram

Reset Type

The way of Reset

Specification

Reset to ASIC (IC2) 

OR condition of the following Reset

L active

Power on reset

Reset by the reset IC 
Reset IC specifications
Power Supply voltage: 3.3V
Reset voltage: 2.9V
Reset delay time: 50msec

Over 10msec

Hardware reset from the EC bus

Reset by EC_RST

Over 10msec 

Software reset from the EC bus

Cancel after a given length of time

16cycles after EC_CLK about 2usec

Reset to CPU (IC1)

Software reset from the EC bus

ASIC local reset register control

L  active Over 10msec (up to stable
PLL)

Reset to Flash

Software reset from the EC bus

Same as the reset to LPR

L active Over 500nsec 

Reset to PRI_IC (IC301)

Software reset from the LPR

ASIC port P2[0] control

L active Over 20

µmsec