Panasonic KX-NCP1188XJ Service Manual ▷ View online
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KX-NCP1188XJ
4.4.2.
DSP Peripheral Interface
The function of the DSP shown in Table 5.5 is processed through the PCM highway. The PCM highway is connected with a local
highway (2.048Mbps) of the ASIC (IC2) through the McBSP(Multi-Channel Buffered Serial Port) and the control system is con-
nected with the CPU (IC1) local bus through the HPI-8 (Host Port Interface) of the DSP.
See the DSP Data Sheet for the detailed specifications of the McBSP and the HPI-8.
highway (2.048Mbps) of the ASIC (IC2) through the McBSP(Multi-Channel Buffered Serial Port) and the control system is con-
nected with the CPU (IC1) local bus through the HPI-8 (Host Port Interface) of the DSP.
See the DSP Data Sheet for the detailed specifications of the McBSP and the HPI-8.
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KX-NCP1188XJ
4.5.
Local Highway Interface Function
This card has the local highway in the speed of 2.048Mbps and local TSW (ASIC (IC2) internal module) to switch from the call
channel (Bch) extracted from E1 line by the E1-IC (IC302), to H.100 interface.
As the switching function inside the DSP is used for the in-band signaling detection by the DSP (IC303), there is no assignment
directly on the local highway map, but the operation is synchronized with the local highway in timing.
channel (Bch) extracted from E1 line by the E1-IC (IC302), to H.100 interface.
As the switching function inside the DSP is used for the in-band signaling detection by the DSP (IC303), there is no assignment
directly on the local highway map, but the operation is synchronized with the local highway in timing.
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KX-NCP1188XJ
4.6.
EC BUS Interface
4.6.1.
Dual Port RAM (DPRAM) Communication
This card transmits and receives data between CPU (IC1) and MPR (EC bus) in a dual port RAM communication basically.
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KX-NCP1188XJ
4.7.
Outline of Reset System
4.7.1.
Reset Operation
A reset to CPU (IC1) (and the device under the control of CPU (IC1)) in this card is dominant in a reset from the main frame
(MPR), and normally it is only available for software command reset or hardware reset using ASIC (IC2) from MPR. The power
on reset circuit in this card is for the reset of ASIC (IC2) in a hot plug.
(MPR), and normally it is only available for software command reset or hardware reset using ASIC (IC2) from MPR. The power
on reset circuit in this card is for the reset of ASIC (IC2) in a hot plug.
Reset Type
The way of Reset
Specification
Reset to ASIC (IC2)
OR condition of the following Reset
L active
Power on reset
Reset by the reset IC
Reset IC specifications
Power Supply voltage : 5V
Reset voltage : 4.5V
Reset delay time : 50msec
Reset IC specifications
Power Supply voltage : 5V
Reset voltage : 4.5V
Reset delay time : 50msec
Over 10msec
Hardware reset from the EC bus
Reset by EC_RST
Over 10msec
Software reset from the EC bus
Cancel after a given length of time
16cycles after EC_CLK about 2usec
Reset to LPR (CPU (IC1))
Software reset from the EC bus
ASIC (IC2) local reset register control
L active Over 10msec (up to stable
PLL)
PLL)
Reset to Flash
Software reset from the EC bus
Same as the reset to CPU (IC1)
L active Over 500nsec
Reset to E1-IC (IC302)
Software reset from the CPU (IC1)
ASIC (IC2) port P2[0] control
L active Over 1
µmsec
Reset to DSP (IC303)
Software reset from the CPU (IC1)
ASIC (IC2) port P2[1] control
L active Over 50
µmsec
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