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Model
KX-NCP1170XJ (serv.man2)
Pages
52
Size
2.05 MB
Type
PDF
Document
Service Manual
Brand
Device
PBX / 4-PORT DIGITAL HYBRID EXTENSION CARD
File
kx-ncp1170xj-sm2.pdf
Date

Panasonic KX-NCP1170XJ (serv.man2) Service Manual ▷ View online

5
     KX-NCP1170XJ
3 Specifications
4 General/Introduction
4.1.
General Description
This card, which is used in the free slot of the NCP system, can randomly connect four of SLT, DPT, and APT. 
In DPT connection, the XDP function allows SLT to be connected to each port in parallel.
Functional Block
Functional contents
Extension Interface
Number of Ports
4 ports
PT Interface
+40V/+15V Over current protective function, Voltage switching function Inter-
APT communications
D (Upward: 0.25kbps, Downward: 0.69kbps)
2W Ping-pong transmission system (31.25kbps)
Inter-DPT communications, Inter-CS (TDA0141) communications (from ver.1.1)
2B+D (144kbps) 2W Ping-pong transmission system (512kbps)
Dch-control HDLC embeds eight channels in ASIC
Surge protective function
SLT Interface
+30V 30mA Feeding function
Dial-pulse signal detecting function
DTMF signal detecting function
Bell signal issuing function
Hook detecting function
Ring trip detecting function
2W/4W converting function
Surge protective function
Infineon-manufactured 4ch codec function
CODEC function
µ/A Iaw switching function
Test function (Loop back, Tone generation)
Programmable digital filtering function
Serial interface function
PIO function
DTMF Receiver
4 lines for each port
Extension Caller ID
Supported standard 
ITU-TV.23 (1200bps) FSK
BELL202 (1200bps) FSK
On-board Ringer
20/25Hz 75Vrms
Phase control (Three-phase / Four-phase)
On-board DC/DC Power Supply
Input +15V
Output +15V, +5V, +3.3V
Power Failure Forwarding Function
1 lines supported
ASIC
EC bus interface function
CT bus interface function, Digital PLL function
Local bus interface function
Time switch function, Gain controlling function, DPRAM function
Private telephone controlling interface function
Parallel IO function
SRAM
128kbyte
LED Display Circuit
Card status indicating LED: Two colors (Red/Green)
External Interface Connector
Extension interface
RJ45: 4port
Power failure forwarding RJ45: 1port
6
KX-NCP1170XJ
5 Technical Descriptions
5.1.
Block Diagram
KX-NCP1
170XJ BLOCK DIAGRAM
BACK BOARD
C
u
rr
ent
Li
mi
tter
+5
V
Dr
iv
e
r
&
Re
c
e
iv
e
r
+3
.3
V
PO
W
E
R
SEL
Pu
ls
e
T
rans
for
m
e
r
Se
rg
e
EM
C
+
40V
+1
5
VPT
P
o
rt#1
PT
 I
/F
DR[0]
DT
H[0]
D
T
L[0]
D1
A
D1
B
P
T
 CUR[O
]
PT
 PO
W
[O
]
Se
rg
e
EM
C
TA
RA
Be
ll R
e
la
y
O
PEAM
P
D
C
 F
eedi
ng(
+
40V
)
DC F
eedi
ng(
G
N
D
)
Hook-Det
&
Ri
ngtr
ip-Det
Be
ll
Re
la
y
 Dr
iv
e
r
DT
M
F
RE
C
1/4
P
o
rt#2
P
o
rt#3
P
o
rt#4
S
a
m
e
 as"Port#1".
SLT I
/F
nT
O
E
[0
]
ST
D
[0
]
n
H
OOK
[0
]
B
E
LL[
0]
DO
UT
DI
N
DCL
K
CS
DRA
DRB DX
A
DX
B
PC
L
K
MC
L
K
nR
E
S
+1
5
VPT
+
15V
+
40V
H
W
C
L
K([
1
]
CP
[0
]
nC
S
[1
]
V
R
EF
+
V
R
EF-
nB
R
E
Q
nB
A
C
K
L_n
R
S
T
nW
R
nR
D
LA
[12:
0]
L
D
[7
:0
]
M
O
D
E
[5
:0
]
P
O
[7
:0
]
n
R
ESET
P
LLC
LK
nA
LE
DI
N
DO
UT
DCL
K
C_
CS
[0
]
FH
HW
C
L
K
[0
]
LD
H
W
[0
]
LU
H
W
[0
]
P
3
[3
:0
]
P
4
[3
:0
]
P
5
[3
:0
]
P
2
[5
:4
]
RX[
3
:0
]
E
C
_C
LK
E
C
_A
D
[15:
0
]
EC
_
P
A
R
EC
_
F
R
A
M
E
E
C
_
T
RDY
EC
_
S
T
O
P
EC
_
BE[
1
:0
]
EC
_
PER
R
EC
_
IN
T
EC
_
ID
SEL
EC
_
N
R
S
T
CT
_
N
E
T
RE
F
CT
_
F
RA
M
E
_
A
C
T
_C
8_A
C
T
_
D
[7
:0
]
On-B
oar
d
R
inger
nW
R
nR
D
nC
S
A
[16:
0]
D
[7:
0]
1M
IC202
RAM
CP
[0
]
A
[4:
0]
D
[7:
0]
IC600
ASI
C
(C
ID
)
nW
R
nR
D
nR
E
S
VR
E
F
CO
NT
nR
E
S
J
U
M
PER
R
ESET IC
IC106
XT
A
L
16.
38
4
MH
z
LA
T
C
H
A
[0:
4]
A
[13:
1
7
]
J
U
M
PER
TDE[
3
:0
]
D
T
L[
3:
0]
nC
S
2
R
inger
 (
75V
rm
s
)
C_
CS
[0
]
DH
W
[0
]
IC300
CO
DE
C
PEB
2466
IC100
ASI
C
(T
ACKER)
D [
3
:0
]
UH
W
[0
]
CL
K
FS
C
FH
R
ESET
EC
_
D
ET
C
T
_
C
B_
A
RI
N
G
E
R
HW
C
L
K
HW
C
L
K
NC
S
1
HW
C
P
NW
R
NR
S
T
NR
D
UH
W
[1
]
nC
S
[1
]
XT
AL
4.096MH
z
UH
W
D
P
T
_
P
O
W
[3
:0
]
DR[
3
:0
]
P
1
[3
:0
]
D
T
H
[3:
0]
nCS-D
M
A
DR
IV
E
R
DR
IV
E
R
P2
2
P2
3
+3
.3
V
DR[
1
]
DT
H
[1
]
D
T
L[
1]
PT
_
P
O
W
[1
]
PT
_
C
U
R
[1
]
ST
D
[1
]
D
[3:
0]
D
[3:
0]
n
H
OOK
[1
]
B
E
LL[
1]
DR[
2
]
DT
H
[2
]
D
T
L[
2]
PT
_
P
O
W
[2
]
PT
_
C
U
R
[2
]
ST
D
[2
]
D
[3:
0]
n
H
OOK
[2
]
B
E
LL[
2]
DR[
3
]
DT
H
[3
]
D
T
L[
3]
PT
_
P
O
W
[3
]
PT
_
C
U
R
[3
]
ST
D
[3
]
D
[3:
0]
n
H
OOK
[3
]
B
E
LL[
3]
D
R
[3:
0
]
D
T
H
[3:
0]
D
T
L[
3:
0]
P2
0
MO
D
E
4
P
O
[7
:0
]
J
U
M
PER
8
DC
/D
C
DC
/D
C
DC
/D
C
DC
/D
C
+
40V
+
15V
20H
z
/25H
z
 S
ignal
P
5
[7
:4
]
P
T
_
C
U
R
[3
:0
]
+2.5V
DC
/D
C
DC
/D
C
S
a
m
e
 as"Port#1".
S
a
m
e
 as"Port#1".
7
     KX-NCP1170XJ
5.2.
Circuit Operation
5.2.1.
Control-System Circuit
5.2.1.1.
IC100 (ASIC)
• EC bus interface
Independent bus for 16bit/8MHz two-way address data multiplex.
• CT bus interface
Supports eight 8.192MHz highways (128 time slots).
• Local TSW
Exchanges the time slots between CT bus (1024ch) and local highway (64ch).
• Local highway interface
Accommodates 2.048, 4.096, and 8.192MHz highways (Up to 64 time slots).
• Local gain control
Controls the gain of the local highway up-and-down 64ch in 1db step arbitrarily.
• Local TSW
Exchanges the time slots between CT bus (1024ch) and local highway (64ch).
• Local gain control
Controls the gain of the local highway up-and-down 64ch in 1db step arbitrarily.
• PT interface
Allows APT/DPT interface to be selected for each port.
• CODEC interface
Can connect up to four Infineon-manufactured PEB2466, and is intended for enabling the line control.
• GPIO interface
Parallel interface that is arbitrarily programmable bidirectionally.
• Time slot structure
The following is the time slot structure of the local highway on NCP1170.
8
KX-NCP1170XJ
5.2.2.
Line-System Circuit
5.2.2.1.
PT Interface
• APT data communications
Control data is transmitted from the DTL terminal of ASIC, then is output to APT (between D1 and D2) by way of the driver U5
and the pulse transformer T1.
The control data transmitted from APT is input to the DR terminal of ASIC by way of the pulse transformer T1 and R13. ASIC
compares VREF+ with the input waveform, and receives a valid pulse.
• DPT data communications
Bch/Dch/Cch data is transmitted from the DTL/DTH terminal of ASIC, and the AMI-converted pulse signal is output to DPT
(between D1 and D2) by way of the driver U5 and the pulse transformer T1. The Bch/Dch/Cch data transmitted from APT is input
to the DR terminal of ASIC by way of the pulse transformer T1 and R13. ASIC compares VREF+ and VREF- with the input wave-
form, and receives a valid pulse.
• Bch communications
Communicated by the PCM data (64kbps Å~ 2) connected from the local highway by ASIC.
Used mainly for the audio signal of DPT.
• Dch communications
Communicated by the data (16kbps) protocol-converted by the HDLC controller in ASIC.
Used mainly for the control signal of DPT.
• Cch communications
Communicated by the data (8kbps) converted by the serial/parallel-converting circuit in ASIC.
Used mainly for recognizing the terminal model.
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