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127

This scanner has 2 CISs (CIS (F), CIS (B)) to scan image signals for front and back sides respectively, in order to perform
duplex scanning. 
Both of them are available for duplex scanning in ADF mode. (When scanning on the Flatbed, only a CIS (F) is available.)

ASIC (F) (IC1011) requires SDRAMs (IC1015 to IC1018) to memorize and output pre-processed or post-processed
image data for the front side. 
And an additional memory (SO-DIMM) can be installed in CN1005 for image data-output.

ASIC (B) (IC1013) requires SDRAMs (IC1019 to IC1020) to memorize and output pre-processed or post-processed
image data for the back side. 
And an additional memory (SO-DIMM) can be installed in CN1006 for image data-output.

When a scanning starts, via CIS (F) RELAY Board, analog pixel signals scanned by CIS (F) are transmitted to 
AFEs (IC2009 to IC2012) on the CENTER Board.
At the same time, via CIS (B) RELAY Board, analog pixel signals scanned by CIS (B) are transmitted to AFEs
(IC2013 to IC2016) on the CENTER Board.

AFEs (IC2009 to IC2012) and AFEs (IC2013 to IC2016) converted the analog pixel signals to the digital.

The ASIC (F) (IC1011) receives front image signals from AFEs (IC2009 to IC2012) on the CENTER Board, and then
pre-processes them.
And the ASIC (B) (IC1013) receives back image signals from AFE (IC2013 to IC2016) on the CENTER Board, and then
pre-processes them.
(Pre-process means shading correction, line correction, and Dpi transformation.)

After finishing this, the ASICs (IC1011and IC1013) post-process the data into binary or compressed data,
and send it to the PC via USB Interface.
(Post-process means binary processing (simple binary, auto binary, dither, error diffusion), color, or gray scale
image processing (MTF, Color Correction, Gamma Correction, and others).)

128

SO-DIMM Soket

SO-DIMM Soket

（

Flat Cable

JK

1001

Buzzer

SW

LED

PANEL Board

CONTROL BoardCONTROL

Board

USB

129

1

1

+3.3VCPU

+3.3 V  (Non sleep)

2

2

+3.3VCPU

+3.3 V  (Non sleep)

3

3

FAN_ERR

Fan error

4

4

DOOR_OP

ADF door switch

5

5

FD_MCLK

Feed motor clock

6

6

CR_MCLK

Carriage motor clock

7

7

BUZZER

Buzzer

8

8

LED_GRN_L

LED(Green) enable (used at sleep only)

9

9

*M_CS7

CPU area 7 chip select

10

10

F_IN0ADCLK

Front Image0 digital data sampling clock 

11

11

F_AFE00[1]

Front Image#0 digital data[1]

12

12

F_AFE00[3]

Front Image#0 digital data[3]

13

13

GND

Ground

14

14

F_AFE00[6]

Front Image#0 digital data[6]

15

15

F_AFE00[8]

Front Image#0 digital data[8]

16

16

GND

Ground

17

17

F_AFE01[0]

Front Image#1 digital data[0]

18

18

F_AFE01[2]

Front Image#1 digital data[2]

19

19

F_AFE01[4]

Front Image#1 digital data[4]

20

20

F_AFE01[5]

Front Image#1 digital data[5]

21

21

F_AFE01[7]

Front Image#1 digital data[7]

22

22

F_AFE01[9]

Front Image#1 digital data[9]

23

23

GND

Ground

24

24

F_INDEN

Front Image digital data enable signal

25

25

F_AFE10[1]

Front Image#2 digital data[1]

26

26

F_AFE10[3]

Front Image#2 digital data[3]

27

27

GND

Ground

28

28

F_AFE10[6]

Front Image#2 digital data[6]

29

29

F_AFE10[8]

Front Image#2 digital data[8]

30

30

GND

Ground

31

31

F_AFE11[0]

Front Image#3 digital data[0]

32

32

F_AFE11[2]

Front Image#3 digital data[2]

33

33

F_AFE11[4]

Front Image#3 digital data[4]

34

34

F_AFE11[5]

Front Image#3 digital data[5]

35

35

F_AFE11[7]

Front Image#3 digital data[7]

36

36

F_AFE11[9]

Front Image#3 digital data[9]

37

37

SHATTER_F

Shatter signal of Front CIS

38

38

*DUPLEX

Back CIS exist

39

39

*SLEEP_HV

Sleep signal (+24 V , +14 V Sleep)

40

40

CPUD[9]

CPU data [9]

41

41

CPUD[11]

CPU data [11]

42

42

CPUD[13]

CPU data [13]

43

43

CPUD[15]

CPU data [15]

44

44

*M_HWR

CPU high bite write strobe

45

45

CPUA[0]

CPU address [0]

46

46

CPUA[13]

CPU address [13]

47

47

CPUA[15]

CPU address [15]

48

48

*IMP1_DET

(Not used)

49

49

+3.3VSLP

+3.3 V

50

50

+3.3VSLP

+3.3 V

51

51

+3.3VSLP

+3.3 V

52

52

+3.3VSLP

+3.3 V

53

53

SONIC_CLK

Clock for Double feed detector

130

54

54

DA_LD2

DA_Converter2 Load signal

55

55

DA_LD1

DA_Converter1 Load signal

56

56

EXIST_CLK(NC)

(Not used)

57

57

IMPCLK

Imprinter clock

58

58

AFE_SCLK

AFE serial data clock

59

59

*B_AFESEN

Back AFE enable signal

60

60

B_IN0ADCLK

Back Image0 digital data enable signal

61

61

B_AFE00[1]

Back Image#0 digital data[1]

62

62

B_AFE00[3]

Back Image#0 digital data[3]

63

63

GND

Ground

64

64

B_AFE00[6]

Back Image#0 digital data[6]

65

65

B_AFE00[8]

Back Image#0 digital data[8]

66

66

GND

Ground

67

67

B_AFE01[0]

Back Image#1 digital data[0]

68

68

B_AFE01[2]

Back Image#1 digital data[2]

69

69

B_AFE01[4]

Back Image#1 digital data[4]

70

70

B_AFE01[5]

Back Image#1 digital data[5]

71

71

B_AFE01[7]

Back Image#1 digital data[7]

72

72

B_AFE01[9]

Back Image#1 digital data[9]

73

73

GND

Ground

74

74

B_INDEN

Back Image digital data enable signal

75

75

B_AFE10[1]

Back Image#2 digital data[1]

76

76

B_AFE10[3]

Back Image#2 digital data[3]

77

77

GND

Ground

78

78

B_AFE10[6]

Back Image#2 digital data[6]

79

79

B_AFE10[8]

Back Image#2 digital data[8]

80

80

GND

Ground

81

81

B_AFE11[0]

Back Image#3 digital data[0]

82

82

B_AFE11[2]

Back Image#3 digital data[2]

83

83

B_AFE11[4]

Back Image#3 digital data[4]

84

84

B_AFE11[5]

Back Image#3 digital data[5]

85

85

B_AFE11[7]

Back Image#3 digital data[7]

86

86

B_AFE11[9]

Back Image#3 digital data[9]

87

87

SHATTER_B

Shatter signal of Back CIS

88

88

NC

(Not used)

89

89

+3.3VSLP

+3.3 V

90

90

+3.3VSLP

+3.3 V

91

91

GND

Ground

92

92

GND

Ground

93

93

MOT_ERR

Motor Error signal

94

94

*SLEEP_PWR

Sleep POWER (Power Board Sleep)

95

95

5VSLP

+5 V

96

96

CV_MCLK

Conveyor Motor Clock

97

97

*KEY

Key input

98

98

LED_RED

LED Red  enable

99

99

LED_GRN

LED Green  enable

100

100

NC

(Not used)

101

101

F_AFE00[0]

Front Image#0 digital data[0]

102

102

F_AFE00[2]

Front Image#0 digital data[2]

103

103

F_AFE00[4]

Front Image#0 digital data[4]

104

104

F_AFE00[5]

Front Image#0 digital data[5]

105

105

F_AFE00[7]

Front Image#0 digital data[7]

106

106

F_AFE00[9]

Front Image#0 digital data[9]

107

107

GND

Ground

108

108

F_AFE01[1]

Front Image#1 digital data[1]

109

109

F_AFE01[3]

Front Image#1 digital data[3]

110

110

GND

Ground

111

111

F_AFE01[6]

Front Image#1 digital data[6]

112

112

F_AFE01[8]

Front Image#1 digital data[8]