DOWNLOAD Panasonic UF-E1 / UF-E1CN (serv.man2) Service Manual ↓ Size: 8.76 MB | Pages: 127 in PDF or view online for FREE

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UF-E1 UF-E1CN (serv.man2)
Pages
127
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8.76 MB
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Service Manual / Other
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Device
Fax / INK JET
File
uf-e1-uf-e1cn-sm2.pdf
Date
PREV: Panasonic UF-E1 / UF-E1CN Service Manual

Panasonic UF-E1 / UF-E1CN (serv.man2) Service Manual / Other ▷ View online

UF-E1
33
3.3.
SYSTEM ASIC (DZAC000263)
3.3.1.
Block Diagram
CPU I/F
CSGA
CSMEM
CSFRIP
CSVROM
UBE
LBE
RDE
WRE
A1-A7,
A20,21
4
WAIT
D0-D15
9
IRQ0-IRQ3
16
DREQ0,1
2
DACK0,1
2
FRIP I/F
FSP
FSH
VSCK
VSEN
VSDA
VSYNC
VREQ
VMCLK
5
SHDAT0-SHDAT3
nSHDAT3
CIS I/F
FSP5V
CISLED
MOTOR I/F
FSH5V
SMT**
GPB5
(Ink Engine)
I/F
PWRKEY
PWRSW
HRES
HINIT
HSELIN
HSTB
HAUTOFD
HBUSY
HACK
HFAULT
HPERR
HSELECT
HCD0-HCD7
8
CENTRONICS
(Printer)
I/F
CINIT
CSELIN
CSTB
CAUTOFD
CBUSY
CACK
CFAULT
CPERR
PONRST
HCD0-HCD7
CDIR
SYSTEM I/F
5VON
SYSRST
CLOCK
CMCLK
XTAL
EXTAL
6
TEST
TEST
IOTST
RTEST
RTCCK
RTC I/F
RTCCS
RTCDT
PWM
PWM0,1
IO PORT
BUZVOL0,1,2
8
2
BUZZER
BZCK
RI
RINGER Det.
RING
3
3
IPO0-2
CSELECT
RESET
SYSRST
PONRST
CRSLT
CROSS POINT
I/F
CRSCK
CRSDA
UF-E1
34
3.3.2.
Pin Arrangement Table
No
I/O
Name
Output
IOL(mA)
Frequency
I/O Voltage
level
IO CELL
Load
capacity
Simultaneous
operation Gr
Note
1
P
HVDD
+5V
2
I
nCSTROB
+5V
HIBTP1
TTL/PUP
3
I
nCAUTFD
+5V
HIBTP1
TTL/PUP
4
I
nCINIT
+5V
HIBTP1
TTL/PUP
5
I
nCSELIN
+5V
HIBTP1
TTL/PUP
6
P
VSS
7
P
HVDD
8
O
nHRES
8mA
STATIC
+5V
HOD2T
100pF
OD
9
B
IOP4
8mA
STATIC
+5V
HBC2T
100pF
CMOS
10
O
nHSTROB
3mA
2MHz
+5V
HTB1T
30pF
3ST
11
P
VSS
12
P
HVDD
13
B
HDATA1
3mA
10MHz
+5V
HBT1P1T
30pF
A
TTL/PUP
14
B
HDATA2
3mA
10MHz
+5V
HBT1P1T
30pF
A
TTL/PUP
15
B
HDATA3
3mA
10MHz
+5V
HBT1P1T
30pF
A
TTL/PUP
16
B
HDATA4
3mA
10MHz
+5V
HBT1P1T
30pF
A
TTL/PUP
17
B
HDATA5
3mA
10MHz
+5V
HBT1P1T
30pF
A
TTL/PUP
18
B
HDATA6
3mA
10MHz
+5V
HBT1P1T
30pF
A
TTL/PUP
19
B
HDATA7
3mA
10MHz
+5V
HBT1P1T
30pF
A
TTL/PUP
20
B
HDATA8
3mA
10MHz
+5V
HBT1P1T
30pF
A
TTL/PUP
21
P
VSS
22
P
HVDD
23
I
nHACK
+5V
HIBTP1
TTL/PUP
24
I
pHBUZY
+5V
HIBTP1
TTL/PUP
25
I
pHPERR
+5V
HIBTP1
TTL/PUP
26
O
nHINIT
3mA
20KHz
+5V
HTB1T
30pF
3ST
27
I
pHSEL
+5V
HIBTP1
TTL/PUP
28
O
nHAUTFD
3mA
1MHz
+5V
HTB1T
30pF
3ST
29
I
nHFAULT
+5V
HIBTP1
TTL/PUP
30
O
nHSELIN
3mA
STATIC
+5V
HTB1T
30pF
3ST
31
B
pPWRKEY
8mA
STATIC
+5V
HBC2T
100pF
CMOS
32
P
VSS
33
P
LVDD
+3.3V
34
B
CD15
2mA
10MHz
+3.3V
LBC1T
60pF
B
CMOS
35
B
CD14
2mA
10MHz
+3.3V
LBC1T
60pF
B
CMOS
36
B
CD13
2mA
10MHz
+3.3V
LBC1T
60pF
B
CMOS
37
B
CD12
2mA
10MHz
+3.3V
LBC1T
60pF
B
CMOS
38
P
VSS
39
P
LVDD
+3.3V
40
B
CD11
2mA
10MHz
+3.3V
LBC1T
60pF
B
CMOS
41
B
CD10
2mA
10MHz
+3.3V
LBC1T
60pF
B
CMOS
42
B
CD9
2mA
10MHz
+3.3V
LBC1T
60pF
B
CMOS
43
B
CD8
2mA
10MHz
+3.3V
LBC1T
60pF
B
CMOS
44
P
VSS
45
P
LVDD
+3.3V
46
B
CD7
2mA
10MHz
+3.3V
LBC1T
60pF
B
CMOS
47
B
CD6
2mA
10MHz
+3.3V
LBC1T
60pF
B
CMOS
48
B
CD5
2mA
10MHz
+3.3V
LBC1T
60pF
B
CMOS
49
B
CD4
2mA
10MHz
+3.3V
LBC1T
60pF
B
CMOS
50
P
VSS
51
P
LVDD
+3.3V
52
B
CD3
2mA
10MHz
+3.3V
LBC1T
60pF
B
CMOS
53
B
CD2
2mA
10MHz
+3.3V
LBC1T
60pF
B
CMOS
54
B
CD1
2mA
10MHz
+3.3V
LBC1T
60pF
B
CMOS
55
B
CD0
2mA
10MHz
+3.3V
LBC1T
60pF
B
CMOS
56
P
VSS
57
P
LVDD
+3.3V
UF-E1
35
58
I
nWRE
+3.3V
LIBH
CMOSS
59
I
nRDE
+3.3V
LIBC
CMOS
60
I
nUBE
+3.3V
LIBC
CMOS
61
I
nLBE
+3.3V
LIBC
CMOS
62
P
VSS
63
P
LVDD
+3.3V
64
O
nWAIT
2mA
10MHz
+3.3V
LOB1T
30pF
CMOS
65
O
nCSVROM
2mA
10MHz
+3.3V
LOB1T
30pF
CMOS
66
O
nCSFRIP
2mA
10MHz
+3.3V
LOB1T
30pF
CMOS
67
I
nCSGA
+3.3V
LIBC
CMOS
68
I
nCSMEM
+3.3V
LIBC
CMOS
69
P
VSS
70
P
LVDD
+3.3V
71
I
CA21
+3.3V
LIBC
CMOS
72
I
CA20
+3.3V
LIBC
CMOS
73
I
CA7
+3.3V
LIBC
CMOS
74
I
CA6
+3.3V
LIBC
CMOS
75
P
VSS
76
P
LVDD
+3.3V
77
I
CA5
+3.3V
LIBC
CMOS
78
I
CA4
+3.3V
LIBC
CMOS
79
I
CA3
+3.3V
LIBC
CMOS
80
I
CA2
+3.3V
LIBC
CMOS
81
I
CA1
+3.3V
LIBC
CMOS
82
P
VSS
83
P
LVDD
+3.3V
84
O
nIRQ3
2mA
STATIC
+3.3V
LOB1T
30pF
CMOS
85
O
nIRQ2
2mA
STATIC
+3.3V
LOB1T
30pF
CMOS
86
O
nIRQ1
2mA
STATIC
+3.3V
LOB1T
30pF
CMOS
87
O
nIRQ0
2mA
STATIC
+3.3V
LOB1T
30pF
CMOS
88
P
VSS
89
P
LVDD
+3.3V
90
O
nDREQ2
2mA
10MHz
+3.3V
LOB1T
30pF
CMOS
91
O
nDREQ1
2mA
10MHz
+3.3V
LOB1T
30pF
CMOS
92
I
nDACK2
+3.3V
LIBC
CMOS
93
I
nDACK1
+3.3V
LIBC
CMOS
94
P
VSS
95
P
LVDD
+3.3V
96
O
nSHDAT3
2mA
1MHz
+3.3V
LOB1T
60pF
C
CMOS
97
O
pSHDAT3
2mA
1MHz
+3.3V
LOB1T
60pF
C
CMOS
98
O
pSHDAT2
2mA
1MHz
+3.3V
LOB1T
60pF
C
CMOS
99
O
pSHDAT1
2mA
1MHz
+3.3V
LOB1T
60pF
C
CMOS
100
O
pSHDAT0
2mA
1MHz
+3.3V
LOB1T
60pF
C
CMOS
101
P
VSS
102
P
LVDD
103
O
VSYNC
2mA
1MHz
LOB1T
30pF
CMOS
104
O
VMCLK
2mA
10MHz
LOB1T
30pF
CMOS
105
O
VREQ
2mA
1MHz
+3.3V
LOB1T
30pF
CMOS
106
I
VSDA
1MHz
+3.3V
LIBC
CMOS
107
I
VSEN
1MHz
+3.3V
LIBC
CMOS
108
I
VSCK
1MHz
+3.3V
LIBC
CMOS
109
I
FSH
1MHz
+3.3V
LIBC
CMOS
110
I
FSP
1MHz
+3.3V
LIBC
CMOS
111
P
VSS
112
P
HVDD
+5V
113
O
FSH5V
8mA
1MHz
+5V
HOB2T
100pF
CMOS
114
O
FSP5V
8mA
1MHz
+5V
HOB2T
100pF
CMOS
115
P
VSS
116
P
LVDD
+3.3V
117
B
pCISLED
6mA
STATIC
+3.3V
LBC2T
100pF
No
I/O
Name
Output
IOL(mA)
Frequency
I/O Voltage
level
IO CELL
Load
capacity
Simultaneous
operation Gr
Note
UF-E1
36
118
O
SMTPA
2mA
50KHz
+3.3V
LOB1T
30pF
119
O
SMTNA
2mA
50KHz
+3.3V
LOB1T
30pF
120
O
SMTTA
2mA
50KHz
+3.3V
LOB1T
30pF
121
O
SMTPB
2mA
50KHz
+3.3V
LOB1T
30pF
122
O
SMTNB
2mA
50KHz
+3.3V
LOB1T
30pF
123
O
SMTTB
2mA
50KHz
+3.3V
LOB1T
30pF
124
P
VSS
125
P
LVDD
+3.3V
126
I
RIIN
+3.3V
LIBH
CMOSS
127
O
PWM1
2mA
STATIC
+3.3V
LOB1T
100pF
CMOS
128
O
PWM0
2mA
STATIC
+3.3V
LOB1T
100pF
CMOS
129
O
BUZVOL2
2mA
STATIC
+3.3V
LOD1T
100pF
OD
130
O
BUZVOL1
2mA
STATIC
+3.3V
LOD1T
100pF
OD
131
O
BUZVOL0
2mA
STATIC
+3.3V
LOD1T
100pF
OD
132
P
VSS
133
P
LVDD
+3.3V
134
O
BUZOUT0
2mA
STATIC
+3.3V
LOB1T
100pF
CMOS
135
O
BUZOUT1
2mA
STATIC
+3.3V
LOB1T
100pF
CMOS
136
O
CRSCK
2mA
1MHz
+3.3V
LOB1T
30pF
CMOS
137
O
CRSDA
2mA
500KHz
+3.3V
LOB1T
30pF
CMOS
138
O
CRSLT
2mA
500KHz
+3.3V
LOB1T
30pF
CMOS
139
P
VSS
140
I
IP2
+3.3V
LIBHD1
CMOSS/PDW
141
I
IP1
+3.3V
LIBHD1
CMOSS/PDW
142
I
IP0
+3.3V
LIBHD1
CMOSS/PDW
143
I
nIOTST
+3.3V
ITST1
TEST PIN
144
I
nTEST
+3.3V
LIBHD1
CMOSS/PDW
145
I
nRTEST
+3.3V
LIBHD1
CMOSS/PDW
146
P
VSS
147
O
CMCLK
2mA
25MHz
+3.3V
LOB1T
60pF
CMOS
148
P
VSS
149
O
nSYSRST
6mA
STATIC
+3.3V
LOB2T
100pF
150
I
nPONRST
+3.3V
LIBH
151
P
VSS
152
I
XTAL
+3.3V
LLIN
153
P
LVDD
154
O
EXTAL
+3.3V
LLOT
155
P
VSS
156
B
RTCDT
2mA
250KHz
+3.3V
LBDC1T
30pF
OD
157
O
RTCCK
2mA
500KHz
+3.3V
LOB1T
30pF
CMOS
158
O
RTCCS
2mA
STATIC
+3.3V
LOB1T
30pF
CMOS
159
P
VSS
160
P
HVDD
+5V
161
O
p5VON
6mA
STATIC
+5V
HOD2T
100pF
OD
162
O
nCDIR
3mA
STATIC
+5V
HOB1T
60pF
CMOS
163
O
nCACK
3mA
2MHz
+5V
HOB1T
60pF
CMOS
164
O
pCBUZY
3mA
1MHz
+5V
HOB1T
60pF
CMOS
165
O
pCPERR
3mA
1MHz
+5V
HOB1T
60pF
CMOS
166
O
pCSEL
3mA
1MHz
+5V
HOB1T
60pF
CMOS
167
O
nCFAULT
3mA
1MHz
+5V
HOB1T
60pF
CMOS
168
B
CDATA1
3mA
10MHz
+5V
HBT1P1T
60pF
D
TTL/PUP
169
B
CDATA2
3mA
10MHz
+5V
HBT1P1T
60pF
D
TTL/PUP
170
B
CDATA3
3mA
10MHz
+5V
HBT1P1T
60pF
D
TTL/PUP
171
B
CDATA4
3mA
10MHz
+5V
HBT1P1T
60pF
D
TTL/PUP
172
B
CDATA5
3mA
10MHz
+5V
HBT1P1T
60pF
D
TTL/PUP
173
B
CDATA6
3mA
10MHz
+5V
HBT1P1T
60pF
D
TTL/PUP
174
B
CDATA7
3mA
10MHz
+5V
HBT1P1T
60pF
D
TTL/PUP
175
B
CDATA8
3mA
10MHz
+5V
HBT1P1T
60pF
D
TTL/PUP
176
P
VSS
No
I/O
Name
Output
IOL(mA)
Frequency
I/O Voltage
level
IO CELL
Load
capacity
Simultaneous
operation Gr
Note
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