DOWNLOAD Panasonic UF-590 / UF-790 / DX-600 / DX-800 Service Manual ↓ Size: 11.45 MB | Pages: 127 in PDF or view online for FREE

Model
UF-590 UF-790 DX-600 DX-800
Pages
127
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11.45 MB
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PDF
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Service Manual / Other
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Device
Fax
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uf-590-uf-790-dx-600-dx-800.pdf
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Panasonic UF-590 / UF-790 / DX-600 / DX-800 Service Manual / Other ▷ View online

13
Shading Correction Circuit
The Shading Correction Circuit, included in IC30, is provided to correct for reduction in LED lamp inten-
sity around the optical lens and LED lamp intensity distortion due to shading of each bit. This circuit
scans the white reference on the transmitting document plate immediately before the document reaches
the scanning position and writes a compensation value according to the distortion of the waveform, at
the time, into the S-RAM (IC31).When the actual picture signal is input, the circuit corrects the picture
signal shading, according to this compensation value. This shading is carried out for each page during 
transmission or copy.
Offset Control Circuit
The Offset Control Circuit consists of Q15, Q13, IC30 and IC28, and controls the black level of the CCD
output to be at 0V by using the input.
Picture Signal Binary Coding Correction Circuit
The Picture Signal Binary Coding Correction Circuit is included in IC30. It is used to obtain a binary cod-
ing signal which is a corrected picture and error diffused signal of a false halftone signal, which is
detected from a shaded picture signal.
CCD Output
ABC Circuit Output
R288
C175
R285
IC28, 1
IC28, 2
32
37
19
41
39
40
IC30
Control
Circuit
OS
DOS
0V
3V
0V
-5V
+5V
Q15
Q13
14
1.1.5
CCD Drive Clock Generator Circuit
This circuit is also contained in IC30. Its function is to generate FSG, FCK1, FCK2 and RS clock signals,
which are required for driving the CCD. These clock signals are generated by the system clock generator
circuit derived from the 4 MHz clock signal that is input to IC30. Its timing chart is shown below.The FR
clock supplied to the CCD is output from the RS of IC3. The RS clock of IC3 is derived from the FR clock of
IC30 [MN86075] generates the timing of the RS clock to drive the CCD.
FCK1
FCK2
RS
FSG
CCD
FR
RS
FCK1
FCK2
FSG
IC3
SHINE
IC30
86075
FR
15
1.1.6
Line Monitor Circuit
The Line Monitor Circuit consists of an operational DAA (The secondary side chip) and its peripheral 
circuits. Its function is to monitor the dial tone, DTMF tone, response signals, etc. over the speaker. It also 
sounds the output of the key touch tones, alarm tones, etc. from the panel CPU over the speaker. The 
Received Signals are output from DAA of Secondary circuit, and through Analog AGC, Electronic Volume, 
Amplifier and over the speaker.
The monitor tone from the phone line and the buzzer tone from the panel can be adjusted from the Control 
Panel.
Volume
Control
Circuit
(IC21)
Level Control
Circuit
(Q3)
(IC20, 2)
Speaker
Amplifier
(Q4,5)
Speaker
AGD
(+2.5VDC)
Line Monitor Signal
(from AGC Circuit)
Buzzer Clock
(from Control Panel Unit)
Buzzer Tone Switch
(from Output Port)
+
-
Line Monitor Circuit
Block Diagram
16
1.1.7
Transmit Motor Control Circuit
The transmit motor is a PM type, two-phase bi-polar motor. The stepping signal and chopping current con-
trol signals (pTAPH, pTBPH, pTA10, pTA11, pTB10 and pTB11) are sent to the chopper drive circuit, com-
prised of IC36, IC37 and its peripheral circuitry, from IC3 SHINE output port. The motor is powered by +24
VDC and is driven by a 1/2-phase excitation, and greater step division is provided by controlling the phase
circuit in steps (micro-step control).
Tx Stepper
Motor
Tx Motor Driver Circuit Block Diagram
SHINE
IC3
Motor
Driver
IC36
+24V
Motor
Driver
IC37
+24V
R371
R370
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