Panasonic CX-DH801W Service Manual ▷ View online
9.1. Main Block
IC203 : C1AB00001972
No.
Port
Description
I/O
(V)
1
VD33 1
IO power supply
P
3.3
2
XIN
X ´tal input (27MHz)
I
1.7
3
XOUT
X ´tal output (27MHz)
O
1.7
4
DCLK
System clock
I
1.7
5
MA[0]
DRAM address 0
O
0
6
MA[1]
DRAM address 1
O
0.8
7
MA[2]
DRAM address 2
O
0.8
8
MA[3]
DRAM address 3
O
1.6
9
VS33 1
IO GND
G
0
10
VD33 2
IO power supply
P
3.3
11
MA[4]
DRAM address 4
O
1.6
12
MA[5]
DRAM address 5
O
1.6
13
MA[6]
DRAM address 6
O
1.6
14
MA[7]
DRAM address 7
O
3.3
15
MA[8]
DRAM address 8
O
1.0
16
MA[9]
DRAM address 9
O
3.1
17
MA[10]
DRAM address 10
O
2.8
18
VS33 2
IO GND
G
0
19
VD33 3
IO power supply
P
3.3
20
MA[11]
DRAM address 11
O
0
21
/CAS
DRAM column address strobing
O
3.0
22
/CS0
DRAM chip selection 0
O
2.7
23
NC
No Connection
-
-
24
/RAS0
DRAM row address strobing 0
O
3.0
25
/RAS1
DRAM row address strobing 1
O
0
26
VSS 1
Internal core GND
G
0
27
VDD 1
Internal core power supply
P
2.1
28
/RAS2
DRAM row address strobing 2
O
0
29
/DOE
DRAM clock enable/output
enable
enable
O
3.3
30
/DWE
DRAM write enable
O
3.0
31
DB[0]
DRAM data 0
I/O
1.2
32
DB[1]
DRAM data 1
I/O
1.2
33
DB[2]
DRAM data 2
I/O
1.3
34
VS33 3
IO GND
G
0
35
VD33 4
IO power supply
P
3.3
36
DB[3]
DRAM data 3
I/O
1.3
37
DB[4]
DRAM data 4
I/O
1.3
38
DB[5]
DRAM data 5
I/O
1.0
39
DB[6]
DRAM data 6
I/O
1.1
40
DB[7]
DRAM data 7
I/O
1.5
41
DB[15]
DRAM data 15
I/O
1.7
42
DB[14]
DRAM data 14
I/O
1.6
43
VS33 4
IO GND
G
0
44
VD33 5
IO power supply
P
3.2
45
DB[13]
DRAM data 13
I/O
1.3
46
DB[12]
DRAM data 12
I/O
1.2
47
DB[11]
DRAM data 11
I/O
1.0
48
DB[10]
DRAM data 10
I/O
1.2
49
DB[9]
DRAM data 9
I/O
1.1
50
DB[8]
DRAM data 8
I/O
1.1
51
DSCK
DRAM clock
O
1.6
52
VS33 5
IO GND
G
0
53
VD33 6
IO power supply
P
3.3
54
DQM
Data IO mask
O
0
55
NC
No Connection
-
-
56
LA[20]
FROM address 20
O
0
57
LA[19]
FROM address 19
O
0
58
LA[18]
FROM address 18
O
0
59
LA[17]
FROM address 17
O
0
60
LA[16]
FROM address 16
O
0
61
VS33 6
IO GND
G
0
No.
Port
Description
I/O
(V)
62
VD33 7
IO power supply
P
3.3
63
LA[15]
FROM address 15
O
2.0
64
LA[14]
FROM address 14
O
1.3
65
LA[13]
FROM address 13
O
2.1
66
LA[12]
FROM address 12
O
2.6
67
LA[11]
FROM address 11
O
2.2
68
LA[10]
FROM address 10
O
0
69
LA[9]
FROM address 9
O
2.3
70
VSS 2
Internal core GND
G
0
71
VDD 2
Internal core power supply
P
2.1
72
LA[8]
FROM address 8
O
2.2
73
LA[7]
FROM address 7
O
2.4
74
LA[6]
FROM address 6
O
1.8
75
LA[5]
FROM address 5
O
1.5
76
LA[4]
FROM address 4
O
2.2
77
LA[3]
FROM address 3
O
2.0
78
VS33 7
IO GND
G
0
79
VD33 8
IO power supply
P
3.3
80
LA[2]
FROM address 2
O
2.0
81
LA[1]
FROM address 1
O
2.0
82
LA[0]
FROM address 0
O
2.0
83
NC
No Connection
-
-
84
NC
No Connection
-
-
85
NC
No Connection
-
-
86
VSS 3
Internal core GND
G
0
87
VDD 3
Internal core power supply
P
2.1
88
/LCS3
FROM chip selection
O
0
89
/WRLL
FROM write enable
O
3.3
90
/LOE
FROM output enable
O
0
91
LD[0]
FROM data 0
I/O
1.6
92
LD[1]
FROM data 1
I/O
1.6
93
LD[2]
FROM data 2
I/O
1.6
94
LD[3]
FROM data 3
I/O
0.9
95
VS33 8
IO GND
G
0
96
VD33 9
IO power supply
P
3.3
97
LD[4]
FROM data 4
I/O
1.2
98
LD[5]
FROM data 5
I/O
1.8
99
LD[6]
FROM data 6
I/O
1.5
100 LD[7]
FROM data 7
I/O
1.4
101 NC
No Connection
-
-
102 RBCK/TDMCLK Audio cereal clock input
I
1.6
103 RWS/TDMFS
Audio cereal frame sink input
I
1.6
104 VD33 PL
PLL power supply
P
3.3
105 VS33 PL
PLL GND
G
0
106 VREF/YUV1
Video DAC VREF/YUV1 output
I/O
1.3
107 COMP/YUV3
Video composite input/YUV3
output
output
I/O
2.1
108 RSET/YUV4
Input/YUV4 output for DAC
current regulation
current regulation
I/O
1.3
109 NC
No Connection
-
-
110 VDAC/YUV6
VDAC/YUV6 output
O
0
111 VDD33 DA
DA power supply
P
3.3
112 VS33 DA
DA GND
G
0
113 NC
No Connection
-
-
114 NC
No Connection
-
-
115 NC
No Connection
-
-
116 TWS
PLL audio frame sink
output/<setting>2
output/<setting>2
I/O
1.6
117 TSD0
PLL 0 audio serial data
outputs/<setting>0
outputs/<setting>0
I/O
1.6
118 TSD1/SEL PLL1 PLL one audio serial data
output/<setting>1
I/O
0
119 VS33 9
IO GND
G
0
120 TSD2
Two audio serial data outputs
I/O
0
121 NC
No Connection
-
-
9 TERMINALS DESCRIPTION
5
CX-DH801W
No.
Port
Description
I/O
(V)
122 MCLK
Clock for audio DAC
I/O
1.5
123 TBCK
Audio bit clock
O
1.6
124 SPD DOBM/SEL
PLL3
S/PDIF output/clock source
switch
switch
I/O
1.6
125 NC
No Connection
-
-
126 VD33 10
IO power supply
P
0
127 VS33 10
IO GND
G
3.3
128 HFMPW
High frequency module power
supply ON (H:ON)
supply ON (H:ON)
O
0
129 DVDSW
DVD/CD switch
O
0
130 STBY
Driver standby
O
3.3
131 IP2
Two DVD RAM rivet and bolt
header outputs
header outputs
I
0
132 IP1
One DVD RAM rivet and bolt
header output
header output
I
0
133 NC
No Connection
-
-
134 NC
No Connection
-
-
135 NC
No Connection
-
-
136 NC
No Connection
-
-
137 VSS 4
Internal core GND
G
0
138 VDD 4
Internal core power supply
P
2.1
139 TEXI
High-speed tracking error input
I
1.7
140 TESTAD
Test AD input
I
0
141 SBAD
Sub beam input
I
2.5
142 FEI
Foci error input
I
1.5
143 AVSS AD
ADC analog GND
G
0
144 CEI
Central error input
I
1.5
145 TEI
Tracking error input
I
1.5
146 RFRP
Radio frequency envelope input
I
0
147 AVDD3 AD
ADC analog power supply
P
3.3
148 VREF21
VREF 2.1V
O
2.1
149 VREF09
VREF 0.9V
O
0.9
150 VREF15
VREF 1.5V
O
1.5
151 IREF
PLL current control
I
1.2
152 AVDD3 DS
Data slice part analog power
supply
supply
P
3.3
153 IPIN
Data slice reversing input
I
1.5
154 RFIN
Radio frequency input (-)
I
0
155 RFIP
Radio frequency input (+)
I
1.5
156 DSSLV
Data slice output
O
1.5
157 AVSS DS
Data slice part GND
G
0
158 AVSS PL
PLL analog GND
G
0
159 PDOFTR1
PLL filter 1 output
O
1.5
160 FDO
PLL charge pump output
O
1.5
161 FTRPOI
PLL loop filter input
I
1.5
162 AVDD3 PL
PLL analog power supply
P
3.3
163 NC
No Connection
-
-
164 PLLFTR2
PLL loop filter 1 input
I
2.1
165 VREFO
PLL VREF
O
1.5
166 AWRC
AWRC DAC
I/O
1.9
167 AVSS DA
DAC analog GND
G
0
168 RFRPCTR
RFRP center
I/O
1.5
169 NC
No Connection
-
-
170 AVDD3 DA
Analog power supply in part
DAC
DAC
P
3.3
171 SPDRV
Spindle output
O
1.4
172 FDRV
Foci drive output
O
1.5
173 NC
No Connection
-
-
174 TRSDRY
Traverse drive output (-)
O
1.4
175 TRDRV
Tracking drive output
O
1.4
176 NC
No Connection
-
-
177 FG
FG input
I
1.6
178 NC
No Connection
-
-
179 SCSJ
Chip selection for radio
frequency setting
frequency setting
O
0
180 SDATA
Data I/O for radio frequency
setting
setting
I/O
2.2
181 SCLK
Clock output for radio frequency
setting
setting
O
3.3
No.
Port
Description
I/O
(V)
182 SDFCT
DF input
I
0
183 SLDC
Laser ON/OFF control
O
3.3
184 NC
No Connection
-
-
185 VD33 11
IO power supply
P
3.3
186 VS33 11
IOGND
G
0
187 NC
No Connection
-
-
188 NC
No Connection
-
-
189 CLAMP
Chakking completion
I
4.9
190 REST
Inner detection
I
3.3
191 BRK
TRV/LD motor brake
O
0
192 NC
No Connection
-
-
193 EAUX03
-
O
3.3
194 EAUX02
General purpose of controlling
by servo port 2
by servo port 2
I/O
3.3
195 EAUX01
Audio DAC D 1
I/O
3.3
196 EAUX00
Audio DAC D 0
I/O
0
197 VSS 5
Internal core GND
G
0
198 VDD 5
Internal core power supply
P
2.1
199 AUX0
FRAMI2C data
I/O
3.3
200 AUX1
FRAMI2C Crroc
I/O
3.3
201 ACK
I/F microcomputer
communication (ACK)
communication (ACK)
O
3.3
202 NC
No Connection
-
-
203 DATAOUT
I/F microcomputer
communication (DATAOUT)
communication (DATAOUT)
I
4.0
204 NC
No Connection
-
-
205 STRB
I/F microcomputer
communication (STRB)
communication (STRB)
I
0
206 NC
No Connection
-
-
207 /RESET
Reset input
I
3.3
208 VS33 12
IO GND
G
0
6
CX-DH801W
IC209 : C2BBFD000510
Pin
No.
Port
Description
I/O
(V)
1
CLMPIN
Clamping completion
I
0
2
ACCDET
ACC voltage detection
I
4.9
3
BATDET
BATT voltage detection
I
4.9
4
P.BRK
Parking brake input (L: Parking)
I
4.9
5
INT
Magazine insertion completion
(L:ON)
(L:ON)
I
5
6
REST
Inner detection SW input (L:ON)
I
3.3
7
TEST
TEST for treatment device
I
4.9
8
TEST C1
C1 for treatment device
I
4.9
9
AVSS
DGND
-
0
10 TEST C2
C2 for treatment device
O
4.9
11 ESS RST
IC203 DSP reset (L: Reset)
O
4.8
12 ACK
Dataacc from ESS
I
3.3
13 DATAIN
Data input from ESS
I
3.3
14 E INT
External interruption (L:ON)
I
0
15 PTDET
Elevator position detection
I
0
16 SCK
Serial clock
I
4.9
17 VDD1
Power supply (+5V)
-
4.9
18 SI
Serial output
O
4.9
19 SO
Serial input
I
4.9
20 TEST DATA
Direct access terminal
application for treatment device
application for treatment device
I/O
4.9
21 REQ
Data transmission demand
(L: Demand)
(L: Demand)
O
4.9
22 VPP
VPP when flash is rewritten
-
0
23 XT2(NC)
No Connection
-
-
24 XT1
DGND
-
0
25 RST
Reset (L: Reset)
I
4.9
26 X2
Selah lock (10.00MHz)
-
3.1
27 X1
Selah lock (10.00MHz)
-
2.5
28 VSS0
DGND
-
0
29 VDD0
Power supply (+5V)
-
4.9
30 MAGCONT
Magazine detection
effective/invalidity (H: Effective)
effective/invalidity (H: Effective)
O
4.9
31 PTON
Photo sensor ON/OFF (L:ON)
O
4.9
32 ELV FWD
Rise in elevator
O
0
33 ELV REV
Descent in elevator
O
0
34 SPD1/2
Switch of speed of elevator
(L: High speed)
O
4.9
35 LOD FWD
Loading M normal rotation
(L: Tray LOAD)
I/O
1.5
36 MCON
Mechanical control ON/OFF
(L:ON)
(L:ON)
I
0
37 VSS1
DGND
-
0
38 CLMPOUT
Clamping completion
O
4.9
39 STRB
Data strobing to ESS
O
4
40 EJECT
Eject
I
4.9
41 DATAOUT
Data output to ESS
O
4
42 MAGIN
Magazine detection
I
0
43 AVDD
Power supply (+5V)
-
4.9
44 AVREF
Power supply (+5V)
-
4.9
IC211 : C2BBGD000090
No.
Pin
Port
Description
I/O
(V)
1
VDD
Power supply (+5V)
-
4.9
2
GND
GND
-
0
3
VPP1
VPP when flash is rewritten
I
0
4
VDD
Power supply (+5V)
-
4.9
5
VDD
Power supply (+5V)
-
4.9
6
GND
GND
-
0
7
X1
Selah lock (10.00MHz)
-
2.1
8
X2
Selah lock (10.00MHz)
-
2.3
9
RESET
Reset (L: Reset)
I
4.7
10
GND
DGND
-
0
11
NC
No Connection
-
-
12
MCON
Mechanical control (L: Operation)
O
0
13
NC
GND
O
0
14
NC
GND
O
0
15
REQ
Data communication demand
(L: Demands)
I
4.9
16-22 NC
GND
O
0
23
MCRST
Mechanical riset output
(L: Reset)
(L: Reset)
O
4.9
24
PON
Power supply control
O
4.9
25
SO
Mechanical control
communication serial output
communication serial output
O
4.9
26
SI
Mechanical control
communication serial input
communication serial input
I
4.9
27
SCK
Mechanical control
communication clock output (at
flash rewritten : Input)
communication clock output (at
flash rewritten : Input)
I/O
4.9
28
NC
GND
O
0
29
NC
GND
O
0
30
NC
GND
-
0
31
NC
GND
-
0
32
GND
GND
-
0
33
VDD
Power supply (+5V)
-
4.9
34
REMO
-
O
5.0
35
NC
GND
O
0
36
CLK
Clock output for communication
O
4.8
37
REMO
Data input for communication
I
5.0
38
DATA
Data output for communication
O
4.3
39
IR
Remote control input
I
5.0
40
NC
GND
I
0
41
A/D
Changer 1/2 switch (H:1)
I
4.9
42
STB
Strobing output for
communication
communication
O
0
43
P.BRK
Parking brake input (H: Parking)
I
0
44
VIDEO CNT
Video control
O
4.9
45-56 NC
GND
O
0
57
BATDET
Battery voltage detection
I
4.8
58
ACCDET
ACC voltage detection
I
4.8
59-64 NC
GND
I
0
7
CX-DH801W
IC200 : C3ABPG000133
IC202 : C3GBBC000007
IC204 : C3FBMD000216
IC206 : C0DBEJG00001
IC208 : C0ABBB000220
IC210 : C0GBD0000010
10 IC BLOCK DIAGRAM
10.1. Main Block
8
CX-DH801W
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