Panasonic CQ-C1303NE Service Manual ▷ View online
9
BLOCK
DIAGRAM
5
CQ-
C1303
NE
IC601 : LC7237819D09
Re
f.
No
f.
No
.
Part No.
Part Name &
Description
Description
I/O(V)
FM(
V)
AM(V
)
CD(V
)
1
XIN
4.
5
MHz
X’tal
and
Connection
I
2.5
2
2
2.54 2.53
2
TEST2
GND connection
I
0
0
0
3
VREG
Bypass condenser
connected.
connected.
O
2.9
4
4
2.95 2.95
4
VSSCPU
GND connection
-
0
0
0
5
N.C.
(CDC_DATA)
(CDC_DATA)
None
-
-
-
-
6
N.C.
None
-
-
-
-
7
N.C.
(CDC_CLK)
(CDC_CLK)
None
-
-
-
-
8
CDC_REM_OU
T
T
CD changer Remote out
O
0
0
0
9
LCD_DO
LCD data output
I
5.2 5.21 5.21
10
LCD_DI
LCD data input
O
5.0
1
1
5.04 5.01
11
LCD_CLK
LCD clock
O
5.1
4
4
5.16 5.16
12
LCD_CE
LCD chip enable output
O
0.1
7
7
0.17 0.17
13
CD_DO
CD data output
I
5.3
6
6
5.38 3.9
14
CD_DI
CD data input
O
0
0
4.74
15
CD_CLK
CD clock
O
4.9
6
6
4.98 4.96
16
CD_CE
CD chip enable
O
0
0
1.57
17
CD_LM+
CD eject
O
0
0
0
18
CD_LM-
CD loading
O
0
0
0
19
CD_S/L
CD 24PIN connection
O
0
0
5.19
20
SUB_RDY
CD INTB1 connection
I
0.1
2
2
0.1
5.22
21
CD_INSW1
CD insert SW input
I
0.1 0.1
0.1
22
CD_SW2
CD MECHA SW2
I
5.1
5
5
5.7
0.1
23
CD_LIMIT_S
W
W
CD limit SW
I
0
0
5.17
24
CD_MUTE
CD Mute
I
5.3
3
3
5.35 5.35
25
CD_RST
CD reset
O
0
0
5.13
26
CD_DMUTE
CD_BATT
O
0
0
5.18
27
N.C.
(CDC_CNT)
(CDC_CNT)
None
-
-
-
-
28
N.C.
None
-
-
-
-
29
PANEL
Panel detect
I
5.2
1
1
5.22 5.22
30
N.C.
GND connection
I
0
0
0
31
N.C.
GND connection
I
0
0
0
32
N.C.
GND connection
I
0
0
0
33
N.C.
None
-
-
-
-
34
N.C.
None
-
-
-
-
35
N.C.
None
-
-
-
-
36
N.C.
None
-
-
-
-
37
N.C.
None
-
-
-
-
38
N.C.
None
-
-
-
-
39
VDDPORT
Power supply of PORT
-
5.1
7
7
5.19 5.19
40
VSSPORT
GND of PORT
-
0
0
0
41
N.C.
None
-
-
-
-
42
N.C.
None
-
-
-
-
43
N.C.
None
-
-
-
-
44
N.C.
None
-
-
-
-
45
N.C.
None
-
-
-
-
46
N.C.
None
-
-
-
-
47
N.C.
None
-
-
-
-
48
N.C.
None
-
-
-
-
49
PWR_CNT
Power control
O
5.1
5
5
5.17 5.17
50
AMP_CNT
Amp stand-by
O
5.1
5
5
5.17 5.17
Re
f.
No
f.
No
.
Part No.
Part Name &
Description
Description
I/O(V)
FM(
V)
AM(V
)
CD(V
)
51
AMP_MUTE
Amp mute
O
5.1
7
7
5.19 5.19
52
N.C.
None
-
-
-
-
53
SSC
Tuner
search
sensitivity change
O
0
0
0
54
AF_MUTE
AF mute
O
5.1
7
7
5.19 5.19
55
I2C_DATA
Electronic VOL data
O
5.1
7
7
5.19 5.19
56
I2C_CLK
Electronic VOL clock
O
5.1
7
7
5.19 5.19
57
ANT_CNT
Motor antena control
O
5.1
7
7
5.19 0
58
POWER_LED
Power LED
O
0.1
5
5
0.16 0.13
59
N.C.
None
-
-
-
-
60
N.C.
(
BZ_OUT )
None
-
-
-
-
61
N.C.
None
-
-
-
-
62
N.C.
None
-
-
-
-
63
N.C.
None
-
-
-
-
64
N.C.
None
-
-
-
-
65
N.C.
None
-
-
-
-
66
TEL_MUTE
External MUTE input
I
0
0
0
67
BATT
Battery detection
I
5.1
9
9
5.2
5.2
68
MODE_B
ROTARY B input
I
5.1 5.17 5.17
69
RDS_CLK
RDS clock
I
0
0
0
70
REM_IN
Remocon data input
I
5.1
2
2
5.14 5.12
71
MODE_A
ROTARY A input
I
5.1
6
6
5.17 5.16
72
N.C.
(CDC_STB)
(CDC_STB)
None
-
-
-
-
73
NC
None
-
-
-
-
74
MONO
Compulsion MONO ON
O
0
0
0
75
AM_MODE
AM change
O
8.1
9
9
0.13 8.24
76
FM_MODE
FM change
O
0.1
3
3
8.18 8.24
77
N.C.
GND connection
I
0
0
0
78
INIT_C
Initial value C
I
0
0
0
79
INIT_B
Initial value B
I
5.1
5
5
5.17 5.17
80
INIT_A
Initial value A
I
1.9
3
3
1.94 1.94
81
VSS
GND connection
-
0
0
0
82
RDS_DATA
RDS data
I
0
0
0
83
ST
FM stereo input
I
5.3
7
7
5.38 5.39
84
SD_FM/AM
Signal detection
I
3.3 3.28 0
85
N.C.
GND connection
I
0
0
0
86
RESET
Reset Input
I
5.2
(PW
R
OFF
)
(PW
R
OFF
)
5.2(
PWR
OFF)
PWR
OFF)
5.2(
EJEC
T)
EJEC
T)
87
ACC
Power supply
I
5.4 5.4
5.41
88
N.C.
GND connection
I
0
0
0
89
N.C.
GND connection
I
0
0
0
90
FM/AM_IFC
FM/AM IF input
I
1.4
6
6
1.47 0
91
N.C.
GND connection
I
0
0
0
92
SUBPD
None
-
-
-
-
93
VDDPLL
Power supply of PLL
-
5.1
8
8
5.19 5.2
94
N.C.
GND connection
I
0
0
0
95
OSC_FM/AM
FM/AM osc input
I
1.4
6
6
1.39 0
96
VSSPLL
GND connection
-
0
0
0
97
N.C.
None
-
-
-
-
10 TERMINALS DESCRIPTION
10.1. Main Block
6
CQ-C1303NE
Re
f.
No
f.
No
.
Part No.
Part Name &
Description
Description
I/O(V)
FM(
V)
AM(V
)
CD(V
)
98
EO1
PLL
phase
comparison
error output
O
1.9
3
3
2.02 0
99
TEST1
GND connection
I
0
0
0
10
0
0
XOUT
4.
5
MHz
X’tal
and
Connection
O
2.6
2
2
2.63 2.63
Note 1 :
Voltage measuerments are with respect to ground, with a
voltmeter (internal resistance : 10M ohms).
voltmeter (internal resistance : 10M ohms).
IC501:YEAMLC78691
Ref.
No.
Part No.
Part Name & Description
I/O
(V)
1
EFMIN
RF signal input port.
I
1.58
2
RFOUT
RF signal output port.
O
1.67
3
LPF
LPF
capacitor
connection port
for
RF
signal
DC
level
detection.
O
1.64
4
PHLPF
LPF
capacitor
connection port
for detection.
O
1.68
5
AIN
A signal input port.
I
1.66
6
CIN
C signal input port.
I
1.66
7
BIN
B signal input port.
I
1.66
8
DIN
D signal input port.
I
1.66
9
FEC
LPF
capacitor
connection port
for FE signal.
O
1.6
10
RFMON
LSI
build-in
analog
signal
monitor port.
O
1.64
11
VREF
VREF voltage output port.
O
1.66
12
JITTC
Capacitor connection
port
for
JIT detection.
O
0
13
EIN
E signal input port.
I
1.65
14
FIN
F signal input port.
I
1.66
15
TEC
LPF
capacitor
connection port
for TE signal.
O
1.57
16
TE
TE signal output port.
O
1.57
17
TEIN
TE signal input port for TES.
I
1.65
18
LDD
Laser
power
control
output
port.
O
3.27
19
LDS
Laser
power
detection
input
port.
I
0
20
AVSS
GND for analog.
_
0
21
AVDD
VDD for analog.
_
3.27
22
FDO
Focus
control
signal
output
port. D/A output.
O
1.65
23
TDO
Tracking control signal output
port. D/A output.
port. D/A output.
O
1.65
24
SLDO
Thread
control
signal
output
port. D/A output.
O
1.64
25
SPDO
Spindle
control signal
output
port. D/A output.
O
1.64
26
VVSS1
GND for build-in VCO.
_
0
27
PDOUT1
Phase
comparison output
port1
for build-in VCO control.
O
0
28
PDOUT0
Phase
comparison output
port0
for build-in VCO control.
O
0
29
PCKIST
PDOUT0
1
output
port
for
current setting.
I
1.07
30
VVDD1
VDD for VCO.
_
3.29
31
DMUTEB
DMUTEB (general) output port.
O
0
32
PUIN
PUIN (general) I/O port. (With
built-in
built-in
Pull-Up
resistance.
Turning off when reset)
I/O
0
33
DETECT
Detection signal output port.
O
0
34
FSEQ
Synchronous
signal
output
port.
It
becomes
¡§H”
when
Synchronous Idle detected from
O 0
O 0
the
EFM
signal
is
corresponding
to
Synchronous
Idle of internal generation.
35
C2F
C2 error signal output port.
O
0
36
DVDD
VDD for Digital.
_
3.29
37
DVSS
GND forDigital.
_
0
Ref.
No.
Part No.
Part Name & Description
I/O
(V)
38
DVDD18
VDD
capacitor
connection port
for digital circuit.
O
1.83
39
MONI0
Monitor port0.
O
0
40
MONI1
Monitor port1.
O
0
41
DVDD
VDD for Digital.
_
3.25
42
DVSS
GND forDigital.
_
0
43
CE
Host
IF:
Communication enable
signal input port.
I
0
44
CL
Host
IF:
Data
transfer
clock
input port.
I
3.56
45
DI
Host IF: Data input port.
I
0
46
DO
Host IF: Data output port (Nch
output) Pull-Up is necessary.
output) Pull-Up is necessary.
O
5.32
47
RESB
Reset
input
port.
Make
it
L”
when power ON.
I
0
48
INTB
Interrupt signal
output
port.
(Servo)
O
3.25
49
SUB_READY0 For
host
u-com
IF:
SUB-RDY
output.
(Nch
and
Pull-Up
resistance is necessary)
O
0
50
CD_MUTEO
General
I/O
port2.
(With
built-in
Pull-Up
resistance.
Turning off when reset)
I/O
5.31
51
LOW_BATI
General I/O port1
I/O
5.16
52
CONT
General I/O port0
I/O
0
53
OSCCNT
OSCOFF
control
port
.
Connected with 0V when Reset.
I
0
54
STREQ
Stream
data
demand
signal
output port.
I/O
0
55
STCK
Clock
input
port
for
stream
data.
I/O
0
56
STDATA
Stream data input port.
I/O
0
57
TEST1
Inputport
for
test.
Needed
connect with 0V1
I
0
58
DATA
Lch/Rch data output port.
O
0
59
DATACK
Clock output port.
O
0
60
LRSY
Lch/Rch clock output port
O
0
61
VVDD2
VDD for build-in VCO.
_
3.25
62
VPREF2
Built-in
VCO
oscillation
cooking
stove
setting
input
terminal.
I
3.25
63
VCOC2
Built-in
VCO
control
voltage
setting input port.
I
1.08
64
VPDOUT2
Output
port
for
built-in
VCO
control.
O
0.08
65
VVSS2
GNDfor
building
VCO.
Needed
connect with 0V.
_
0
66
DVDD18
VDD
capacitor
connection port
for digital circuit.
O
1.84
67
DVSS
GND for Digital system. Needed
connect with 0V.
connect with 0V.
_
0
68
DVDD
VDD for Digital system.
_
3.25
69
DOUT
Digital OUT output port. EIAJ
format.
format.
O
0
70
AMUTEB
AMUTEB (general) output port.
O
0
71
XVSS
GND
for
oscillation
circuit.
Needed connect with 0V.
_
0
72
XOUT
Connected
of
16.9344MHz
oscillation.
O
1.39
73
XIN
Connected
of
16.9345MHz
oscillation.
I
1.35
74
XVDD
VDD forOscillation circuit.
_
3.19
75
LCHO
L channel output port.
O
0
76
LRVDD
VDD for LR channel.
_
3.21
77
LRVSS
GND
for
LR
channel.
Needed
connect with 0V.
_
0
78
RCHO
R channel output port.
O
0
79
AVDD
VDD for analog .
_
3.27
80
SLCO
Slice
level
control
output
port.
O
1.6
7
CQ-C1303NE
10.2. Display Block
IC901 : YEAMLC75854W
Pin No.
Port
Descriptions
I/O
(V)
(V)
(V)
1-4
NC
No connection
-
-
5-39
SEG5-39
LCD segment
O
2.5
40-43
COM1-4
LCD common
O
2.5
44-49
KS1-6
Key data output
O
0.9
50-54
KI1-5
Key data input
I
0
55
TEST
(Connecting to ground)
-
0
56
VDD
+5V power supply
-
5.1
57
VDD1
Ground through capacitor
-
3.3
58
VDD2
Ground through capacitor
-
1.7
59
Vss
Ground
-
0
60
OSC
CR oscillator
-
3.9
61
DO
Key data output
O
4.4
62
CE
Chip enable
I
0
63
CLK
LCD clock
I
0
64
DI
LCD data input
I
0
8
CQ-C1303NE
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