LG 70LA8600-SA (CHASSIS:LJ34D) Service Manual ▷ View online
Digital Chip Total Pin : 491w/o Power
Tuner
DIF
TS (P)
System
Demux
Global Baseband
V/Q, DVB-T/C ISDB-T
H13A
H13D
Video Decoder
Multi-STD
HD Decoder
2D GFX
UARTx3
TS(P)
TS(P)
GBB AFE
1ch@30MHz
w/ PLL
DVB-CI/CI+
Analog Chip Total Pin : 183w/o Power
Digital Chip Total Pin : 491w/o Power
AtoDPin : 79
TS(S)
GPU Rogue Han
USB2.0x3
GPIO 136
TS(S)
SDRAM
(MCP)
Tuner
Audio DSP
Multi-STD
Audio Decoder
LX4 HiFi EP
SIF
AAD
(THAT)
Mu
x
S
W
I2S(External)
(Boda950)
Audio
JPG/PNG Decoder
TrustZone
So nd DSP
JPG Encoder
EMAC
SCI
SPIx2
I2Cx10
PHY
BTSC AFE
10b@18.432MHz
w/ PLL
1ch L/R
Audio-ADC
Video Encoder
1080p@30fps
USB3.0 x1
GPIOx136
I2S
S
Audio DAC (48KHz)
CPU
ARMCA9 Core
Dual 1.2GHz
32KBI$
32KBD$
1MB L2 $
Sound DSP
Clear Voice II
Perceptual
Volume Control
Slim SPK
DivX
Digital AMP
I2S
I2S(HPD)
CPU
64KB SRAM
48KB ROM
UART
OTP
Timer
eMMC
DMAC(8ch)
Timer
WDT
SRAM 16KB
Digital
Audio
24b@48KHz
Secure Engine
Audio DAC
(48KHz )
I2S
SW
CVBS(3ch)
CVBS AFE(2-ch)
12b@54MHz
CVBS-Out
DE
CVBS
Encoder
1MB L2 $
SW
3 h Vid
Bluetooth
SPDIF
CVD
Y/C
CVBS
Timer
BE
Audio
Output
MCU
CVBS DAC
5x1ch (1ch)
ux
D
S Combo
H
z)
MCU
Component(2ch)
Mux
10x3ch
LVDS
Tx
Audio PLL
w/ DCO
Source Mux
TN
R
De-interlacer
Main/Sub Scaler
H3D
VCR
SW
3ch Video
AFE
10b@148.5MHz
w/ LLPLL
LVDS
Rx
I2Cx1
H3D
FRC
SRE
PE1
OSD
LED
Output formatter
TC
O
N
Capture
Block
(3CH)
I2Cx1
HDMI
(1-Link)
HDMI
M
u
Vx
1/EPI/LV
D
(120
H
CPLL
DCO
x2
GPIOIx16
HDMI-Rx 1.4
(1-port PHY)
3D, ARC, 4kx2k
DDR3 PHY
DDR3 Controller
DDR3 PHY
DDR3 Controller
SPLL
DDR
PLL
DPLL
DDR
PLL
16
16
I2Cx1
HDMI
16
16
GPIOIx16
3. Data Path Diagram
4. Tuner
+B1(3.3V_S/P)_(1)
+1.8_TU
+3.3V_TU
+B2(3.3V_M)_(5)
+B3(1 8V M) (7)
+B4(3.3V_S)_(12)
+3.3V_D_Demode
/TU_RESET1
I2C_SCL6
I2C_SDA6
I2C_SDA6
T_Reset_(2)
TU_SCL_(3)
TU SDA (4)
+B3(1.8V_M)_(7)
+B5(1.8V_S)_(13)
H13
LG1154D
GPIO10
SCL5
SDA5
TU6704-*1
TDSW-B651F
TDSW A651F
TDSW A651F
TU_SDA_(4)
H13
LG1154AN
IF_P
FILTER
IF_N
TUNER_SIF
IF_AGC
J18 [IFAGC]
U17 [ADC_I_INP]
V17 [ADC_I_INN]
ADC_I_INP
ADC_I_INN
M_IF AGC_(9)
M_DIF(P)_(10)
M_DIF(N)_(11)
S SIF (6)
SDA5
TDSW-A651F
H18 [AAD_ADC_SIF]
V15 [CVBS_IN1]
_
TU_CVBS
+B6(1.23V_SD)_(30)
+3.3V_D_Demode
+1.23V_D_Demod
S_SIF_(6)
S_CVBS_(8)
TS2_Error_(45)
TS2_Sync_(46)
TS2 Valid (47)
+B7(3.3V_SD)_(32)
STPI1_ERR/GPIO55
STPI1_SOP/GPIO41
STPI1 VAL/GPIO40
FE_DEMOD3_TS_ERROR
FE_DEMOD3_TS_SYNC
FE_DEMOD3_TS_VAL
H13
LG1154D
_
_( )
TS2_MCLK_(48)
TS2_DATA_(49)
SD_Reset_(31)
SD_SCL_(34)
_
STPI1_CLK/GPIO42
STPI1_DATA/GPIO54
GPIO9
SCL3
/S2_RESET
I2C_SCL4
I2C SDA4
I2C SDA4
FE_DEMOD3_TS_CLK
FE_DEMOD3_TS_DATA[0]
FE_DEMOD3_TS_DATA[0]
SD_SDA_35)
SDA3
I2C_SDA4
4. Tuner
+B1(3.3V_S/P)_(1)
+1.8_TU
+3.3V_TU
+B2(3.3V_M)_(5)
+B3(1 8V M) (7)
+B4(3.3V_S)_(12)
+3.3V_D_Demode
/TU_RESET1
I2C_SCL6
I2C_SDA6
I2C_SDA6
T_Reset_(2)
TU_SCL_(3)
TU SDA (4)
+B3(1.8V_M)_(7)
+B5(1.8V_S)_(13)
H13
LG1154D
GPIO10
SCL5
SDA5
TU6704-*1
TDSW-K651F
TU_SDA_(4)
+B6(1.23V_SD)_(30)
+B7(3.3V_SD)_(32)
+3.3V_D_Demode
+1.23V_D_Demod
SDA5
H13
LG1154AN
H13
LG1154AN
TUNER_SIF
S SIF (6)
TS1_Error_(40)
TS1_Sync_(41)
TS1 V lid (42)
STPI0_ERR/GPIO44
STPI0_SOP/GPIO46
FE_DEMOD2_TS_ERROR
FE_DEMOD2_TS_SYNC
FE DEMOD2 TS VAL
H18 [AAD_ADC_SIF]
V15 [CVBS_IN1]
_
TU_CVBS
S_SIF_(6)
S_CVBS_(8)
TS1_Valid_(42)
TS1_MCLK_(43)
TS2_DATA_(49)
TS2_Error_(45)
TS2_Sync_(46)
TS2 Valid (47)
STPI0_VAL/GPIO45
STPI0_CLK/GPIO47
STPI0_DATA/GPIO43
STPI1_ERR/GPIO55
STPI1_SOP/GPIO41
STPI1 VAL/GPIO40
FE_DEMOD3_TS_ERROR
FE_DEMOD3_TS_SYNC
FE_DEMOD3_TS_VAL
FE_DEMOD2_TS_VAL
FE_DEMOD2_TS_CLK
FE_DEMOD2_TS_DATA[0]
FE_DEMOD2_TS_CLK
FE_DEMOD2_TS_DATA[0]
H13
LG1154D
TS2_Valid_(47)
TS2_MCLK_(48)
TS2_DATA_(49)
SD_Reset_(31)
SD_SCL_(34)
STPI1_VAL/GPIO40
STPI1_CLK/GPIO42
STPI1_DATA/GPIO54
GPIO9
SCL3
/S2_RESET
I2C_SCL4
I2C SDA4
I2C SDA4
FE_DEMOD3_TS_CLK
FE_DEMOD3_TS_DATA[0]
FE_DEMOD3_TS_DATA[0]
SD_SDA_35)
SDA3
I2C_SDA4
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