LG 65LA9650-UA (CHASSIS:LA34N) Service Manual ▷ View online
Main PCB
XXLA9700-NA
B ilt i C
H i ht SPK
W
f
XXLA9700-NA
Built-in Camera
Height SPK
Woofer
Power
From PSU
FRC B/D (ULTRA HD)
1
1
Main processor_Digital(LG1152D),
DDR Memory
DDR Memory
3
eMMC Memory
2
wifi
2
Main processor_analog(LG1152A)
4
3
4
Micom for Key/IR sensing
Audio AMP (50W)
Motion assy
Front Spk
2
5
HDMI switch
Local Key +IR
5
FRC PCB(ULTRA HD)
XXLA9700-NA
XXLA9700-NA
2
3
1
Video processor (LGE7410:URSA7),
DDR Memory
Flash Memory
DDR Memory
Flash Memory
Main B/D
1
3
2
Video processor Master (PA168),
DDR Memory
Flash Memory
DDR Memory
Flash Memory
Video processor Slave (PA168),
3
Power
From PSU
Module
Power
To Tcon
p
(
),
DDR Memory
Flash Memory
Flash Memory
H13 Block diagram
AUD
BB TP DATA
CVBS
DIF(P/N)
SIF
Tuner
Motion-R
M-Remote_Rx/Tx
SPDIF
BB_TP_DATA
DAC_DATA
H13
LG1154AN
OPTIC
H/P
H/P Audio L/R
SPDIF
CVBS
SCART
SC_CVBS, RGB, Audio L/R
DTV/MNT_LR/V_OUT
LNB
H/P AMP
IR_Blaster
IRB_SPI
IR_B
Micom
H13
LG1154D
AAD_DATA
HSR_P/M
PC_AUDIO
PC_Audio_L/R
AV1_Audio L/R
AV1
COMP1
AV1_CVBS
Comp1 Y,Pb,Pr
Audio
AMP
SPK
I2S
COMP1
HDMI
Switch
HDMI1~3
CI
CI
HDMI_CEC
USB1(USB3 0)
Vx1 / EPI / LVDS Combo
USB 3.0
USB 2.0
USB_W-iFi
PHY
RMII
LAN
WOL / WOW
FRC
TCON
Vx1 : 6 lane
EPI : 16 lane
LVDS : Quad
EPI : 16 lane
LVDS : Quad
USB1(USB3.0)
USB2(USB2.0)
USB3(USB2.0)
USB
HUB
HUB
16
16
USB 2.0
USB 2.0
USB_CAM
8
8
8
eMMC
8
8
DDR3
DDR3
4Gb×2 (1600)
DDR3
DDR3
DDR3
DDR3
4Gb×4 (1600)
H13 Block diagram
DIF
TS (P)
System
D
Global Baseband
H13A
H13D
Video Decoder
Multi-STD
UART 3
TS(P)
TS(P)
GBB AFE
1ch@30MHz
DVB-CI/CI+
Analog Chip Total Pin : 183w/o Power
Digital Chip Total Pin : 491w/o Power
AtoDPin : 79
TS(S)
GPU Rogue Han
USB2.0x3
TS(S)
SDRAM
(MCP)
Demux
Audio DSP
Multi-STD
Audio Decoder
LX4 HiFi EP
SIF
Global Baseband
V/Q, DVB-T/C ISDB-T
AAD
(THAT)
Mux
I2S(External)
Multi STD
HD Decoder
(Boda950)
Audio
2D GFX
JPG/PNG Decoder
JPG Encoder
UARTx3
EMAC
SCI
SPIx2
I2Cx10
PHY
1ch@30MHz
w/ PLL
BTSC AFE
10b@18.432MHz
w/ PLL
Video Encoder
1080p@30fps
GPIOx136
Tuner
Audio L/R(4-ch)
SCART out
SW
Audio DAC (48KHz)
Line Out
TrustZone
CPU
ARMCA9 Core
Dual 1.2GHz
Sound DSP
Clear Voice II
Perceptual
Volume Control
I2S
I2S(HPD)
CPU
64KB SRAM
48KB ROM
OTP
I2Cx10
eMMC
DMAC(8ch)
Timer
WDT
1ch L/R
Audio-ADC
24b@48KHz
USB3.0 x1
Secure Engine
Audio DAC
(48KHz )
I2S
I2S
SW
CVBS(3ch)
CVBS
Encoder
32KBI$
32KBD$
1MB L2 $
Slim SPK
DivX
Bluetooth
Digital AMP
I2S(HPD)
SPDIF
UART
OTP
Timer
SRAM 16KB
Digital
Audio
Output
CVBS DAC
5x1ch (1ch)
Component(2ch)
CVBS AFE(2-ch)
12b@54MHz
CVBS-Out
Mu
x
10x3ch
DE
Encoder
LVDS
Tx
e Mu
x
R
e
rlac
er
b Scale
r
D
C
R
SW
SW
3ch Video
AFE
10b@148.5MHz
LVDS
Rx
CVD
Y/C
CVBS
BE
D
R
C
R
E
E
1
S
D
D
o
rmatter
O
N
MCU
Capture
Block
(3CH)
Mu
x
/E
P
I/
L
VDS C
omb
o
(120Hz
)
MCU
HDMI-Rx 1.4
(1-port PHY)
DDR3 Controller
Audio PLL
w/ DCO
Sourc
e
TN
De-int
e
Ma
in
/Su
b
H3
V
C
w/ LLPLL
I2Cx1
H3
DDR3 Controller
SPLL
DDR
DPLL
DDR
F
R
S
R
P
E
O
S
LE
Output f
o
TC
O
(3CH)
I2Cx1
HDMI
(1-Link)
HDMI
Vx1
/
CPLL
DCO
x2
GPIOIx16
3D, ARC, 4kx2k
DDR3 PHY
DDR3 PHY
DDR
PLL
DDR
PLL
16
16
16
16
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