LG 55EA9809-ZA (CHASSIS:ED34D) Service Manual ▷ View online
H13 Block diagram
AUD
BB_TP_DATA
DAC_DATA
AAD_DATA
HSR_P/M
CVBS
DIF(P/N)
SIF
Tuner
PC_AUDIO
PC_Audio_L/R
AV1_Audio L/R
AV1
COMP1
AV1_CVBS
Comp1 Y,Pb,Pr
HDMI
Switch
HDMI1~4
H13
LG1154A
USB1(USB3.0)
USB2(USB2.0)
USB3(USB2.0)
USB2(USB2.0)
USB3(USB2.0)
USB
HUB
Motion-R
M-Remote_Rx/Tx
Audio
AMP
OPTIC
SPK/
Clear Speaker
H/P
H/P Audio L/R
SPDIF
I2S
16
DDR3
16
DDR3
CVBS
SCART
SC_CVBS, RGB, Audio L/R
DTV/MNT_LR/V_OUT
LNB
HDMI_CEC
USB 3.0
USB 2.0
USB 2.0
USB_CAM
USB 2.0
USB_W-iFi
PHY
RMII
LAN
WOL / WOW
H/P AMP
IR_Blaster
IRB_SPI
IR_B
Micom
H13
LG1154D
FRC
TCON
Logo Light
CI
CI
16
DDR3
16
DDR3
8
eMMC
4Gb×4 (1600)
LVDS : Quad
OLED Module
H13 Block diagram
Tuner
DIF
TS (P)
System
Demux
Audio DSP
Multi-STD
Audio Decoder
LX4 HiFi EP
SIF
Global Baseband
V/Q, DVB-T/C ISDB-T
CVBS(3ch)
Component(2ch)
HDMI-Rx 1.4
(1-port PHY)
3D, ARC, 4kx2k
AAD
(THAT)
M
ux
H13A
H13D
Audio L/R(4-ch)
SCART out
SW
I2S(External)
Audio DAC (48KHz)
Video Decoder
Multi-STD
HD Decoder
(Boda950)
CVBS AFE(2-ch)
12b@54MHz
CVBS-Out
M
ux
10x3ch
DE
CVBS
Encoder
DDR3 PHY
DDR3 Controller
Audio
Line Out
LVDS
Tx
Audio PLL
w/ DCO
S
ou
rce
M
ux
TNR
De
-int
er
lace
r
M
ain/
S
ub
S
ca
ler
H3D
V
CR
2D GFX
JPG/PNG Decoder
TrustZone
CPU
ARMCA9 Core
Dual 1.2GHz
32KBI$
32KBD$
1MB L2 $
SW
SW
3ch Video
AFE
10b@148.5MHz
w/ LLPLL
LVDS
Rx
Sound DSP
Clear Voice II
Perceptual
Volume Control
Slim SPK
DivX
Bluetooth
Digital AMP
I2S
I2S(HPD)
SPDIF
JPG Encoder
CVD
Y/C
CVBS
CPU
64KB SRAM
48KB ROM
UART
OTP
Timer
UARTx3
EMAC
SCI
SPIx2
I2Cx10
eMMC
DMAC(8ch)
Timer
WDT
PH
Y
SRAM 16KB
I2Cx1
BE
H3D
DDR3 PHY
DDR3 Controller
SPLL
DDR
PLL
DPLL
DDR
PLL
Digital
Audio
Output
16
16
TS(P)
TS(P)
FRC
S
RE
PE1
OS
D
LE
D
Ou
tp
ut
fo
rm
att
er
TCON
MCU
Capture
Block
(3CH)
GBB AFE
1ch@30MHz
w/ PLL
BTSC AFE
10b@18.432MHz
w/ PLL
1ch L/R
Audio-ADC
24b@48KHz
CVBS DAC
5x1ch (1ch)
I2Cx1
HDMI
(1-Link)
HDMI
M
ux
DVB-CI/CI+
16
16
Video Encoder
1080p@30fps
TS(S)
V
x1
/E
P
I/L
V
DS
Com
bo
(1
20
Hz
)
GPU Rogue Han
USB3.0 x1
USB2.0x3
GPIOx136
Secure Engine
TS(S)
Audio DAC
(48KHz )
I2S
I2S
SW
CPLL DCO
x2
MCU
SDRAM
(MCP)
GPIOIx16
H13 Block diagram
H13 Block diagram
TU6503
TDSQ-H651F
H13
LG1154D
[RESET] 2
/TU_RESET1
AG6 [GPIO10]
IC2_SCL6
IC2_SDA6
IC2_SDA6
AH34 [SCL5]
AH33 [SDA5]
[SLC] 3
[SDA] 4
[+3.3V_TUNER] 5
[+.1.8V_TUNER] 7
[T/C_DIF[P]] 10
[T/C_DIF[N]] 11
FILTER
[T/C_DIF[N]] 11
[ERROR] 16
[SYNC] 17
[VALID] 18
[MCLK] 19
AL37 [TP_DVB_ERR]
AL36 [TP_DVB_SOP]
AL35 [TP_DVB_VAL]
AM36 [TP_DVB_CLK]
FE_DEMOD1_TS_ERROR
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
FE_DEMOD1_TS_CLK
[D0] 20
[D1] 21
[D2] 22
[D3] 23
[D4] 24
[D5] 25
[D6] 26
[D7] 27
FE_DEMOD1_TS_DATA [0-7]
AM35 [TP_DVB_DATA0]
AN36 [TP_DVB_DATA1]
AN37 [TP_DVB_DATA2]
AN35 [TP_DVB_DATA3]
AP37 [TP_DVB_DATA4]
AP36 [TP_DVB_DATA5]
AR37 [TP_DVB_DATA6]
AR37 [TP_DVB_DATA7]
[+1.23V_S2_DEMOD] 30
+1.23V_D_Demod
[S2_RESET] 31
/S2_RESET
AG5 [GPIO9]
[+3.3V_S2_DEMOD] 32
LNB_TX
LNB
IC6900
A8303SESTR-TB
10 [TONECTRL]
2 [LNB]
7 [SCL]
8 [SDA]
2 [LNB]
7 [SCL]
8 [SDA]
[S2_F22_OUTPUT] 33
[LNB] 36
[S2_SCL] 34
[S2_SDA] 35
I2C_SCL4
I2C_SDA4
AP6 [SCL3]
AR6 [SDA3]
22
Ω
33
Ω
LNB_OUT
+3.3V_NORMAL
3.3K
Ω
+1.8_TU
+3.3V_TU
+3.3V_D_Demod
H13
LG1154A
IF_P
IF_N
TUNER_SIF
TU_CVBS
IF_AGC
IF_N
TUNER_SIF
TU_CVBS
IF_AGC
U17 [ADC_I_INP]
V17 [ADC_I_INN]
V17 [ADC_I_INN]
ADC_I_INP
ADC_I_INN
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