DOWNLOAD LG 50PX950-UA / 50PX950-UF (CHASSIS:PU02B) Service Manual ↓ Size: 5.31 MB | Pages: 74 in PDF or view online for FREE

Model
50PX950-UA 50PX950-UF (CHASSIS:PU02B)
Pages
74
Size
5.31 MB
Type
PDF
Document
Service Manual
Brand
Device
TV / Plasma
File
50px950-ua-50px950-uf-chassis-pu02b.pdf
Date
PREV: LG 50PX950-SA (CHASSIS:PB01B) Service Manual

LG 50PX950-UA / 50PX950-UF (CHASSIS:PU02B) Service Manual ▷ View online

Great Company  Great People
Block Diagram – Over view
TAS5709
(Digital AMP)
Reset
I2S
BCM3549XS
MCLK
HDMI CEC
IR
CVBS
Buffer
SIF
Buffer
RS-232C
I2C
CVBS(ATV)
NTSC/ATSC
TUNER
X-tal
(54MHz)
NAND Flash
(2GB)
DDR2 (512MB)
TDVJ-H001F
KIA7427AF
KIA7427AF
24C16
24C16
Local
Local
KEY
KEY
MAIN IF
DP/DM
DP/DM
NEC
NEC
Micom
Micom
COMP1
COMP2
Y/Cb/Cr
Y/Cb/Cr
R/G/B 
RGB-PC
Rear AV
CVBS
Side AV
CVBS
AV1,2 L/R
COMP 1,2 L/R
L/R
L/R
RGB-PC 
Audio In
Rear HDMI 1/2/3
Side HDMI 1
SIF
Audio
Front 
End
Video 
Front 
End
TMDS/DDC
HDMI 
RX
HD/SD
Video
Encoder
Audio
DSP
SPDIF Out
UART
RX/TX
UART
UART
USB 2.0
RMII
RMII
24C01
DDC
SIF
TDA19997
TDA19997
HDMI SW
LAN
LAN
Digital out
Full HD(1080P)
IR Emitter
3D_
S
YNC
Great Company  Great People
3D Formatter Board (3DF)
DDR
DDR
L
V
DS to ASIC
L
V
DS from
 M
a
in
FPGA
3D
FPGA
2D to 3D
3D formatter board image
3D formatter board layout
3D
chip
BCM
Module
(ASIC)
L
R
L
R
3D Source
3D
R
L
2D
2D
2D Source
3D
R
L
BCM
2D to 3D
chip
3D
chip
L
R
Module
(ASIC)
3D function
2D to 3D function
2D to 3D
chip
L
R
Bypass
3DF board
3DF board
2D to 3D chip
3D chip
2D to 3D D/L wafer
3D D/L wafer
Great Company  Great People
Block Diagram – 3DF B/D 
(PDP 3DTV)
LVDS (51P
in)
BCM
I2C
L/R DETECT
FPGA RESET
LVDS 2Ch
I2C
L/R DETECT
FPGA RESET
LVDS 2Ch
X-tal
(54MHz)
DDR2
(512Mbitx2) 
PROM
(16Mbit)
2D to 3D
Converter 
(FPGA)
EP3C55F484
3D Formatter
(FPGA)
EP3C55F484
I2C
FPGA RESET
LVDS 2Ch
X-tal
(54MHz)
PROM
(16Mbit)
LVDS 2Ch
(
Left
)
LVDS (80P
in)
LVDS 2Ch
(
Right
)
3D
_S
YN
C
3D_SYNC
■ Input
ƒ 1 LVDS RX (2 channel)
ƒ 10 bit 1920x1080p@60Hz
■ Output
ƒ 2 LVDS TX (4 channel)
ƒ 10 bit 1920x1080p@120Hz 
■ Processing
ƒ 148.5 MHz, 74.24 MHz
ƒ DDR2 IF(153MHz)
ƒ CSC (RGB ÅÆ YUV) included
ƒ Scaler included
ƒ I2C input from LVDS RX
5V_VCC
5V_VCC
3D_SYNC
Great Company  Great People
Changes List : Module
‰ To improve 3D Crosstalk, change R/G fluorescent substance (Afterglow time 10㎳ Æ 4㎳ )
‰ New ASIC for 3D (A1.0) and apply 3D sustain waveform
As is (60R1)
To be (60R1X 3D)
panel
▶ fluorescent substance       
- Afterglow time : 4ms(R,G) 
▶ 3D Cross Talk ratio
- About 2.5%
▶ color temp : 7200K↑
▶ brightness : 410cd/m
2
▶ fluorescent substance
- Afterglow time: 10ms (R,G)
▶ 3D Cross Talk ratio
- 17%
▶ color temp : 6500K
▶ brightness : 500cd/m
2
R1
▶ ISIS-F3.0
- not support 3D 
- apply DCC
▶ 51pin LVDS Cable
cir
c
uit  /  tool
▶ ISIS-A1.0
- support 3D  
- apply DPCS
▶ 80pin & 51pin LVDS Cable
- L / R Image Input
▶ Apply 3D Formatter B/D 
Main B/D
Ctrl B/D
ISIS A1.0
3DF B/D
wa
v
e
fo
rm
SF1
(LSB)
SF2
SF8
SF1
(MSB)
▶ SF : 9
▶ 1
st
LSB SF Mapping
.  .  .  . 
SF4
(LSB)
SF1
(MSB)
SF4
(LSB)
▶ SF : 4(L) + 4(R)
▶ 1
st
MSB SF Mapping
SF9
(MSB)
Right Image
Left Image
2D SF Mapping
3D SF Mapping
Main B/D
Ctrl B/D
ISIS F3.0
Time
0
1
65% 35%
10ms
0
1
90% 10%
4ms
Time
R1 3D 
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