DOWNLOAD LG 50PW340-UB / 50PW350-UA / 50PW350-UE / 50PW350U-UC (CHASSIS:PU11A) Service Manual ↓ Size: 8.06 MB | Pages: 72 in PDF or view online for FREE

Model
50PW340-UB 50PW350-UA 50PW350-UE 50PW350U-UC (CHASSIS:PU11A)
Pages
72
Size
8.06 MB
Type
PDF
Document
Service Manual
Brand
Device
TV / Plasma
File
50pw340-ub-50pw350-ua-50pw350-ue-50pw350u-uc-chass.pdf
Date

LG 50PW340-UB / 50PW350-UA / 50PW350-UE / 50PW350U-UC (CHASSIS:PU11A) Service Manual ▷ View online

- 13 -
BLOCK DIAGRAM
- 14 -
EXPLODED VIEW
602
208
900
601
200
400
520
590
301
300
910
120
501
204
201
205
240
206
203
202
207
209
580
305
303
302
304
570
560
Many  electrical  and  mechanical  parts  in  this  chassis  have  special  safety-related  characteristics.  These
parts are identified by       in the Schematic Diagram and EXPLODED VIEW. 
It  is  essential  that  these  special  safety  parts  should  be  replaced  with  the  same  components  as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards. 
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
A10
A9
LV1
A12
A21
A2
A4
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
PCM_A[3]
PCM_A[0]
PCM_A[1]
PCM_A[2]
PCM_A[4]
PCM_A[6]
PCM_A[6]
PCM_A[5]
PCM_A[5]
PCM_A[7]
PCM_A[4]
PCM_A[3]
PCM_A[2]
PCM_A[1]
PCM_A[7]
PCM_A[0]
R46
22
R51
33
Q103
2SC3052
E
B
C
SPI_SDO
R12
1K
AV_CVBS_DET
MODEL_OPT_3
UART_PM_TX
R35
1K
Q101
KRC103S
READY
E
B
C
/SPI_CS
PWM0
5V_DET_HDMI_4
FE_TS_SYN
AMP_MUTE
R2
0
READY
FE_TS_SERIAL
SPI_SDO
R22
4.7K
COMP1_DET
PF_WP
UART_PM_RX
/SPI_CS
+3.3V_AVDD
EDID_WP
R41
1K
READY
AR103
22
/PF_OE
PWM1
IC102
CAT24WC08W-T
3
A2
2
A1
4
VSS
1
A0
5
SDA
6
SCL
7
WP
8
VCC
+3.3V_ST
TUNER_RESET
L102
/PF_CE0
+3.3V_AVDD
+3.3V_AVDD
C6
10uF
6.3V
R9
10K
C1
0.1uF
R6
4.7K
READY
R52
33
R55
33
TOUCH_VER_CHK
/PF_WE
S7_RXD
/FLASH_WP
5V_DET_HDMI_3
R7
4.7K
AR102
22
ERROR_DET
R53
33
SPI_SDI
R97
33
+3.3V_ST
R17
1K
READY
R56
22
/PF_WE
3D_RF_RXD
R40
1K
READY
/FLASH_WP
R1
0
LED_WHITE
S7_TXD
R83
33
R11
4.7K
READY
IC109-*1
M24512-HRMN6TP
ST_NVRAM_512K
3
E2
2
E1
4
VSS
1
E0
5
SDA
6
SCL
7
WP
8
VCC
R80
10K
SPI_SCK
AUD_MASTER_CLK
C7 0.1uF
KEY1
+3.3V_AVDD
R24
33
READY
PF_ALE
I2C_SDA
R34
1K
READY
5V_DET_HDMI_2
MODEL_OPT_1
RGB_DDC_SCL
I2C_SDA
AC_DET
R81
33
I2C_SCL
R57
22
R82
33
PCM_A[0-7]
I2C_SCL
PWM1
MOD_ROM_TX
AUD_SCK
R4
0
R39
1K
R54
33
R20
4.7K
/F_RB
R10
1K
READY
PF_ALE
I2C_SDA
R129
22
+1.8V_ON
R3
10K
READY
RGB_DDC_SDA
R36
1K
R13
4.7K
C4
0.1uF
IC109
M24M01-HRMN6TP
3
E2
2
E1
4
VSS
1
NC
5
SDA
6
SCL
7
WP
8
VCC
SPI_SDI
SIDE_CVBS_DET
3D_RF_RESET
RL_ON
R99
1K
R18
22
READY
R37
1K
/PF_OE
R50
33
R42
1K
READY
FE_TS_VLD
/PF_CE0
R19
3.9K
R8
10K
LED_RED
5V_ON
FE_TS_CLK
3D_RF_TXD
C5
0.1uF
16V
I2C_SCL
R16
1K
SPI_SCK
/PF_CE1
IC104
NAND01GW3B2CN6E
26
NC_17
27
NC_18
28
NC_19
29
I/O0
30
I/O1
31
I/O2
32
I/O3
33
NC_20
34
NC_21
35
NC_22
36
VSS_2
37
VDD_2
38
NC_23
39
NC_24
40
NC_25
41
I/O4
42
I/O5
43
I/O6
44
I/O7
45
NC_26
46
NC_27
47
NC_28
48
NC_29
17
AL
3
NC_3
6
NC_6
16
CL
15
NC_10
14
NC_9
13
VSS_1
12
VDD_1
11
NC_8
10
NC_7
9
E
8
R
7
RB
4
NC_4
5
NC_5
25
NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
W
PF_WP
R38
1K
KEY2
PCM_A[0-7]
C19
10pF
READY
C3
0.1uF
IC103-*1
MX25L8006EM2I-12G
3
WP#
2
SO/SIO1
4
GND
1
CS#
5
SI/SIO0
6
SCLK
7
HOLD#
8
VCC
+3.3V_AVDD
LGE101D (S7 Non_Tcon/RM)
IC101
S7R
PCM_D0
U22
PCM_D1
T21
PCM_D2
T22
PCM_D3
AB18
PCM_D4
AC18
PCM_D5
AC19
PCM_D6
AC20
PCM_D7
AC21
PCM_A0
U21
PCM_A1
V21
PCM_A2
Y22
PCM_A3
AA22
PCM_A4
R22
PCM_A5
R21
PCM_A6
T23
PCM_A7
T24
PCM_A8
AA23
PCM_A9
Y20
PCM_A10
AB17
PCM_A11
AA21
PCM_A12
U23
PCM_A13
Y23
PCM_A14
W23
PCM_REG_N
W22
PCM_OE_N
AA17
PCM_WE_N
V22
PCM_IORD_N
W21
PCM_IOWR_N
Y21
PCM_CE_N
AA20
PCM_IRQA_N
V23
PCM_CD_N
P23
PCM_WAIT_N
R23
PCM_RESET
P22
PCM_PF_CE0Z
AC17
PCM_PF_CE1Z
AB20
PCM_PF_OEZ
AA18
PCM_PF_WEZ
AB21
PCM_PF_ALE
AB19
PCM_PF_AD[15]
AD17
PCM_PF_RBZ
AA19
UART_TX2/GPIO65
M23
UART_RX2/GPIO64
N23
DDCR_DA/GPIO71
M22
DDCR_CK/GPIO72
N22
DDCA_DA/UART0_TX
A5
DDCA_CK/UART0_RX
B5
PWM0/GPIO66
K23
PWM1/GPIO67
K22
PWM2/GPIO68
G23
PWM3/GPIO69
G22
PWM4/GPIO70
G21
SAR0/GPIO31
C6
SAR1/GPIO32
B6
SAR2/GPIO33
C8
SAR3/GPIO34
C7
SAR4/GPIO35
A6
TCON0/POL
N21
TCON2/GSP_R/GCLK1
M21
TCON4/CPV/GSC/GCLK3
L22
TCON6/FLK
L21
TCON8/CS2/FLK3
P21
GPIO36/UART3_RX
K21
GPIO37/UART3_TX
L23
GPIO38
K20
GPIO39
L20
GPIO40
M20
GPIO41
G20
GPIO42
G19
GPIO50/UART1_RX
F20
GPIO51/UART1_TX
F19
GPIO6/PM0/INT0
E7
GPIO7/PM1/PM_UART_TX
D7
GPIO8/PM2
E11
GPIO9/PM3
G9
GPIO10/PM4
F9
GPIO11/PM5/PM_UART_RX/INT1
C5
PM_SPI_CS1/GPIO12/PM6
E8
PM_SPI_WP1/GPIO13/PM7
E9
PM_SPI_WP2/GPIO14/PM8/INT2
F7
GPIO15/PM9
F6
PM_SPI_CS2/GPIO16/PM10
D8
GPIO17/PM11/INT3
G12
GPIO18/PM12/INT4
F10
PM_SPI_CK/GPIO1
D9
GPIO0/PM_SPI_CZ
D11
PM_SPI_DI/GPIO2
E10
PM_SPI_DO/GPIO3
D10
TS0_CLK
AA9
TS0_VLD
AA5
TS0_SYNC
AA10
TS0_D0
AB5
TS0_D1
AC4
TS0_D2
Y6
TS0_D3
AA6
TS0_D4
W6
TS0_D5
AA7
TS0_D6
Y9
TS0_D7
AA8
TS1_CLK
AC5
TS1_VLD
AC6
TS1_SYNC
AB6
TS1_D0
AC10
TS1_D1
AB10
TS1_D2
AC9
TS1_D3
AB9
TS1_D4
AC8
TS1_D5
AB8
TS1_D6
AC7
TS1_D7
AB7
MPIF_CLK
D12
MPIF_CS_N
D14
MPIF_BUSY
E14
MPIF_D0
E12
MPIF_D1
F12
MPIF_D2
D13
MPIF_D3
E13
MOD_ROM_RX
AUD_LRCH
R33
1K
READY
C18
10pF
READY
R98
33
IC103
MX25L8005M2I-15G
15G
3
WP#
2
SO
4
GND
1
CS#
5
SI
6
SCLK
7
HOLD#
8
VCC
/F_RB
/PF_CE1
PWM0
+3.3V_ST
R92
33
1      14
EAX63425901(8)
S7/FLASH/NVRAM/GPIO
<T3 CHIP Config(AUD_LRCH)>
1M BIT EEPROM
H : JEIDA
V4 LGD BIT SEL
L or NC : VESA
V4 LGD LVDS SEL
AFLC: LED TV OPTION
I2C : A0
V4 LGD OPC
PWM2
4.CHIP_CONF= 4’hB:{1,0,1,1}B51_Secure_no_scramble
OPC: Optimal power control FOR PICTURE
<CHIP_CONF={AUBCK_OUT,AUMCK_OUT,PWM1,PWM0}>
H : ENABLE
2.CHIP_CONF= 4’h4:{0,1,0,0}MIPS_EJ1_NOR8
L or NC : DISABLE
3.CHIP_CONF= 4’h5:{0,1,0,1}MIPS_EJ2_NOR8
/PF_CE0
H : Serial Flash
L : NAND Flash
/PF_CE1
H : 16 bit
L :   8 bit
1.CHIP_CONF= 4’h3:{0,0,1,1}MIPS_no_EJ_NOR8
BIT_SEL,LVDS_SE : LCD MODULE OPT
8K BIT HDCP EEPROM
5.CHIP_CONF= 4’hC:{1,1,0,0}B51_Secure_scramble
512KBIT = $0.35
L : 8 bit
2.MIPS as host,EJ use PAD1,Byte mode NAND flash
BRAZIL DEMOD OPT
H or NC : 10 bit
1.MIPS as host(8051’s reset remains until MIPS deactive it.),No EJ PAD,Byte mode NAND flash
S7 IC Configuration
3.MIPS as host,EJ use PAD2,Byte mode NAND flash
Boot from SPI flash : 1’b0
Boot from NOR flash : 1’b1
8M BIT serial Flash
CH_2
CH_8
CH_2
CH_2
Serial FLASH MEMORY
for BOOT
Addr:10101--
$0.199
S7R
2010.09.14
2G BIT NAND Flash
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
SOC_RESET
R221
3.3K
READY
D0-_HDMI4
LVDS_DATA_1_E-
R248
300
READY
R184
33
COMP2_DET
GND_C
D1-_HDMI2
DSUB_HSYNC
D0+_HDMI3
LGE101D (S7 Non_Tcon/RM)
IC101
NC_48
AE1
NC_78
AF16
NC_64
AF1
NC_50
AE3
NC_45
AD14
NC_34
AD3
NC_77
AF15
NC_65
AF2
NC_62
AE15
NC_33
AD2
NC_47
AD16
NC_46
AD15
NC_63
AE16
NC_66
AF3
NC_76
AF14
NC_32
AD1
NC_44
AD13
NC_61
AE14
NC_60
AE13
NC_51
AE4
NC_36
AD5
NC_67
AF4
NC_35
AD4
NC_49
AE2
NC_71
AF8
NC_40
AD9
NC_56
AE9
NC_72
AF9
NC_58
AE11
NC_69
AF6
NC_53
AE6
NC_74
AF11
NC_37
AD6
NC_43
AD12
NC_52
AE5
NC_75
AF12
NC_68
AF5
NC_59
AE12
NC_57
AE10
NC_70
AF7
NC_42
AD11
NC_38
AD7
NC_41
AD10
NC_54
AE7
NC_73
AF10
NC_39
AD8
NC_55
AE8
NC_12
Y11
GND_105
Y19
LVACLKP/LLV6P/BLUE[3]
W26
LVACLKN/LLV6N/BLUE[2]
W25
LVA0P/LLV3P/BLUE[9]
U26
LVA0N/LLV3N/BLUE[8]
U25
LVA1P/LLV4P/BLUE[7]
U24
LVA1N/LLV4N/BLUE[6]
V26
LVA2P/LLV5P/BLUE[5]
V25
LVA2N/LLV5N/BLUE[4]
V24
LVA3P/LLV7P/BLUE[1]
W24
LVA3N/LLV7N/BLUE[0]
Y26
LVA4P/LLV8P
Y25
LVA4N/LLV8N
Y24
LVBCLKP/LLV0P/GREEN[5]
AC26
LVBCLKN/LLV0N/GREEN[4]
AC25
LVB0P/RLV6P/RED[1]
AA26
LVB0N/RLV6N/RED[0]
AA25
LVB1P/RLV7P/GREEN[9]
AA24
LVB1N/RLV7N/GREEN[8]
AB26
LVB2P/RLV8P/GREEN[7]
AB25
LVB2N/RLV8N/GREEN[6]
AB24
LVB3P/LLV1P/GREEN[3]
AC24
LVB3N/LLV1N/GREEN[2]
AD26
LVB4P/LLV0P/GREEN[1]
AD25
LVB4N/LLV0N/GREEN[0]
AD24
RLV3P/RED[7]
AD23
RLV3N/RED[6]
AE23
RLV0P/LVSYNC
AE26
RLV0N/LHSYNC
AE25
RLV1N/LCK
AF26
RLV2P/RED[9]
AF25
RLV1P/LDE
AE24
RLV2N/RED[8]
AF24
RLV4P/RED[5]
AF23
RLV4N/RED[4]
AD22
RLV5P/RED[3]
AE22
RLV5N/RED[2]
AF22
TCON3/OE/GOE/GCLK2
AD19
TCON15/SCAN_BLK1
AE19
TCON18/CS7/GCLK5
AD21
TCON19/CS8/GCLK6
AE21
TCON11/CS5/HCON
AF21
TCON10/CS4/OPT_N
AD20
TCON9/CS3/OPT_P
AE20
TCON16/WPWM
AF20
TCON12/DPM
AF19
TCON1/STV/GSP/VST
AD18
TCON5/TP/SOE
AE18
TCON14/SACN_BLK
AF18
TCON21/CS10/VGH_ODD
AB22
TCON20/CS9/VGH_EVEN
AB23
TCON13/LEDON
AC23
TCON17/CS6/GCLK4
AC22
NC_26
AB16
NC_19
AA14
NC_30
AC15
NC_15
Y16
NC_31
AC16
NC_29
AC14
NC_21
AA16
NC_20
AA15
NC_11
Y10
NC_17
AA11
NC_25
AB15
NC_24
AB14
C235
15pF 50V
READY
R194
33
C259
0.1uF
INTERNAL_DEMOD
COMP2_Y+
L200
R217
22
TU_2INPUT_CTRL
R208
22
C210
0.047uF
+USB1_OCD
R220
3.3K
READY
3D_GPIO_1
COMP2_LIN
COMP1_Y-
R209
22
AUD_LRCH
SUB_SDA
C208
0.047uF
DSUB_G-
C213
0.047uF
+3.3V_AVDD
C201
1000pF
READY
50V
R187
33
C245
2.2uF
SIDE_RIN
LGE101D (S7 Non_Tcon/RM)
IC101
A_RXCP
F1
A_RXCN
F2
A_RX0P
G2
A_RX0N
G3
A_RX1P
H3
A_RX1N
G1
A_RX2P
H1
A_RX2N
H2
DDCDA_DA/GPIO24
F5
DDCDA_CK/GPIO23
F4
HOTPLUGA/GPIO19
E6
B_RXCP
D3
B_RXCN
C1
B_RX0P
D1
B_RX0N
D2
B_RX1P
E2
B_RX1N
E3
B_RX2P
F3
B_RX2N
E1
DDCDB_DA/GPIO26
D4
DDCDB_CK/GPIO25
E4
HOTPLUGB/GPIO20
D5
C_RXCP
AA2
C_RXCN
AA1
C_RX0P
AB1
C_RX0N
AA3
C_RX1P
AB3
C_RX1N
AB2
C_RX2P
AC2
C_RX2N
AC1
DDCDC_DA/GPIO28
AB4
DDCDC_CK/GPIO27
AA4
HOTPLUGC/GPIO21
AC3
D_RXCP
A2
D_RXCN
A3
D_RX0P
B3
D_RX0N
A1
D_RX1P
B1
D_RX1N
B2
D_RX2P
C2
D_RX2N
C3
DDCDD_DA/GPIO30
B4
DDCDD_CK/GPIO29
C4
HOTPLUGD/GPIO22
E5
CEC/GPIO5
D6
HSYNC0
G5
VSYNC0
G6
RIN0P
K1
RIN0M
L3
GIN0P
K3
GIN0M
K2
BIN0P
J3
BIN0M
J2
SOGIN0
J1
HSYNC1
G4
VSYNC1
H6
RIN1P
K5
RIN1M
K4
GIN1P
J4
GIN1M
K6
BIN1P
H4
BIN1M
J6
SOGIN1
J5
HSYNC2
H5
RIN2P
N3
RIN2M
N2
GIN2P
M2
GIN2M
M1
BIN2P
L2
BIN2M
L1
SOGIN2
M3
CVBS0P
N4
CVBS1P
N6
CVBS2P
L4
CVBS3P
L5
CVBS4P
L6
CVBS5P
M4
CVBS6P
M5
CVBS7P
K7
CVBS_OUT1
M6
CVBS_OUT2
M7
VCOM0
N5
VIFP
W2
VIFM
W1
IP
V2
IM
V1
SSIF/SIFP
Y2
SSIF/SIFM
Y1
QP
U3
QM
V3
IFAGC
Y5
RF_TAGC
Y4
TGPIO0/UPGAIN
U1
TGPIO1/DNGAIN
U2
TGPIO2/I2C_CLK
R3
TGPIO3/I2C_SDA
T3
XTALIN
T2
XTALOUT
T1
SPDIF_IN/GPIO177
G14
SPDIF_OUT/GPIO178
G13
DM_P0
B7
DP_P0
A7
DM_P1
AF17
DP_P1
AE17
I2S_IN_BCK/GPIO175
F14
I2S_IN_SD/GPIO176
F13
I2S_IN_WS/GPIO174
F15
I2S_OUT_BCK/GPIO181
D20
I2S_OUT_MCK/GPIO179
E20
I2S_OUT_SD/GPIO182
D19
I2S_OUT_SD1/GPIO183
F18
I2S_OUT_SD2/GPIO184
E18
I2S_OUT_SD3/GPIO185
D18
I2S_OUT_WS/GPIO180
E19
LINE_IN_0L
N1
LINE_IN_0R
P3
LINE_IN_1L
P1
LINE_IN_1R
P2
LINE_IN_2L
P4
LINE_IN_2R
P5
LINE_IN_3L
R6
LINE_IN_3R
T6
LINE_IN_4L
U5
LINE_IN_4R
V5
LINE_IN_5L
U6
LINE_IN_5R
V6
LINE_OUT_0L
U4
LINE_OUT_2L
W3
LINE_OUT_3L
W4
LINE_OUT_0R
V4
LINE_OUT_2R
Y3
LINE_OUT_3R
W5
MIC_DET_IN
R4
MICCM
T5
MICIN
R5
AUCOM
T4
VRM
P7
VAG
R7
VRP
P6
HP_OUT_1L
R1
HP_OUT_1R
R2
ET_RXD0
E21
ET_TXD0
E22
ET_RXD1
D21
ET_TXD1
F21
ET_REFCLK
E23
ET_TX_EN
D22
ET_MDC
F22
ET_MDIO
D23
ET_CRS
F23
AVLINK
F8
IRINT
G8
TESTPIN
K8
RESET
A4
NC_16
Y17
C241
2.2uF
+USB1_CTL
SOC_RESET
DDC_SDA_2
R219
3.3K
READY
+3.3V_AVDD
D1+_HDMI2
R178
68
C230
0.047uF
R256
1K
INTERNAL_DEMOD
IF_AGC_MAIN
LVDS_DATA_2_D+
D0+_HDMI4
IF_P_MSTAR
CK-_HDMI3
COMP1_Pb-
LVDS_CLK_1-
C204
1000pF
LVDS_DATA_1_B-
C260
0.1uF
INTERNAL_DEMOD
R203
3.3K
OPT
C221
0.047uF
C254
0.1uF
INTERNAL_DEMOD
CK+_HDMI2
HPD2
+3.3V_ST
R181
68
C217
0.047uF
+3.3V_AVDD
+3.3V_AVDD
C256
1000pF
READY
R215
22
CK+_HDMI3
/AMP_RESET
COMP1_Y+
CK-_HDMI2
HPD4
R141
300
READY
1/16W
C222
0.047uF
TUNER_CVBS
C229
0.047uF
LVDS_DATA_2_E+
C206
0.047uF
C209
0.047uF
R201
100
READY
COMP1_Pb+
R172
0
LVDS_DATA_1_A-
R175
33
R143
10K
LVDS_DATA_2_D-
D0-_HDMI3
R169
68
USB2_DM_to_MAIN
AV_LIN_COM1
COMP2_Y-
DDC_SCL_4
C207
0.047uF
R224
22
READY
C239
2.2uF
SW200
TMUE312GAB
READY
1
2
4
3
5
LVDS_DATA_1_C-
R189
33
DSUB_B
D2+_HDMI3
R164
22
R139
33
R156
68
C258 27pF
C244
2.2uF
R188
33
LVDS_DATA_1_A+
R182
33
HPD3
LVDS_DATA_2_C+
PC_LIN
MODEL_OPT_2
R173
33
C211
0.047uF
C205
1000pF
C233
0.047uF
DSUB_VSYNC
LVDS_CLK_2+
3D_GPIO_0
C224
0.047uF
AUD_SCK
DSUB_DET
D1+_HDMI4
C202
0.1uF
16V
COMP2_Pr+
C243
2.2uF
R266
3.3K
READY
C227
0.047uF
LVDS_DATA_2_B+
C242
2.2uF
TX
3D_GPIO_2
R185
68
USB2_DP_to_MAIN
AV_RIN_COM1
AUD_MASTER_CLK
R246
47
LVDS_DATA_1_B+
C215
0.047uF
C200
4.7uF
10V
MODEL_OPT_3
D2-_HDMI3
DSUB_G
R174
68
C248
4.7uF
R154
33
R223
22
READY
D2-_HDMI4
C255
0.022uF
16V
INTERNAL_DEMOD
R176
68
L202
INTERNAL_DEMOD
COMP2_RIN
R265
3.3K
LED_WHITE
COMP1_Pr-
IF_N_MSTAR
C234
15pF 50V
READY
TUNER_SIF
R177
33
C231
0.047uF
+3.3V_ST
X201
32.768KHz
READY
R247
47
C212
1000pF
R273
10K
READY
LVDS_DATA_2_B-
DSUB_R
C247
2.2uF
CK+_HDMI4
R155
33
AMP_DEMOD_SCL
USB1_DM_to_MAIN
L201
P_SDA
LVDS_DATA_1_D-
LVDS_DATA_2_C-
TU_SCL
C216
0.047uF
RF_SWITCH_CTL
C220
0.047uF
R222
22
DDC_SDA_3
SIDE_LIN
R192
33
P_SCL
LG8300_RESET
LVDS_DATA_1_C+
D0+_HDMI2
DSUB_B-
C218
0.047uF
R167
68
SUB_SCL
R255
10K
INTERNAL_DEMOD
R191
33
R190
33
COMP1_Pr+
R186
0
R228
100
INTERNAL_DEMOD
LVDS_CLK_2-
X200
24MHz
CK-_HDMI4
LVDS_DATA_2_A+
C253
0.1uF
R163
22
C249
1uF
D1-_HDMI4
C226
0.047uF
R229
100
INTERNAL_DEMOD
D0-_HDMI2
COMP2_Pb-
C240
2.2uF
LVDS_DATA_2_E-
/DEMOD_RESET
USB1_DP_to_MAIN
R180
33
D1+_HDMI3
SIDE_CVBS_IN
HDMI_CEC_S7
C257 27pF
C225
0.047uF
MODEL_OPT_2
+3.3V_AVDD
C219
0.047uF
SPDIF_OUT
C251
0.1uF
C203
0.047uF
DDC_SDA_4
C238
2.2uF
D2-_HDMI2
R179
0
PC_RIN
C214
0.047uF
LVDS_DATA_2_A-
D200
KDS181
DSUB_R-
R218
3.3K
READY
R140
1K
C228
0.047uF
COMP2_Pb+
R170
33
D1-_HDMI3
R158
22
R166
33
COMP2_Pr-
R171
68
R168
33
DDC_SCL_3
R202
3.3K
OPT
FE_BOOSTER_CTL
LVDS_DATA_1_E+
R207
100
MODEL_OPT_1
R216
22
TU_2INPUT_CTRL
C223
0.047uF
R145
10
AV_CVBS
D2+_HDMI2
C250
10uF
D2+_HDMI4
AUD_LRCK
LVDS_CLK_1+
DISP_EN
C246
2.2uF
R227
1M
AMP_DEMOD_SDA
R205
3.3K
OPT
R146
10K
DDC_SCL_2
TU_SDA
R183
68
R142
62K
LVDS_DATA_1_D+
C252
0.1uF
R264
3.3K
LED_RED
2      14
Close to IC
as close as possible 
*Active High reset
AUDIO IN
TV/MNT
SERIAL DATA
WORD SELECT
MASTER CLOCK
COMPONENT 1/2
BIT CLOCK
MUST BE LINE IMPEADANCE 100 OHM !!
MINILV
N/A
CVBS
DSUB
FRC PART
S7 RESET CIRCUIT
LVDS OUT
HDMI
EAX63425901(8)
CH_6
AUDIO OUT
N/A
Close to MSTAR
Close to MSTAR
CH_5(AMP_DEMODE BRAZIL)
CH_5(AMP_DEMODE BRAZIL)
CH_5(MODULE I2S)
CH_7(SUB I2C)
CH_7(SUB I2C)
CH_5(MODULE I2S)
CH_6
HIGH
MODEL OPTION3
LOW
LED_WHITE
MODEL_OPT_1
LED_RED
PIN NAME
MODEL_OPT_2
MODEL_OPT_3
2010.09.13
 
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