LG 50PH470U-ZD (CHASSIS:PD32C) Service Manual ▷ View online
- 10 -
4.8. LNB voltage and 22KHz tone check
(only for *PH**0 V, S, U, R)
(1) Test method
1) Press "Power on" button of a service R/C.(Baud rate :
115200 bps)
2) Connect cable between satellite ANT and test JIG.
3) Connect RS232-C Signal Cable.
4) Write LNB ON control command through RS-232-C.
5) check LED light ‘ON’ at 18V menu.
6) check LED light ‘ON’ at 22KHz tone menu.
7) Write LNB OFF control command through RS-232-C.
8) check LED light ‘OFF’ at 18V menu.
9) check LED light ‘OFF’ at 22KHz tone menu.
(2) RS-232 command for test LNB
(3) Test result
- After send LNB On command, ‘18V LED’ and ‘22KHz
tone LED’ should be ON.
- After send LNB OFF command, ‘18V LED’ and ‘22KHz
tone LED’ should be OFF.
<Remark> After the measurement conditions witnessed in
the last state.
5. Set Information
(Serial No & Model name)
5.1. Check the serial number & Model Name
(1) Push the menu button and press red button on R/C to
enter ‘Customer Support’menu.
(2) Move to ‘signal test’ menu. And check Serial No & Model
Name Select the STATION -> Diagnostics -> To set
6. SW Download Guide.
* Before put a *.epk to USB Stick make ‘LG_DTV’ folder in
USB. Then, put *.epk file to ‘LG_DTV’ folder and Turn on TV
(1) Put the USB Stick to the USB socket
(2) Automatically detecting update file in USB Stick
* If your downloaded program version in USB Stick is Low,
it didn’t work.
But your downloaded version is High, USB data is
automatically detecting.
(3) Show the message “Copying files from memory”
(4) Updating is staring.
(5) Updating Completed, The TV will restart automatically.
After turn on TV, Please press ‘IN-STOP’ button on ADJ
Remote-control.
* IF you don’t have ADJ R/C, enter ‘Factory Reset’ in
OPTION MENU.
(6) When TV turns on, check the Updated version on Product/
Service Info. MENU.
* After downloading, have to adjust TOOL OPTION again.
Command
Set ACK
LNB On
[A][I][ ][Set ID][ ][30][Cr]
[O][K][x] or NG : [N][G][x]
LNB Off
[A][I][ ][Set ID][ ][40][Cr]
[O][K][x] or NG : [N][G][x]
G
tGi
{
k}iTzYGG
ck}iGGGqpnGGe
4;Y
46Y
55NK}#
Wrqh RQ
Wrqh RQ
55NK}
Wrqh#Rii
Wrqh#Rii
tGi
{
k}iTzYGG
ck}iGGGqpnGGe
4;Y
46Y
55NK}#
Wrqh RQ
Wrqh RQ
55NK}
Wrqh#Rii
Wrqh#Rii
4;Y
46Y
55NK}#
Wrqh RQ
Wrqh RQ
55NK}
Wrqh#Rii
Wrqh#Rii
G
tGi
{
k}iTzYGG
ck}iGGGqpnGGe
4;Y
46Y
55NK}#
Wrqh RQ
Wrqh RQ
55NK}
Wrqh#Rii
Wrqh#Rii
tGi
{
k}iTzYGG
ck}iGGGqpnGGe
4;Y
46Y
55NK}#
Wrqh RQ
Wrqh RQ
55NK}
Wrqh#Rii
Wrqh#Rii
4;Y
46Y
55NK}#
Wrqh RQ
Wrqh RQ
55NK}
Wrqh#Rii
Wrqh#Rii
- 11 -
BLOCK DIAGRAM
- 12 -
LV
1
A12
A10
A2
A21
400
305
301
300
580
520
601
240
200
570
201
202
203
205
910
900
204
120
302
303
304
560
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
CI_ADDR[3]
EMMC_DATA[2]
CI_ADDR[9]
CI_ADDR[14]
CI_ADDR[7]
CI_ADDR[10]
EMMC_DATA[4]
CI_DATA[5]
CI_ADDR[0]
CI_DATA[4]
EMMC_DATA[6]
CI_ADDR[12]
MT5369_TS_OUT[2]
CI_ADDR[11]
MT5369_TS_OUT[7]
CI_ADDR[5]
MT5369_TS_OUT[6]
CI_ADDR[6]
CI_ADDR[1]
FE_TS_DATA[7]
FE_TS_DATA[0]
CI_DATA[1]
FE_TS_DATA[1]
FE_TS_DATA[2]
CI_DATA[3]
CI_DATA[2]
FE_TS_DATA[4]
EMMC_DATA[5]
CI_ADDR[8]
MT5369_TS_OUT[5]
FE_TS_DATA[5]
FE_TS_DATA[6]
CI_DATA[6]
CI_DATA[0]
CI_DATA[7]
EMMC_DATA[3]
CI_ADDR[4]
MT5369_TS_OUT[3]
MT5369_TS_OUT[0]
CI_ADDR[2]
CI_ADDR[0-14]
FE_TS_DATA[3]
CI_ADDR[13]
EMMC_DATA[7]
MT5369_TS_OUT[4]
MT5369_TS_OUT[1]
R114
33
MT5369_TS_OUT[0-7]
COMP1_DET
R134
33
LED_PWM1
R107
4.7K
HD
STB_SCL
R127
22
OPT
I2C_SDA3
/CI_CD2
R123
4.7K
Country_AJJA
MODEL_OPT_6
/USB_OCD1
MODEL_OPT_3
IC100-*1
M24256-BRMN6TP
NVRAM_ST
3
E2
2
E1
4
VSS
1
E0
5
SDA
6
SCL
7
WC
8
VCC
I2C_SDA5
R110
33
/USB_OCD2
AMP_RESET_N
R100
4.7K
OPT
MT5369_TS_IN[5]
/CI_CD1
R129
4.7K
MTK_DDR_1.5GB
FE_TS_SYNC
MT5369_TS_IN[0]
CI_DATA[0-7]
I2C_SCL3
/PCM_REG
MODEL_OPT_1
MT5369_XTAL_OUT
R143
4.7K
NO_S
R106
4.7K
OPCTRL_11_SCL
AMP_RESET_SOC
MODEL_OPT_9
I2C_SDA6
R125
4.7K
OPT
R156
1K
1K
R186
22
MT5369_TS_SYNC
R155
1K
1K
I2C_SDA4
I2C_SCL1
R115
33
R170
10K
R126
22
OPT
R108
4.7K
FHD
R101
4.7K
OPCTRL7
R182
33
R162
1K
1K
MT5369_TS_IN[4]
R139
4.7K
NO_T2
MODEL_OPT_5
R117
33
OSDA2
MODEL_OPT_6
/S2_RESET
+3.3V_MULTI
R142
2.7K
2.7K
MODEL_OPT_10
/PCM_OE
OPCTRL_0_SDA
R105
4.7K
COLOMBIA_TUNER
IC101
M24C16-R
OPT
3
NC_3
2
NC_2
4
VSS
1
NC_1
5
SDA
6
SCL
7
WC
8
VCC
/S2_RESET
/PCM_WAIT
EMMC_DATA[0]
R160
1K
1K
OPT
+3.3V_MULTI
R131
4.7K
MTK_DDR_1.25GB
R161
1K
1K
OPT
EMMC_DATA[2-7]
VDD3V3
R118
33
PCM_RST
MT5369_TS_CLK
R154
1K
1K
OPT
OSDA1
MT5369_TS_IN[7]
OSDA1
R168
10K
R147
2.7K
2.7K
R121
1.2K
1.2K
R136
4.7K
AVDD_33SB
OSCL0
OSCL2
R113
33
SOC_RESET
MT5369_TS_IN[3]
EMMC_DATA[1]
R187
4.7K
OPT
OSCL1
R146
4.7K
OPT
MODEL_OPT_8
SC_ID
EMMC_CMD
R102
4.7K
OPT
R122
4.7K
Non_Country_AJJA
OSCL1
I2C_SCL5
MODEL_OPT_0
/PCM_WE
I2C_SDA2
MT5369_MISTRT
MODEL_OPT_7
R144
4.7K
R140
4.7K
T2
MT5369_MIVAL_ERR
EMMC_CLK
I2C_SCL1
OPCTRL_10_SDA
R119
33
M_REMOTE_RST
EMMC_CLK
R180
4.7K
/TU_RESET
C100
0.1uF
OPT
16V
R130
4.7K
R116
33
R141
2.7K
2.7K
MT5369_MCLKI
I2C_SDA5
STB_SDA
OPCTRL_1_SCL
MT5369_TS_IN[6]
MT5369_TS_IN[1]
/PCM_IRQA
MODEL_OPT_7
R128
4.7K
OPT
FE_TS_CLK
MT5369_TS_VAL
AVDD_33SB
I2C_SCL2
C110
0.1uF
0.1uF
/PCM_CE1
I2C_SCL5
C117
0.1uF
16V
16V
R112
33
R104
4.7K
OPT
R137
4.7K
OPT
R135
33
I2C_SDA1
LED_PWM0
MODEL_OPT_2
FE_TS_DATA[0-7]
STB_SCL
+3.3V_MULTI
+3.3V_MULTI
MT5369_TS_IN[2]
R109
33
+3.3V_MULTI
R111
33
MODEL_OPT_3
R145
4.7K
S
R163
1K
1K
RF_SWITCH_CTL
I2C_SCL6
R157
1K
1K
OPT
AMP_RESET_SOC
/PCM_IORD
C109
0.1uF
0.1uF
R103
4.7K
NO_COLOMBIA_TUNER
FE_TS_VAL
OSDA0
MODEL_OPT_5
LED_PWM1
MODEL_OPT_0
OPCTRL_1_SCL
LED_PWM0
I2C_SDA1
R149
4.7K
OPT
R138
2.7K
2.7K
C111
0.1uF
0.1uF
+3.3V_MULTI
R188
4.7K
4.7K
OPT
/PCM_IOWR
MT5369_XTAL_IN
OPCTRL3
R169
10K
NO_EU
AVDD_33SB
+3.3V_MULTI
OPCTRL3
OSCL0
R148
4.7K
OPCTRL7
OPCTRL_0_SDA
R120
33
I2C_SCL4
USB_CTL1
CI_ADDR[0-14]
R189
10K
10K
OPT
R124
1.2K
1.2K
STB_SDA
R193
4.7K
M_REMOTE_TX
M_REMOTE_RX
OPCTRL_10_SDA
OPCTRL_11_SCL
EMMC_RST
C107
4.7uF
10V
4.7uF
10V
C112
4.7uF
10V
4.7uF
10V
R194 0
3D_SYNC_RF
MODEL_OPT_5
OSDA0
R167
10K
TP121
TP122
SC_DET
RS232_RXD
RS232_TXD
SW100
JTP-1127WEM
DEBUG
1
2
4
3
TP153
AV1_CVBS_DET
USB_CTL3
/USB_OCD3
CTS
RTS
FE_LNA_Ctrl2
FE_LNA_Ctrl1
MT5369_XTAL_OUT
MT5369_XTAL_IN
DSUB_DET
C114
2pF
C115
2pF
OTP_WRITE
R199
10K
D100
100V
1N4148W
+3.3V_MULTI
OTP_WRITE
R152
2K
R153
2K
AR100
10K
+3.3V_MULTI
R171
10K
#SIL_RESET
R198
10K
IC100
AT24C256C-SSHL-T(Cu)
NVRAM_ATMEL
3
A2
2
A1
4
GND
1
A0
5
SDA
6
SCL
7
WP
8
VCC
R133
1.2K
1.2K
R132
1.2K
1.2K
R150
1.2K
1.2K
R151
1.2K
1.2K
X100
27MHz
4
GND_2
1
X-TAL_1
2
GND_1
3
X-TAL_2
JP_GND_1
JP_GND_2
JP_GND_3
JP_GND_4
Q100
PMV48XP
G
D
S
IC105
LGE2122[A2_M13]
JTCK
AK10
JTDI
AK11
JTDO
AL9
JTMS
AJ11
JTRST
AJ12
OSDA0
AH11
OSCL0
AH10
OSDA1
AF11
OSCL1
AG11
XTALI
AN29
XTALO
AM29
AVDD33_XTAL_STB
AN30
AVSS33_XTAL_STB
AL29
AVDD33_VGA_STB
AN17
AVSS33_AVSS33_VGA_STB
AL17
AVDD33_PLL
AL26
AVSS33_PLLGP
AC21
AVSS33_CPUPLL
H21
AVDD10_LDO
AM17
AVDD10_ELDO
AN16
U0TX
AH15
U0RX
AH14
U1TX
AH13
U1RX
AG13
POWE
D24
POOE
B25
POCE1
D25
POCE0
A25
PDD7
C22
PDD6
B22
PDD5
A22
PDD4
C23
PDD3
A23
PDD2
B23
PDD1
D23
PDD0
C24
PARB
C25
PACLE
A26
PAALE
B26
EMMC_CLK
C21
OPWRSB
AL15
ORESET
AK20
OIRI
AF17
FSRC_WR
C20
STB_SCL
AL14
STB_SDA
AK15
POR_BND
AE14
IC105
LGE2122[A2_M13]
GPIO0
B30
GPIO1
A31
GPIO2
B31
GPIO3
A32
GPIO4
C30
GPIO5
A33
GPIO6
B32
GPIO7
C31
GPIO8
E30
GPIO9
F29
GPIO10
F27
GPIO11
F28
GPIO12
C32
GPIO13
F30
GPIO14
F32
GPIO15
D30
GPIO16
D32
GPIO17
F31
GPIO18
F33
GPIO19
E31
GPIO20
E32
GPIO21
D31
GPIO22
D33
GPIO23
E29
GPIO24
C33
GPIO25
B33
GPIO26
A30
GPIO27
E28
GPIO28
C29
GPIO29
J28
GPIO30
H29
GPIO31
J26
GPIO32
G30
GPIO33
G27
GPIO34
E27
GPIO35
D29
GPIO36
D28
GPIO37
H28
GPIO38
J27
GPIO39
G29
GPIO40
G31
GPIO41
G28
GPIO42
B28
GPIO43
K28
GPIO44
E25
GPIO45
D21
GPIO46
G23
GPIO47
C28
GPIO48
F24
GPIO49
AB8
GPIO50
AA7
GPIO51
AD6
GPIO52
AC8
GPIO53
AC7
GPIO54
AB6
GPIO55
AC6
ADIN0_SRV
AJ23
ADIN1_SRV
AH23
ADIN2_SRV
AE28
ADIN3_SRV
AD28
ADIN4_SRV
AF22
ADIN5_SRV
AK21
ADIN6_SRV
AG24
ADIN7_SRV
AM18
DEMOD_RST
P30
DEMOD_TSCLK
N32
DEMOD_TSDATA0
R27
DEMOD_TSDATA1
T26
DEMOD_TSDATA2
T27
DEMOD_TSDATA3
P26
DEMOD_TSDATA4
R28
DEMOD_TSDATA5
U27
DEMOD_TSDATA6
U26
DEMOD_TSDATA7
R26
DEMOD_TSSYNC
R29
DEMOD_TSVAL
P27
CI_INT
L25
CI_TSCLK
N33
CI_TSDATA0
K26
CI_TSSYNC
N30
CI_TSVAL
N31
PVR_TSCLK
M31
PVR_TSVAL
M27
PVR_TSSYNC
L27
PVR_TSDATA0
M29
PVR_TSDATA1
M30
SPI_CLK1
L30
SPI_CLK
L33
SPI_DATA
L32
SPI_CLE
K27
OPWM2
AL8
OPWM1
AM8
OPWM0
AM9
SD_D0
D27
SD_D1
C27
SD_D2
D26
SD_D3
C26
SD_CMD
A28
SD_CLK
E24
LED_PWM1
AF15
LED_PWM0
AG15
OPCTRL11
AL16
OPCTRL10
AM16
OPCTRL9
AE17
OPCTRL8
AG19
OPCTRL7
AH17
OPCTRL6
AE19
OPCTRL5
AH19
OPCTRL4
AK16
OPCTRL3
AG17
OPCTRL2
AJ17
OPCTRL1
AF19
OPCTRL0
AJ19
R196
240
240
8
MID_MAIN_1
2011.12.13
Reserved
EPI
Not Support
T2 Tuner
X-TAL
CP BOX
MODEL_OPT_2
CI SLOT -> SOC
MODEL_OPT_5
I2C
DDR
MODEL_OPT_4
S Tuner
I2C_1 : AMP,HDCP KEY
I2C_2 : PDP_MODULE
I2C_3 : MICOM
I2C_4 : S/Demod,T2/Demod,LNB,MHL
I2C_5 : NVRAM
I2C_6 : TUNER_MOPLL(T/C,ATV)
I2C_2 : PDP_MODULE
I2C_3 : MICOM
I2C_4 : S/Demod,T2/Demod,LNB,MHL
I2C_5 : NVRAM
I2C_6 : TUNER_MOPLL(T/C,ATV)
MODEL_OPT_6
SOC -> CI SLOT
HIGH
SMARTCARD_FOR JAPAN
HDCP EEPROM
Support
MODEL_OPT_8
EXTERNAL DEMOD
-> SOC
-> SOC
Support
Enable
MODEL_OPT_9
SOC -> CI SLOT
Not Support
LOW
CI SLOT -> SOC
MODEL_OPT_4
5V Tolerance
Crystal Matching Test result : 3pF
NVRAM
PDP ATSC/DVB:EAX64874001
LCD DVB:EAX6479700* , LCD ATSC:EAX6487210*
LCD DVB:EAX6479700* , LCD ATSC:EAX6487210*
Model Option
Close to eMMC Flash
(IC8100)
(IC8100)
MODEL_OPT_7
STRAPPING LED_PWM0 LED_PWM1 OPCTRL3 OPCTRL7
ICE mode + 27M + serial boot 1 0 0 0
ICE mode + 27M + ROM to Nand boot 1 0 0 1
ICE mode + 27M + ROM to 60bit ECC Nand boot 1 0 1 0
ICE mode + 27M + ROM to eMMC boot from 1 0 1 1
EMMC pins (share pins w/s NAND)
EMMC pins (share pins w/s NAND)
ICE mode + 27M + ROM to eMMC 1 1 0 0
Boot from SDIO pins
Boot from SDIO pins
MODEL_OPT_10
MODEL_OPT_3
Support
FHD
HD
Write Protection
- Low : Normal Operation
- High : Write Protection
- High : Write Protection
DDR_1.5GB
MODEL_OPT_0
MODEL_OPT_1
Disable
Not Support
CI SLOT -> SOC
CI SLOT -> SOC
MODEL_OPT_4
DDR_1.25GB
GPIO45(EMMC_RST) is dedicated to reset
EMMC for improving A1’s leakage current
EMMC for improving A1’s leakage current
Wake On Lan
Place the P901
LCD:OPC_EN
3D_SYNC_RF
LCD:EPI_LOCK6
LCD : CI_A_VS1
WOL_ON
Module_V13
Module_V12
FRC
FRC_120Hz
NO_FRC_60Hz
JIG_GND
DDR
High
High
MODEL_OPT_5
High
DDR_1.5G
Low
DDR_0.768G
Low
MODEL_OPT_9
Low
DDR_1.25G
NON_DDR_0.78G
DDR_0.78G
Non_TW
TW
Country_TW
AJJA
Country_AJJA
Non_AJJA
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