LG 50PG70F-UB (CHASSIS:PU82C) Service Manual ▷ View online
- 17 -
BLOCK DIAGRAM
Signal path for CVBS, Component, RGB
Comp1_Y
H Sync
V Sync
BCM3552/3
Comp1_Pb
Comp1_Pr
Component 1
Input
Component 2
Input
RGB Input
RGB H_Sync
Side AV
CVBS
Rear AV
Rear S_Video
Y/C
CVBS
CVBS 2
L1/C1
CVBS 3
L2/C2
ANT/ Cable
TUNER
IF_P
IF_N
IF_P from TUNER for DTV
IF_N from TUNER for DTV
CVBS 1
EEPROM
FOR EDID
DDC SDA
DDC SCL
RGB V_Sync
LVDS_Tx
Out
Component_1 S/W
Component_2 S/W
Rear_CVBS_ S/W
RGB S/W
GPIO[0:6]
Comp2_Y
Comp2_Pb
Comp2_Pr
RGB_G
RGB_B
RGB_R
DDC SCL to
Micom
for Download
LPF 6
Mhz
LPF 30Mhz
LPF 30Mhz
LPF 30Mhz
LPF 30Mhz
LPF 30Mhz
LPF 30Mhz
LPF 6
Mhz
LPF 6
Mhz
DDC SDA to
Micom
for Download
DVO Out[0:29]
Rear_S-Video_ S/W
Side_CVBS_ S/W
LVDS
Con.
26P(HD)
40P(FHD)
LVDS
Con.
- 18 -
BLOCK DIAGRAM
Signal path for HDMI
BCM355/23
HDCP SDA
HDCP SCL
NDA
NCL
HDMI 1
TMDS1 RX0+/-
TMDS1 RX1+/-
TMDS1 RX2+/-
TMDS1 RXCLK+/-
DDC SDA1
DDC SCL1
EEPROM
For EDID
HDMi
—
CEC
+5V Power_1
Hot Plug Detect_1
LVDS_Tx
Out
HDMI 2
TMDS2 RX0+/-
TMDS2 RX1+/-
TMDS2 RX2+/-
TMDS2 RXCLK+/-
DDC SDA2
DDC SCL2
EEPROM
For EDID
HDMi
—
CEC
+5V Power_2
Hot Plug Detect_2
TMDS341A
TMDS0
INPUT
DDC SDA
DDC SCL
TMDS1
INPUT
TMDS2
INPUT
TMDS RX0+/-
TMDS RX1+/-
TMDS RX2+/-
TMDS RXCLK+/-
Hot Plug Detect_0
TMDS
Out
TMDS_Rx
Input0
HDMi_Sel_0
HDMi_Sel_1
HDMi_Sel_2
Hot Plug Detect_1
Hot Plug Detect_2
+5V Power_0
+5V Power_1
+5V Power_2
GPIO[0:8]
Switch
Selection
DDC
INPUT
MTV416
Micom
HDMi
—
CEC
Parallel connections with
HDMi
0,1,2,4
LVDS out
31P
Con.
31P
LVDS
Con.
EEPROM
for HDCP
DDC SDA1
DDC SCL1
DDC SDA2
DDC SCL2
TMDS0 RX0+/-
TMDS0 RX1+/-
TMDS0 RX2+/-
TMDS0 RXCLK+/-
DDC SDA0
DDC SCL0
EEPROM
For EDID
HDMI 0
HDMi
—
CEC
+5V Power_0
Hot Plug Detect_0
DDC SDA0
DDC SCL0
DDC
OUT
HDMI 4
TMDS3 RX0+/-
TMDS3 RX1+/-
TMDS3 RX2+/-
TMDS3 RXCLK+/-
DDC SDA3
DDC SCL3
EEPROM
For EDID
HDMi
—
CEC
+5V Power_3
Hot Plug Detect_3
DDC SDA3
DDC SCL3
TMDS_Rx
Input1
- 19 -
BLOCK DIAGRAM
AV1_Audio
AV2_Audio
MNT_Audio
HDMI
(PC/DTV)
Comp2_Audio
RGB_Audio
Comp1_Audio
I2C SCL/SDA
[L1 / R1]
[L2 / R2]
[L3 / R3]
[L4 / R4]
[L5 / R5]
Switch
Switch
[Rout/Lout]
Audio
Switch
[CS5345]
I2S_CLK_IN/DATA_IN
/LR IN
(I2S_MCLK)
SPDIF OUT
Buffer
Buffer
PWM MODULATOR/
POWER AMP
[NTP3000A]
SIF IN
Broadcom
[BCM3552/3]
AUD_SPDIF
ANA L/R IN
BCM_MCLK
BCM_MCLK
I2S_CLK_IN
I2S_DATA_IN
I2S_LR_IN
RESET
RESET
I2S_CLK_OUT
I2S_DATA_OUT
I2S_LR_OUT
(NTP3000A)
I2S_CLK_OUT/
DATA_OUT/
LRCH OUT
I2C SCL/SDA
OUT1A/B
OUT2A/B
SPK R
SPK L
MNT_L/R OUT
HDMI Rx
I2S/SPDIF
Convert
HDMI_TMDS 0/1/2/3CLK
TUNER (ATSC/NTSC )
I2C SCL/SDA
Buffer
Buffer
SIF
IF_P
IF_N
AUD_LEFT/RIGHT P
HDMI_RX_DATA/CLK
BTSC
Decoder
MPEG2
Dolby
AUDIO
Processor
Signal path for AUDIO/ IF
SPDIF OUT(coaxial)
BCM_MCLK
IF AGC
CVBS
FRONT END
- 20 -
BLOCK DIAGRAM
BCM3553
4.7K
‰
5.0V
I2C_Channel 0
I2C_Channel 1
ATSC/NTSC Tuner
I2C_Channel 2
I2C_Channel 3
I2C0_5V
I2C1_5V
4.7K
‰
5.0V
Address
0xC2
0x9A
0x74
0xA6
0x94
0x54
0x50
0x??
0xD4
0x
I2C MAP
HDCP Key EEPROM
NTP3000
NVRAM
I2C2_3.3V
I2C3_3.3V
MTV416
4.7K
‰
3.3VST
1K
‰
3.3V
CS5345
PDP MODULE
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