LG 50PA4900-UD (CHASSIS:PU21A) Service Manual ▷ View online
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
P1
12507WS-08L
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
LED_R
EYE_SCL
EYE_SDA
+3.3V_ST
EYE_SCL
+3.3V_ST
EYE_SDA
C1
0.1uF
16V
0.1uF
16V
+3.3V_ST
R3
4.7K
4.7K
OPT
ZD1
5.6B
ZD3
5.6B
R2
330
C4
0.1uF
16V
0.1uF
16V
R1
47
+3.3V_ST
ZD2
5.6B
LED_R
ZD4
5.6B
LD1
LTST-C191KRKT
EAV60793101
ZD5
5.6B
ZD6
5.6B
ZD7
5.6B
IR
IR
KEY1
KEY2
ZD8
5.6B
ZD9
5.6B
C6
0.1uF
16V
0.1uF
16V
OPT
C5
0.1uF
16V
0.1uF
16V
OPT
+3.3V_ST
R13
2K
OPT
KEY2
KEY1
SW1
JTP1289
SW2
JTP1289
SW3
JTP1289
SW4
JTP1289
SW5
JTP1289
SW6
JTP1289
SW7
JTP1289
SW8
JTP1289
R4
4.7K
4.7K
+3.3V_ST
R15
10K
Q1
MMBT3904(NXP)
MMBT3904(NXP)
E
B
C
C2
10uF
6.3V
10uF
6.3V
C3
10uF
6.3V
10uF
6.3V
OPT
C7
10uF
6.3V
10uF
6.3V
OPT
R5
27K
R8
27K
R6
3.9K
R10
3.9K
R7
10K
R11
10K
R9
620
R12
620
IC2
KSM-903SMR1CL
1
VOUT
2
GND
3
VCC
R14
2.7K
IC1
CM3231A3OG
1
GND
2
SDAT
3
SCLK
4
VDD
ZD4-*1
5.48VTO5.76V
ZD5-*1
5.48VTO5.76V
ZD6-*1
5.48VTO5.76V
ZD7-*1
5.48VTO5.76V
ZD3-*1
5.48VTO5.76V
ZD1-*1
5.48VTO5.76V
ZD2-*1
5.48VTO5.76V
ZD8-*1
5.48VTO5.76V
ZD9-*1
5.48VTO5.76V
SW8-*1
JTP1283
1
2
3
SW7-*1
JTP1283
1
2
3
SW6-*1
JTP1283
1
2
3
SW5-*1
JTP1283
1
2
3
SW4-*1
JTP1283
1
2
3
SW3-*1
JTP1283
1
2
3
SW2-*1
JTP1283
1
2
3
SW1-*1
JTP1283
1
2
3
8Pin Wafer to Main
Green Eye Sensor
IR Receiver
Tact Switch
RED LED
Power
Input
Home
OK
Vol-
Vol+
CH-
CH+
2.4V
0.93V
1.65V
2.4V
0.2V
0.93V
1.65V
0.2V
EAX64342101
12/04/2011
Tact/IR/Eye
1
1
(KEY1) (KEY1)
(KEY1) (KEY1)
(KEY2)(KEY2)
(KEY2) (KEY2)
GP2R, LM1 Training Manual
Table of contents
1. PCB layout.
2. GP2R vs LM1
3. GP2R. (Block, Power, I2C)
4. LM1. (Block, Power, I2C)
5. LM1 SOC Power sequence.
6. Memory test.
7. Pen touch overview.
1. PCB Layout.
GP2R (206 x 183)
LM1 (206 x 141.5)
※ LM1 use internal EDID&HDCP. (LM1 is Removing the EEPROM for EDID&HDCP)
LM1 is optimizing Power block. (LM1 is reducing DC/DC, LDO, power application)
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