DOWNLOAD LG 47LW980G / 47LW980S-ZA / 47LW980T / 47LW980W (CHASSIS:LD12D) Service Manual ↓ Size: 18.58 MB | Pages: 108 in PDF or view online for FREE

Model
47LW980G 47LW980S-ZA 47LW980T 47LW980W (CHASSIS:LD12D)
Pages
108
Size
18.58 MB
Type
PDF
Document
Service Manual
Brand
Device
TV / LCD
File
47lw980g-47lw980s-za-47lw980t-47lw980w-chassis-ld1.pdf
Date
PREV: LG 47LW650G-ZC / 47LW650S-ZC / 47LW650T-ZC / 47LW650W-ZC / 47LW659S-ZC (CHASSIS:LD12C) Service Manual

LG 47LW980G / 47LW980S-ZA / 47LW980T / 47LW980W (CHASSIS:LD12D) Service Manual ▷ View online

Main PCB for Broadband
To PSU
1
2
3
4
1
Main processor, DDR Memory
Flash Memory
2
3
4
Micom for Key/IR sensing 
HDMI switch (4:1)
Audio AMP (10W+10W)
XXLW5500/T/W/S-ZA
XXLW650W/G/S-ZA
XXLW570G/S-ZA
Soft touch +IR
Front Spk
To T-CON 
BOARD
5
5
URSA5 External FRC
0/T/W 
model
G/S
model
2
1
LNB IC 
Only G/S model
1
2
Main Board without T-con b’d
Main PCB for Broadband
To PSU
1
2
3
4
1
Main processor, DDR Memory
Flash Memory
2
3
4
Micom for Key/IR sensing 
HDMI switch (4:1)
Audio AMP (10W+10W)
XXLV5500/T/W/G-ZA
XXLV570G/S-ZA
Soft touch +IR
Front Spk
To T-CON 
BOARD
0/T/W 
model
name
G/S
model
name
LNB IC 
Only G/S model
2
1
1
2
Main Board without T-con b’d
™ Passive Type ( LW98)
RF
Component
RGB
USB
HDMI 1.3/
HDMI 1.4
LCD 
240Hz Panel 
DTV
SoC
LG5811
(XTR
T-con)
BD Player
DTV Main 
board
FRC Sub board
3DTV System
Mini
LVDS
FRC
2D to 3D
URSA5 x 2
GP3 Backend block diagram (LW98 PG)
80P mini-LVDS Output
RIGHT
80P mini-LVDS Output
LEFT
51Pin LVDS Input
+1.26V_URSA5
DC-DC Converter
(AOZ1073AI)
DC-DC Converter
(AOZ1073AI)
DC-DC Converter
(AOZ1073AI)
VLCD_POWER
+3.3V_URSA5
DC-DC Converter
(AOZ1073AI)
DC-DC Converter
(AOZ1073AI)
DC-DC Converter
(AOZ1073AI)
VLCD_POWER
XTR 
T-Con
(0x72)
M/SPIF
Quad-link LVDS
DDR3 SDRAM
-
1Gbit (x16)
-
800Mbps
DDR3 SDRAM
-
1Gbit (x16)
- 800Mbps
DDR3 SDRAM
-
1Gbit (x16)
-
800Mbps
DDR1_DATA[15:
0]
DDR1_A[12:0]/
BA[2:0]/CLK/CKE
URSA5
(0xB8, slave)
XIN
I2C_S
I2C_SDA_M
I2C_SCL_M
XTAL_IN
XTAL_OUT
X-Tal
(24Mhz)
URSA5
(0xB4, master)
I2C_M
I2
C_
SD
A_
M
I2
C_
SC
L_
M
DDR3 SDRAM
-
1Gbit (x16)
-
800Mbps
DDR3 SDRAM
-
1Gbit (x16)
- 800Mbps
DDR3 SDRAM
-
1Gbit (x16)
-
800Mbps
DDR0_DATA[15:
0]
DDR0_A[12:0]/
BA[2:0]/CLK/CKE
SPI FLASH
(4Mbit)
SPI FLASH
(4Mbit)
SPI FLASH
(4Mbit)
SPI_DI
SPI_DO/CK/CS
Xin/
Xout
GPIO
/XOUT
Quad-link LVDS
I2C_SDA
I2C_SCL
EEPROM
(64kbit)
EEPROM
(64kbit)
EEPROM
(64kbit)
I2C_TCON_SDA
I2C_TCON_SCL
I2
C_
SD
A
I2
C_
SC
L
VLCD_POWER
(+12V)
FRC_RESE
T
I2
C_
SD
A
I2
C_
SC
L
Z_OUT
Dual-link HF mini-LVDS
(@297MHz)
Dual-link HF mini-LVDS
(@297MHz)
Dual-link LVDS(@74.25MHz)
I2C_SDA
I2C_SC
L
VCC_LCM/VDD_LCM/
HVDD
P-GAMMA
IC
(BUF08630)
(0xE8)
P-GAMMA
IC
(BUF08630)
(0xE8)
P-GAMMA
IC
(BUF08630)
(0xE8)
GMA[18:15],
GMA[9:5]
P_VCOM
I2C_SDA
I2C_SC
L
VCC_LCM/VDD_LCM/
HVDD
P-GAMMA
IC
(BUF08630)
(0xEA)
P-GAMMA
IC
(BUF08630)
(0xEA)
P-GAMMA
IC
(BUF08630)
(0xEA)
GMA[14:10],
GMA[4:1]
PMIC
(MAX17139)
(0x42)
PMIC
(MAX17139)
(0x42)
PMIC
(MAX17139)
(0x42)
VCC_LCM/VDD_LCM
/
VGH/VGL/HVDD/VCORE
VLCD_POWER
I2C_SDA
I2C_SC
L
+3.3_URSA5
+1.5V_DDR
DC-DC Converter
(AOZ1072AI)
DC-DC Converter
(AOZ1072AI)
DC-DC Converter
(AOZ1072AI)
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