LG 47LM6690 (CHASSIS:LT22E) Service Manual ▷ View online
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◈ CONTENT ◈
1. Model naming and tool option
2. New features
3. Main PCBs
4. Block Diagrams, IIC Map
5. Structure of TV set and connection of sub ass’ys
6. New sub ass’ys
- Instruction of new sub ass’ys
- How to use tool
- Download
7. Adjust way of new features
8. Repair guide
9. The latest issue and concerning issue
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EPI Interface
EPI(Embedded Point-Point Interface)
Features
•
Point-Point topology (support 2 Pair option)
•
CDR (Clock Data Recovery)
•
Bandwidth up to 1.85Gbps/pair at FHD 120Hz 10 bit application
•
Lock signal cascading and feedback to T-Con
•
Embedded Control Data
Merits
•
Better reliability on common noise
•
No data skew and better EMI margin
•
Fewer lines than mini-LVDS
•
Slim PCB design
TCON
2
LOCK
VCC
1
Figure1. Topology
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EPI Interface (mini-LVDS vs. EPI)
Comparison
HF mini-LVDS
What to change
EPI (Embedded clock P-to-P Interface)
-Difficult to upgrade bandwidth limit
-Multiple number of wires needed for higher bandwidth
-Multiple number of wires needed for higher bandwidth
HF mini-
LVDS
FHD (10bit)
60Hz
120Hz
240Hz
No. of Signal
36
36
72
Connector
60pin
(2ea)
60pin
(2ea)
80pin
(2ea)
-Better reliability on common noise
-No data skew. Better EMI margin
-Lower cost ( Cable, Connector )
-No data skew. Better EMI margin
-Lower cost ( Cable, Connector )
-Slim S-PCB design (14mm
Æ 10mm) helps slimmer TV
EPI
FHD (10bit)
60Hz
120Hz
240Hz
960ch
960ch
720ch
No. of Signal
12
12
32
Connector
-
50 pin
(2ea)
70pin
(2ea)
LCM (T-con to S-Driver IC)
TCON
2
LOCK
VCC
1
TCON
18
VCC
1
18
HF mini-LVDS
EPI
* Bandwidth Capability
- FHD 120Hz 10Bit : 594Mbps@36Lines → 1.65Gbps@12Lines
- FHD 240Hz 10Bit : 594Mbps@72Lines → 1.25Gbps@32Lines
- FHD 240Hz 10Bit : 594Mbps@72Lines → 1.25Gbps@32Lines
(FHD 120Hz)
(FHD 120Hz)
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HF mini-LVDS
EPI
Topology
Protocol
Features
@10bit, FHD120
• Multi Drop
• Data rate: 660Mbps
• External clock
• Data rate: 660Mbps
• External clock
• Point to Point
• Data rate : 1.8Gbps
• Embedded clock, Control
• Data rate : 1.8Gbps
• Embedded clock, Control
Merit
• Simple structure
• Standardization
• Standardization
• Fewer Lines : 12
• Embedded clock
• Embedded clock
: low EMI, Clock skew free
• Easy to PCB design
Demerit
• Too many lines : 36
• Clock skew
• EMI due to clock lines
• Bandwidth limit
• Clock skew
• EMI due to clock lines
• Bandwidth limit
• Transmission Overhead
: 4bit delimiter
TCON
Lock
2
1
TCON
EPI Interface (mini-LVDS vs. EPI)
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