LG 47LH70YD (CHASSIS:LJ91D) Service Manual ▷ View online
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
DDR Memory
BCM (BRAZIL VENUS)
08.10.15
DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]
DDR0_A[4]
DDR0_A[5]
DDR0_A[6]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[10]
DDR01_A[12]
DDR01_A[13]
DDR01_A[11]
DDR1_A[4]
DDR1_A[5]
DDR1_A[6]
DDR0_DQ[0]
DDR0_DQ[1]
DDR0_DQ[2]
DDR0_DQ[3]
DDR0_DQ[4]
DDR0_DQ[5]
DDR0_DQ[6]
DDR0_DQ[7]
DDR0_DQ[12]
DDR0_DQ[15]
DDR0_DQ[8]
DDR0_DQ[13]
DDR0_DQ[9]
DDR0_DQ[10]
DDR0_DQ[11]
DDR0_DQ[14]
DDR1_DQ[4]
DDR1_DQ[12]
DDR1_DQ[7]
DDR1_DQ[0]
DDR1_DQ[5]
DDR1_DQ[8]
DDR1_DQ[1]
DDR1_DQ[13]
DDR1_DQ[15]
DDR1_DQ[9]
DDR1_DQ[10]
DDR1_DQ[11]
DDR1_DQ[14]
DDR1_DQ[2]
DDR1_DQ[3]
DDR1_DQ[6]
DDR01_A[0]
DDR01_A[1]
DDR01_A[2]
DDR01_A[3]
DDR01_A[7]
DDR01_A[8]
DDR01_A[9]
DDR01_A[12]
DDR01_A[13]
DDR01_A[10]
DDR01_A[11]
DDR0_A[4]
DDR0_A[6]
DDR0_A[5]
DDR1_A[4]
DDR1_A[5]
DDR1_A[6]
DDR01_A[2]
DDR1_DQ[0]
DDR1_DQ[4]
DDR1_DQ[11]
DDR1_DQ[6]
DDR1_DQ[12]
DDR01_A[7]
DDR1_DQ[2]
DDR1_DQ[14]
DDR1_DQ[8]
DDR1_A[5]
DDR1_DQ[3]
DDR1_DQ[1]
DDR01_A[3]
DDR01_A[0]
DDR01_A[8]
DDR1_DQ[7]
DDR01_A[1]
DDR01_A[12]
DDR01_A[9]
DDR1_DQ[9]
DDR01_A[11]
DDR1_DQ[13]
DDR1_A[4]
DDR01_A[10]
DDR1_DQ[10]
DDR1_A[6]
DDR1_DQ[15]
DDR1_DQ[5]
DDR01_A[2]
DDR0_DQ[0]
DDR0_DQ[4]
DDR0_DQ[11]
DDR0_DQ[6]
DDR0_DQ[12]
DDR01_A[7]
DDR0_DQ[2]
DDR0_DQ[14]
DDR0_DQ[8]
DDR0_A[5]
DDR0_DQ[3]
DDR0_DQ[1]
DDR01_A[3]
DDR01_A[0]
DDR01_A[8]
DDR0_DQ[7]
DDR01_A[1]
DDR01_A[12]
DDR01_A[9]
DDR0_DQ[9]
DDR01_A[11]
DDR0_DQ[13]
DDR0_A[4]
DDR01_A[10]
DDR0_DQ[10]
DDR0_A[6]
DDR0_DQ[15]
DDR0_DQ[5]
A1.2V
C345
0.1uF
C346
0.1uF
DDR01_CKE
E5;H5;I2
DDR01_ODT
E5;H5;I1
DDR0_CLK
E5
DDR0_CLKb
E5
DDR1_CLK
H5
DDR1_CLKb
H5
DDR01_A[0-3]
E6;H6;H2
DDR0_A[4-6]
D6;H2
DDR01_A[7-13]
E6;H6;H2
DDR1_A[4-6]
H6;H1
DDR01_BA0
DDR01_BA1
DDR01_BA2
DDR01_CASb
DDR0_DQ[0-15]
G6
DDR1_DQ[0-15]
J6
DDR0_DM0
E4
DDR0_DM1
E4
DDR1_DM1
H4
DDR1_DM0
H4
DDR0_DQS0b
E4
DDR0_DQS0
E4
DDR0_DQS1
E4
DDR0_DQS1b
E4
DDR1_DQS0
H4
DDR1_DQS1
H4
DDR1_DQS1b
H4
DDR1_DQS0b
H4
DDR01_RASb
E5;H5;I1
DDR0_VREF0
DDR1_VREF0
DDR01_WEb
R304
75
R305
75
R306
75
R307
75
R310
75
OPT
R308
75
R309
75
R311
75
C336
0.01uF
0.01uF
C337
0.01uF
0.01uF
C338
0.01uF
0.01uF
C339
0.01uF
0.01uF
C340
0.01uF
0.01uF
C341
0.01uF
0.01uF
DDR01_CKE
B6;E5;H5
DDR01_BA0
B5;E5;H5
DDR01_BA1
B5;E5;H5
DDR01_BA2
B5;E5;H5
DDR01_ODT
B6;E5;H5
DDR01_RASb
B2;E5;H5
DDR01_CASb
B5;E5;H5
DDR01_WEb
B2;E5;H5
DDR01_A[0-3,7-13]
DDR0_A[4-6]
DDR1_A[4-6]
DDR1_DQ[0-15]
B4
DDR1_CLKb
B6
R303
100
DDR1_VREF0
DDR1_DM0
B3
DDR1_DQS0
B3
DDR01_WEb
B2;E5;I1
DDR1_A[4-6]
B5;H1
DDR01_CASb
B5;E5;I1
DDR1_DM1
B3
DDR01_BA2
B5;E5;I1
D1.8V
C321
470pF
DDR01_CKE
B6;E5;I2
DDR1_CLK
B6
DDR01_A[0-3,7-13]
B6;E6;H2;B5
DDR1_DQS1
B3
DDR01_BA1
B5;E5;I1
DDR1_DQS1b
B3
DDR01_BA0
B5;E5;I1
C322
0.1uF
DDR01_ODT
B6;E5;I1
DDR1_DQS0b
B3
DDR01_RASb
B2;E5;I1
DDR0_DQ[0-15]
B4
DDR0_CLKb
B6
R300
100
DDR0_VREF0
DDR0_DM0
B3
DDR0_DQS0
B3
DDR0_A[4-6]
B6;H2
DDR01_WEb
B2;H5;I1
DDR01_CASb
B5;H5;I1
DDR01_BA2
B5;H5;I1
DDR0_DM1
B3
C300
470pF
D1.8V
DDR01_CKE
B6;H5;I2
DDR0_CLK
B6
DDR01_A[0-3,7-13]
B6;H6;H2;B5
DDR0_DQS1
B3
DDR01_BA1
B5;H5;I1
DDR0_DQS1b
B3
DDR01_BA0
B5;H5;I1
C301
0.1uF
DDR01_ODT
B6;H5;I1
DDR0_DQS0b
B3
DDR01_RASb
B2;H5;I1
D1.8V
R312
0
OPT
R313
240
C355
0.1uF
C358
1uF
C359
470pF
C360
470pF
C361
1uF
C362
0.1uF
0.1uF
DDR_VTT
C343
1uF
C342
470pF
C347
1uF
C344
470pF
R301
22
C307
0.1uF
C316
2700pF
C313
0.1uF
C329
470pF
C331
0.1uF
C314
0.01uF
C334
2700pF
C324
10uF
C311
470pF
D1.8V
C335
470pF
C310
2700pF
D1.8V
C351
0.1uF
C317
470pF
C312
10uF
C350
0.1uF
C323
100uF
C326
0.01uF
C305
100uF
C333
0.047uF
C327
0.047uF
C325
0.1uF
C354
0.1uF
C308
0.01uF
C352
0.1uF
C330
10uF
C332
0.01uF
C328
2700pF
C306
10uF
C353
0.1uF
C309
0.047uF
C315
0.047uF
C349
0.1uF
D3.3V
C869
100uF
100uF
16V
DDR1_VREF0
R851
0
C834
0.1uF
16V
0.1uF
16V
DDR_VTT
DDR0_VREF0
C874
10uF
10V
10uF
10V
R858
1M
D1.8V
C897
0.1uF
16V
0.1uF
16V
C864
0.1uF
16V
0.1uF
16V
IC808
BD35331F-E2
3
VTTS
2
EN
4
VREF
1
GND
5
VDDQ
6
VCC
7
VTT_IN
8
VTT
R850
0
C866
0.1uF
16V
C831
0.1uF
16V
0.1uF
16V
C871
1uF
6.3V
1uF
6.3V
C867
100uF
16V
100uF
16V
IC100
BCM3556
DDR_BVDD0
A6
DDR_BVDD1
A24
DDR_BVSS0
B7
DDR_BVSS1
B24
DDR_PLL_TEST
F20
DDR_PLL_LDO
B23
DDR01_CKE
B17
DDR_COMP
C22
DDR01_ODT
E16
DDR_EXT_CLK
C23
DDR0_CLK
B12
DDR0_CLKB
C12
DDR1_CLK
A13
DDR1_CLKB
A12
DDR01_A00
B15
DDR01_A01
E14
DDR01_A02
A15
DDR01_A03
D15
DDR0_A04
E13
DDR0_A05
E12
DDR0_A06
F13
DDR01_A07
C14
DDR01_A08
F14
DDR01_A09
B14
DDR01_A10
D14
DDR01_A11
C13
DDR01_A12
D13
DDR01_A13
B13
DDR1_A04
F15
DDR1_A05
C15
DDR1_A06
D16
DDR01_BA0
F16
DDR01_BA1
B16
DDR01_BA2
E15
DDR01_CASB
A17
DDR0_DQ00
A8
DDR0_DQ01
B11
DDR0_DQ02
B8
DDR0_DQ03
D11
DDR0_DQ04
E11
DDR0_DQ05
C8
DDR0_DQ06
C11
DDR0_DQ07
C9
DDR0_DQ08
D8
DDR0_DQ09
E10
DDR0_DQ10
E9
DDR0_DQ11
F11
DDR0_DQ12
F12
DDR0_DQ13
E8
DDR0_DQ14
D10
DDR0_DQ15
F8
DDR1_DQ00
C18
DDR1_DQ01
C20
DDR1_DQ02
A18
DDR1_DQ03
B21
DDR1_DQ04
C21
DDR1_DQ05
B18
DDR1_DQ06
B20
DDR1_DQ07
D18
DDR1_DQ08
E18
DDR1_DQ09
D21
DDR1_DQ10
F18
DDR1_DQ11
E20
DDR1_DQ12
A22
DDR1_DQ13
F17
DDR1_DQ14
B22
DDR1_DQ15
E17
DDR0_DM0
A10
DDR0_DM1
C10
DDR1_DM0
A20
DDR1_DM1
F19
DDR0_DQS0
B10
DDR0_DQS0B
B9
DDR0_DQS1
F10
DDR0_DQS1B
F9
DDR1_DQS0
B19
DDR1_DQS0B
C19
DDR1_DQS1
E19
DDR1_DQS1B
D19
DDR01_RASB
C16
DDR_VREF0
A7
DDR_VREF1
A23
DDR01_WEB
C17
DDR_VDDP1P8_1
C7
DDR_VDDP1P8_2
D22
IC301
HYB18TC1G160C2F-1.9
Qimonda
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
BA2
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC4
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC5
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
IC300
HYB18TC1G160C2F-1.9
Qimonda
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
BA2
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC4
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC5
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
IC300-*1
EDE1116ACBG-1J-E
ELPIDA
J2
VREF
J8
CK
H2
VSSQ_2
B7
UDQS
N8
A4
P8
A8
L1
BA2
L2
BA0
R8
NC_3
K7
RAS
F8
VSSQ_3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC_5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ_4
B3
UDM
M2
A10
K2
CKE
R7
NC_6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC_1
N2
A3
P2
A7
H8
VSSQ_1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC_2
E7
VSSQ_5
D8
VSSQ_6
D2
VSSQ_7
A7
VSSQ_8
B8
VSSQ_9
B2
VSSQ_10
P9
VSS_1
N1
VSS_2
J3
VSS_3
E3
VSS_4
A3
VSS_5
G9
VDDQ_1
G7
VDDQ_2
G3
VDDQ_3
G1
VDDQ_4
E9
VDDQ_5
C9
VDDQ_6
C7
VDDQ_7
C3
VDDQ_8
C1
VDDQ_9
A9
VDDQ_10
R1
VDD_1
M9
VDD_2
J9
VDD_3
E1
VDD_4
A1
VDD_5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
IC301-*1
EDE1116ACBG-1J-E
ELPIDA
J2
VREF
J8
CK
H2
VSSQ_2
B7
UDQS
N8
A4
P8
A8
L1
BA2
L2
BA0
R8
NC_3
K7
RAS
F8
VSSQ_3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC_5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ_4
B3
UDM
M2
A10
K2
CKE
R7
NC_6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC_1
N2
A3
P2
A7
H8
VSSQ_1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC_2
E7
VSSQ_5
D8
VSSQ_6
D2
VSSQ_7
A7
VSSQ_8
B8
VSSQ_9
B2
VSSQ_10
P9
VSS_1
N1
VSS_2
J3
VSS_3
E3
VSS_4
A3
VSS_5
G9
VDDQ_1
G7
VDDQ_2
G3
VDDQ_3
G1
VDDQ_4
E9
VDDQ_5
C9
VDDQ_6
C7
VDDQ_7
C3
VDDQ_8
C1
VDDQ_9
A9
VDDQ_10
R1
VDD_1
M9
VDD_2
J9
VDD_3
E1
VDD_4
A1
VDD_5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
BCM recommends to remove this R
6
15
HONG YEON HYUK
* DDR_VTT
[E1]
[D1]
[L9]
[N5]
[N4]
[N12]
[N13]
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2008.10.15
LVDS / Mstar FRC
BCM (BRAZIL VENUS)
URSA_DQ[28]
URSA_C4P
URSA_A[10]
URSA_C4M
URSA_DQ[14]
URSA_D1P
URSA_DQ[0-31]
URSA_DQ[4]
URSA_BCKM
URSA_A[1]
URSA_DQ[25]
URSA_DQ[18]
URSA_DQ[21]
URSA_A4M
URSA_BCKP
URSA_DQ[9]
URSA_B2P
URSA_DQ[6]
URSA_A[8]
URSA_B1M
URSA_B0M
URSA_B1P
URSA_B0P
URSA_A[3]
URSA_A4P
URSA_A3P
URSA_D3M
URSA_DCKM
URSA_DQ[5]
URSA_DQ[12]
URSA_DCKP
URSA_B2M
URSA_D2P
URSA_A[5]
URSA_D2M
URSA_DQ[3]
URSA_DQ[20]
URSA_DQ[26]
URSA_A3M
URSA_ACKM
URSA_DQ[31]
URSA_A2P
URSA_B4M
URSA_DQ[30]
URSA_DQ[0]
URSA_A[2]
URSA_DQ[7]
URSA_DQ[2]
URSA_A[11]
URSA_A[6]
URSA_C2P
URSA_C0P
URSA_A[7]
URSA_DQ[16]
URSA_DQ[27]
URSA_DQ[29]
URSA_DQ[10]
URSA_DQ[17]
URSA_DQ[19]
URSA_ACKP
URSA_A1M
URSA_A2M
URSA_A1P
URSA_A0P
URSA_A0M
URSA_C0M
URSA_C1P
URSA_C1M
URSA_DQ[11]
URSA_A[4]
URSA_DQ[22]
URSA_A[0]
URSA_DQ[15]
URSA_D4M
URSA_D4P
URSA_DQ[24]
URSA_D3P
URSA_D0M
URSA_D0P
URSA_DQ[8]
URSA_C2M
URSA_D1M
URSA_A[12]
URSA_B4P
URSA_DQ[23]
URSA_B3P
URSA_B3M
URSA_A[9]
URSA_DQ[13]
URSA_CCKP
URSA_C3P
URSA_CCKM
URSA_C3M
URSA_DQ[1]
URSA_C3P
URSA_A3P
URSA_C3M
URSA_A4P
URSA_B4M
URSA_D1P
URSA_B1P
URSA_A2M
URSA_BCKP
URSA_ACKM
URSA_B3P
URSA_A3M
URSA_B4P
URSA_A4M
URSA_D2M
URSA_A1M
URSA_D3P
URSA_A0M
URSA_DCKM
URSA_C2M
URSA_B0P
URSA_B0M
URSA_B2P
URSA_D4M
URSA_C0P
URSA_D0M
URSA_C4M
URSA_D1M
URSA_C4P
URSA_B1M
URSA_D0P
URSA_D2P
URSA_B2M
URSA_DCKP
URSA_C0M
URSA_C2P
URSA_C1P
URSA_A0P
URSA_C1M
URSA_A1P
URSA_BCKM
URSA_CCKP
URSA_A2P
URSA_D4P
URSA_CCKM
URSA_ACKP
URSA_B3M
URSA_D3M
R922
100
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA1_P
C946
15pF
FRC_XTAL_15PF
+3.3V_MEMC
R908
2.2K
OPT
LVDS_TX_1_DATA3_P
C
9
0
8
0
.
1
u
F
C933
10uF
URSA_BA0
LVDS_TX_0_DATA1_P
C923
0.1uF
L904
BLM18PG121SN1D
C916
10uF
LVDS_TX_0_DATA3_P
R946
56
LVDS_TX_1_DATA4_P
C953
0.1uF
C904
0.1uF
C924
1uF
URSA_DQM3
URSA_MCLKE
R909
0
C914
0.1uF
R939
1K
OPT
JP901
M_SPI_DO
+1.26V_MEMC
LVDS_TX_0_DATA3_N
R926
100
URSA_A[0-12]
R920
100
URSA_DQSB0
ISP_TXD_TR
A3
C
9
3
8
0.1uF
C
9
4
3
0
.
1
u
F
ISP_TXD_TR
B6
M_XTALO
C920
0.1uF
R924
100
C919
0.1uF
URSA_DQSB3
LVDS_TX_1_CLK_N
URSA_DQS2
C930
0.1uF
R918
100
+3.3V_MEMC
C921
0.1uF
C931
10uF
10V
+3.3V_MEMC
+3.3V_MEMC
C956
0.1uF
LVDS_TX_1_DATA3_N
C
9
5
1
0
.
1
u
F
R942
1K
L905
BLM18PG121SN1D
C
9
4
1
0
.
1
u
F
R931
820
URSA_DQM1
M_SPI_DO
C929
0
.
1
u
F
IC902
W25X20AVSNIG
3
WP
2
DO
4
GND
1
CS
5
DIO
6
CLK
7
HOLD
8
VCC
URSA_MCLKZ
C
9
4
8
0
.
1
u
F
URSA_DQM2
URSA_DQS1
M_SPI_CK
H3
LVDS_TX_0_DATA4_P
R925
100
LVDS_TX_1_DATA2_N
M_XTALI
L908
BLM18PG121SN1D
C957
0.1uF
ISP_RXD_TR
B6
R923
100
X901
12MHz
SCL3_3.3V
9:I4
URSA_WEZ
C
9
3
4
0.1uF
C909
10uF
+5.0V
C
9
3
2
0.1uF
URSA_MCLK
LVDS_TX_0_DATA4_N
L907
BLM18PG121SN1D
C947
15pF
L902
BLM18PG121SN1D
R915
1K
LVDS_TX_1_DATA1_N
R907
2.2K
OPT
LVDS_TX_1_DATA4_N
URSA_CASZ
ISP_RXD_TR
A3
M_XTALI
JP902
R938
1K
R917
100
R914
10K
R951
56
+3.3V_MEMC
C913
0.1uF
16V
+3.3V_MEMC
R952
56
URSA_BA1
LVDS_TX_0_DATA1_N
+3.3V_MEMC
C925
0.1uF
FRC_RESET
M_SPI_CZ
C910
10uF
C906
10uF
C
9
4
0
0
.
1
u
F
L906
BLM18PG121SN1D
C912
0.1uF
16V
LVDS_TX_1_DATA2_P
C927
0.1uF
+1.8V_MEMC
+3.3V_MEMC
C
9
3
9
0.1uF
R913
10K
LVDS_TX_0_DATA2_N
URSA_MCLK1
M_XTALO
LVDS_TX_0_DATA0_N
R916
1K
OPT
C952
10uF
C
9
1
7
0
.
1
u
F
LVDS_TX_1_CLK_P
C
9
4
9
0
.
1
u
F
M_SPI_DI
SDA3_3.3V
9:I4
C
9
3
7
0
.
1
u
F
URSA_ODT
R928
100
C922
0.1uF
+3.3V_MEMC
LVDS_TX_0_CLK_N
R912
100
LVDS_TX_0_DATA2_P
LVDS_TX_0_CLK_P
R927
100
R910
0
C
9
4
2
0
.
1
u
F
L903
BLM18PG121SN1D
C911
10uF
URSA_RASZ
LVDS_TX_1_DATA0_P
M_SPI_DI
H3
C944
1uF
URSA_DQSB2
URSA_DQSB1
C
9
4
5
0
.
1
u
F
C901
0.1uF
R943
1K
OPT
C
9
3
6
0.1uF
R911
100
C928
0.1uF
R929
1M
C
9
3
5
0
.
1
u
F
R947
10K
R930
0
M_SPI_CK
R945
56
C926
0.1uF
LVDS_TX_0_DATA0_P
URSA_DQ[0-31]
URSA_MCLKZ1
C
9
5
0
0
.
1
u
F
URSA_DQM0
C
9
5
8
0
.
1
u
F
M_SPI_CZ
R921
100
C918
0.1uF
R919
100
C955
0.1uF
URSA_DQS3
URSA_DQS0
C954
10uF
LVDS_SEL
R936
0
OPC_EN
OPC_OUT1
OPC_EN
R937
0
OPC_EN
R941
0 OPC_EN
R953
0
OPT
12V_TCON
R940
0
C960
1000pF
50V
L909
CB3216PA501E
PWM_DIM
C961
0.1uF
50V
BIT_SEL
R949
3.3K
OPT
R955
3.3K
P902
TJC2508-4A
1
2
3
4
P903
TF05-51S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
P904
TF05-41S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
IC901
LGE7329A
E1
SDAS
D1
SCLS
F1
GPIO[8]
G1
GPIO[9]
K8
GND_14
E5
VDDC_1
E2
GPIO[10]
F2
GPIO[11]
F3
GPIO[12]
G2
GPIO[13]
M4
GPIO[22]
M5
GPIO[23]
G3
GPIO[14]
E4
GPIO[15]
F4
GPIO[16]
G4
GPIO[17]
H4
GPIO[18]
J4
GPIO[19]
K4
GPIO[20]
L4
GPIO[21]
J6
VDDP_2
H9
GND_7
F6
VDDC_2
H1
MDATA[20]
H2
MDATA[19]
H3
MDATA[17]
J1
MDATA[22]
J2
MDATA[27]
J3
MDATA[28]
K1
MDATA[25]
K2
MDATA[30]
K6
AVDD_DDR_2
K3
DQM[3]
L1
DQM[2]
J8
GND_10
L2
DQS[2]
L3
DQSB[2]
L6
AVDD_DDR_4
L8
VDDP_3
H10
GND_8
M1
DQS[3]
M2
DQSB[3]
L7
AVDD_DDR_5
M3
MDATA[31]
N1
MDATA[24]
J9
GND_11
N2
MDATA[26]
N3
MDATA[29]
L10
AVDD_DDR_6
P1
MDATA[23]
R1
MDATA[16]
T1
MDATA[18]
T2
MDATA[21]
R2
MCLK[0]
P2
MCLKZ[0]
G7
GND_1
L9
AVDD_MEMPLL
N5
MVREF
N4
ODT
T3
RASZ
R3
CASZ
P3
MADR[0]
T4
MADR[2]
R4
MADR[4]
J10
GND_12
P4
MADR[6]
T5
MADR[8]
R5
MADR[11]
P5
WEZ
T6
BADR[1]
R6
BADR[0]
P6
MADR[1]
T7
MADR[10]
L11
AVDD_DDR_7
R7
MADR[5]
P7
MADR[9]
T8
MADR[12]
R8
MADR[7]
P8
MADR[3]
N8
MCLKE
K10
GND_16
F7
VDDC_3
T9
MDATA[4]
R9
MDATA[3]
K7
GND_13
P9
MDATA[1]
T10
MDATA[6]
K11
AVDD_DDR_3
R10
MDATA[11]
P10
MDATA[12]
T11
MDATA[9]
R11
MDATA[14]
J11
AVDD_DDR_1
P11
DQM[1]
T12
DQM[0]
R12
DQS[0]
P12
DQSB[0]
H11
VDDP_1
T13
DQS[1]
R13
DQSB[1]
P13
MDATA[15]
T14
MDATA[8]
R14
MDATA[10]
P14
MDATA[13]
T15
MDATA[7]
R15
MDATA[0]
P15
MDATA[2]
T16
MDATA[5]
R16
MCLK[1]
P16
MCLKZ[1]
N9
GPIO[26]
N10
GPIO[27]
N11
GND_17
M11
RESET
G6
VDDC_4
N12
GPIO[28]
N13
GPIO[29]
N14
GPIO[30]
L13
SCK
M13
SDI
M12
SDO
K13
CSZ
L12
PWM1
K12
PWM0
J13
GPIO[0]
H13
GPIO[1]
G13
GPIO[2]
F13
GPIO[3]
E13
GPIO[4]
F12
GPIO[5]
D14
GPIO[6]
E12
GPIO[7]
N6
GPIO[24]
H6
VDDC_5
N15
LVD4M
N16
LVD4P
M14
LVD3M
M15
LVD3P
F8
AVDD_33_1
M16
LVDCKM
L16
LVDCKP
L15
LVD2M
L14
LVD2P
G9
GND_3
K14
LVD1M
J14
LVD1P
J16
LVD0M
J15
LVD0P
H15
LVC4M
H16
LVC4P
H14
LVC3M
G14
LVC3P
G16
LVCCKM
G15
LVCCKP
F15
LVC2M
F16
LVC2P
F14
LVC1M
E14
LVC1P
E16
LVC0M
E15
LVC0P
G10
GND_4
F9
AVDD_33_2
D16
LVB4M
D15
LVB4P
C16
LVB3M
B16
LVB3P
A16
LVBCKM
A15
LVBCKP
B15
LVB2M
C15
LVB2P
D2
GPIO_3
E3
GPIO_10
E10
GPIO_11
D10
GPIO_7
D8
GPIO_5
D12
REXT
C14
LVB1M
C13
LVB1P
A13
LVB0M
B13
LVB0P
D7
GPIO_4
D9
GPIO_6
B12
LVA4M
A12
LVA4P
C12
LVA3M
C11
LVA3P
A11
LVACKM
B11
LVACKP
B10
LVA2M
A10
LVA2P
C10
LVA1M
C9
LVA1P
A9
LVA0M
B9
LVA0P
F10
AVDD_PLL
G8
GND_2
D11
GPIO_8
D13
GPIO_9
E11
GPIO_12
N7
GPIO[25]
D6
SCLM
D5
SDAM
A14
GPIO_1
B14
GPIO_2
D3
XIN
D4
XOUT
K16
GPIO_14
K15
GPIO_13
H7
GND_5
G11
AVDD_LVDS_2
B8
RO0N
A8
RO0P
C8
RO1N
C7
RO1P
A7
RO2N
B7
RO2P
B6
ROCKN
A6
ROCKP
C6
RO3N
C5
RO3P
A5
RO4N
B5
RO4P
H8
GND_6
F11
AVDD_LVDS_1
B4
RE0N
A4
RE0P
C4
RE1N
C3
RE1P
A3
RE2N
B3
RE2P
B2
RECKN
A2
RECKP
C2
RE3N
C1
RE3P
A1
RE4N
B1
RE4P
GND_9
J7
GND_15 K9
12V_TCON
R954
3.3K
OPT
+3.3V_MEMC
R948
499
OPC_EN
R3029
0
0
1/16W
5%
5%
OPT
LVDS_SEL
9:G6;I5
R933
4.7K
C915
10uF
6.3V
C3019
10uF
6.3V
C907
10uF
C3020
10uF
C946-*1
20pF
FRC_XTAL_20PF
C947-*1
20pF
FRC_XTAL_20PF
7
15
HIGH
PI Result
EEPROM
HIGH
* XTAL
I2C
HIGH
* ISP Port for MEMC
LOW
PWM1
PI Result
HIGH
HIGH
HIGH
* SPI FLASH
SPI
PWM0
GPIO8
LOW
HIGH
PARK.S.W
22uF/16 CST PROBLEM
22uF/16 CST PROBLEM
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
08.10.15
M-STAR FRC DDR
BCM (BRAZIL VENUS)
DDR_DQ[22]
DDR_DQ[13]
URSA_DQ[26]
URSA_DQ[10]
DDR_DQ[15]
DDRA_A[1]
DDRB_A[9]
DDRA_A[2]
DDR_DQ[0]
DDRA_A[7]
URSA_DQ[11]
DDR_DQ[23]
DDR_DQ[18]
DDRA_A[3]
DDR_DQ[8]
DDR_DQ[17]
URSA_DQ[16]
DDR_DQ[14]
URSA_A[3]
DDRB_A[10]
DDR_DQ[3]
DDRB_A[1]
URSA_A[8]
URSA_A[7]
DDRB_A[5]
DDR_DQ[30]
DDR_DQ[24]
DDR_DQ[10]
DDR_DQ[28]
DDRA_A[6]
DDR_DQ[7]
DDRB_A[2]
DDRB_A[3]
URSA_DQ[21]
URSA_DQ[5]
DDR_DQ[20]
URSA_A[5]
DDRA_A[0]
DDRB_A[4]
DDR_DQ[4]
DDRA_A[9]
DDRB_A[0]
URSA_DQ[1]
URSA_DQ[19]
URSA_A[2]
DDRB_A[6]
URSA_DQ[15]
DDRB_A[7]
DDR_DQ[21]
DDR_DQ[11]
DDRA_A[4]
DDRB_A[4]
URSA_A[0]
DDRB_A[1]
URSA_DQ[14]
DDRA_A[12]
DDRB_A[7]
DDRB_A[11]
URSA_DQ[7]
URSA_DQ[22]
URSA_DQ[8]
DDRA_A[10]
DDR_DQ[3]
URSA_DQ[31]
URSA_A[6]
DDR_DQ[0-15]
DDR_DQ[1]
DDRA_A[11]
DDRB_A[5]
DDR_DQ[12]
DDRB_A[2]
URSA_DQ[29]
URSA_DQ[6]
URSA_A[11]
URSA_A[8]
DDRA_A[0-12]
URSA_A[4]
DDR_DQ[8]
DDRB_A[0-12]
DDR_DQ[5]
DDR_DQ[29]
URSA_DQ[2]
DDRB_A[12]
URSA_DQ[18]
DDR_DQ[27]
DDRA_A[3]
URSA_A[1]
DDRA_A[12]
URSA_A[11]
URSA_DQ[20]
DDRA_A[8]
DDRB_A[3]
DDR_DQ[16]
DDR_DQ[10]
URSA_DQ[23]
DDRA_A[0]
DDR_DQ[6]
DDR_DQ[9]
DDRA_A[1]
URSA_DQ[13]
DDRA_A[8]
DDR_DQ[4]
URSA_DQ[24]
DDRA_A[2]
DDRB_A[6]
DDRB_A[8]
DDRA_A[9]
DDR_DQ[9]
DDRA_A[6]
URSA_DQ[17]
DDRB_A[9]
DDRB_A[10]
DDR_DQ[1]
DDR_DQ[31]
URSA_DQ[9]
DDRA_A[5]
URSA_DQ[30]
DDRB_A[11]
DDR_DQ[19]
DDR_DQ[2]
DDRB_A[0]
URSA_A[3]
DDR_DQ[14]
DDR_DQ[25]
URSA_DQ[3]
DDR_DQ[5]
DDRB_A[8]
DDR_DQ[2]
DDR_DQ[0]
DDR_DQ[15]
DDR_DQ[7]
DDR_DQ[26]
DDRB_A[12]
URSA_A[1]
DDRA_A[11]
URSA_DQ[4]
DDRA_A[7]
DDRA_A[5]
DDR_DQ[11]
DDR_DQ[16-31]
DDR_DQ[13]
URSA_DQ[0]
DDRA_A[10]
URSA_DQ[12]
DDR_DQ[6]
DDRA_A[4]
URSA_A[10]
DDR_DQ[12]
URSA_A[10]
URSA_DQ[27]
URSA_DQ[25]
URSA_DQ[28]
URSA_A[7]
URSA_A[5]
URSA_A[0]
URSA_A[2]
URSA_A[4]
URSA_A[6]
DDR_DQ[31]
DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]
DDR_DQ[24]
DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[29]
DDR_DQ[30]
URSA_A[9]
URSA_A[12]
URSA_A[9]
URSA_A[12]
C1008
0.1uF
URSA_RASZ
URSA_WEZ
7:D1;T10
A_URSA_RASZ
C1020
0.1uF
+1.8V_FRC_DDR
C1021
0.1uF
URSA_BA0
7:D1;U12
C1028
0.1uF
R1015
22
R1003
1K
1%
URSA_DQM1
7:F1
R1012
56
URSA_DQS2
7:B4
R1023
1K
C1041
0.1uF
AR1015
56
C1014
0.1uF
URSA_MCLK
7:B3
A_URSA_BA0
AA17
URSA_WEZ
7:D1;U11
AR1003
56
R1005
22
+1.8V_FRC_DDR
R1013
22
URSA_MCLK1
7:G1
AR1010
22
URSA_DQS1
7:F1
R1011
56
C1018
0.1uF
B_URSA_MCLKE
Q16
URSA_BA1
7:D1;T10
R1019
56
A_URSA_CASZ
R1021
56
C1033
0.1uF
URSA_ODT
7:B3;X15
R1001
150
OPT
R1009
56
AR1006
22
C1006
0.1uF
R1024
150
OPT
A_URSA_MCLKE
U10
AR1008
22
URSA_DQSB2
7:B4
C1016
0.1uF
C1038
0.1uF
C1007
0.1uF
C1015
0.1uF
C1001
1000pF
URSA_RASZ
C1024
10uF
+1.8V_FRC_DDR
URSA_ODT
7:B3;Q15
C1010
10uF
C1035
0.1uF
URSA_DQSB0
7:F1
AR1007
22
C1045
0.1uF
B_URSA_BA1
URSA_DQM2
7:B4
C1032
0.1uF
C1009
0.1uF
B_URSA_CASZ
R17
AR1005
22
A_URSA_WEZ
X14
C1013
0.1uF
+1.8V_FRC_DDR
URSA_MCLKE
7:E1;U11
A_URSA_RASZ
X17
URSA_DQ[0-31]
7:G1;AM22
R1006
22
URSA_DQSB3
7:B4
+1.8V_FRC_DDR
B_URSA_BA1
B_URSA_WEZ
Q14
C1004
10uF
10V
L1002
BLM18PG121SN1D
A_URSA_CASZ
X17
C1044
0.1uF
R1022
1K
+1.8V_MEMC
B_URSA_RASZ
R17
URSA_MCLKE
7:E1;T10
URSA_DQ[0-31]
7:G1;C22
URSA_CASZ
C1040
0.1uF
C1036
0.1uF
C1042
0.1uF
C1037
0.1uF
A_URSA_BA0
C1034
0.1uF
URSA_DQSB1
7:F1
C1011
0.1uF
AR1009
22
AR1001
56
R1016
56
URSA_BA1
7:D1;U12
URSA_DQS3
7:B4
AR1004
56
R1002
1K
1%
+1.8V_FRC_DDR
C1002
0.1uF
C1025
10uF
10V
R1004
22
AR1016
56
B_URSA_CASZ
B_URSA_RASZ
C1039
0.1uF
URSA_DQM0
7:F1
URSA_DQS0
7:F1
R1008
56
A_URSA_BA1
AA17
B_URSA_BA0
C1029
0.1uF
AR1011
22
C1026
10uF
C1030
0.1uF
AR1012
22
C1005
10uF
A_URSA_BA1
C1012
0.1uF
AR1018
56
URSA_BA0
7:D1;T11
R1010
56
AR1013
22
AR1017
56
C1043
0.1uF
URSA_CASZ
URSA_A[0-12]
R1017
56
URSA_MCLKZ
7:B3
R1018
56
+1.8V_FRC_DDR
R1007
56
B_URSA_BA0
URSA_MCLKZ1
7:G1
C1031
0.1uF
C1003
0.1uF
C1017
0.1uF
C1019
0.1uF
B_URSA_WEZ
T11
R1014
22
URSA_DQM3
7:B4
A_URSA_MCLKE
Z16
AR1014
22
A_URSA_WEZ
U10
B_URSA_MCLKE
T11
R1020
56
C1027
0.1uF
C1022
0.1uF
C1023
1000pF
AR1002
56
C1048
0.1uF
C1050
0.1uF
C1047
0.1uF
C1053
0.1uF
C1052
0.1uF
C1051
0.1uF
C1049
0.1uF
C1046
0.1uF
+1.8V_MEMC
+1.8V_FRC_DDR
+1.8V_FRC_DDR
+1.8V_FRC_DDR
IC1001
H5PS5162FFR-S6C
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
IC1002
H5PS5162FFR-S6C
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
8
15
DDR2 1.8V By CAP - Place these Caps near Memory
PI Result
HONG.Y.H
resonance Compensation
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2008.10.15
BCM3556 & NAND FLASH
BCM (BRAZIL VENUS)
NAND_IO[0-7]
NAND_IO[7]
NAND_IO[6]
NAND_IO[5]
NAND_IO[4]
NAND_IO[3]
NAND_IO[2]
NAND_IO[1]
NAND_IO[0]
NAND_IO[0]
NAND_IO[1]
NAND_IO[3]
NAND_IO[2]
NAND_IO[5]
NAND_IO[4]
NAND_IO[7]
NAND_IO[6]
R180
4.7K
R194
4.7K
COMP2_DET
14:A5
SDA3_3.3V
7:B6
A_DIM
I3;4:A6
BCM_AVC_DEBUG_TX2
G5
R193
4.7K
NAND_IO[0-7]
R176
4.7K
R170
4.7K
NAND_REb
C3
R182
22
NAND_WEb
E5
NAND_REb
E6
VREG_CTRL
R196
0
OPT
NAND_ALE
E6
BCM_AVC_DEBUG_RX1
G6
FLASH_WP_1
D3.3V
BCM_AVC_DEBUG_TX1
G6
R198
0
OPT
SDA0_3.3V
14:A6
R116
4.7K
SDA2_3.3V
B5;12:F3
C115
0.1uF
BLUETOOTH_RESET
I3;14:I3
R184
4.7K
BCM_AVC_DEBUG_TX2
C7
R174
22
RF_SWITCH
14:A6
BCM_AVC_DEBUG_RX2
C6
BCM_RX
BCM_TX
NAND_ALE
C2
BCM_AVC_DEBUG_RX2
G5
D3.3V
R175
22
R136
4.7K
PWM_DIM
I3;4:A5;7:I5
C114
0.1uF
SDA1_3.3V
3:D3;2:AH5
R186
22
R109
0
OPT
GAIN_SWITCH
14:A6
D3.3V
R179
22
SIDE_CVBS_DET
D3.3V
NAND_WEb
C2
SCL3_3.3V
7:B6
R181
22
SCL0_3.3V
14:A6
R105
22
BCM_AVC_DEBUG_RX1
C7
R185
22
C136
10uF
6.3V
NAND_CEb
E6
NAND_CLE
E5
R177
4.7K
NAND_CEb
C3
R183
4.7K
D3.3V
R171
4.7K
SCL1_3.3V
3:D3;2:AH5
NAND_CLE
C2
R187
4.7K
NAND_IO[0-7]
NAND_RBb
E5
P100
GIL-G-06-S3T2
OPT
1
2
3
4
5
6
TUNER_RESETb
I3;14:A6
R192
4.7K
D3.3V
R178
22
SCL2_3.3V
B5;12:F3
FRC_RESET
7:H2
AV1_CVBS_DET
14:A5
R197
0
OPT
R161
0
NAND_RBb
C3
COMP1_DET
14:A6
AUDIO_M_CLK
3:C4
Q101
KRC103S
KRC103S
E
B
C
BCM_AVC_DEBUG_TX1
C7
DSUB_DET
R189
0
OPT
R195
0
OPT
R103
100
AMP_RST
R2005
100 OPT
R2004
100
R2008
100
R2009
100
PWM_DIM
G7;4:A5;7:I5
R2011
2.7K
R2014
2.7K
HDMI_HPD_IN
A_DIM
G6;4:A6
VREG_CTRL
BLUETOOTH_RESET
AMP_RST
G7;12:I4;3:C5
R2015
2.7K
R2013
2.7K
R2016
2.7K
R2010
2.7K
D3.3V
HDMI_HPD_IN
D3.3V
C416
0.1uF
0.1uF
SDA2_3.3V
I4;12:F3
D3.3V
IC400
KIA7029AF
2
G
3
O
1
I
R419
4.7K
SCL2_3.3V
I4;12:F3
R422
4.7K
R2003
0
0
OPT
IC403
AT24C512BW-SH-T
3
A2
2
A1
4
GND
1
A0
5
SDA
6
SCL
7
WP
8
VCC
RESET
10:I2;12:I5
R412
22
22
R408
330
330
R411
22
22
D3.3V
SYS_RESETb
10:E4
NAND_IO[5]
E3;E6
NAND_IO[6]
E3;E6
NAND_IO[2]
E3;E6
D3.3V
D3.3V
NAND_IO[0]
E3;E6
NAND_IO[3]
E3;E6
D3.3V
BIT_SEL
R2018
100
OPT
POWER_DET
12:B3;12:I4
R2025
0
0
R117
33
D3.3V
D3.3V
NAND_IO[4]
E3;E6
R191
2.7K
R2040
2.7K
R131
2.7K
D3.3V
TUNER_RESETb
G7;14:A6
R3016
4.7K
4.7K
R409
910
C400
10uF
R410
10K
IC101
NAND01GW3A2CN6E
26
NC_17
27
NC_18
28
NC_19
29
I/O0
30
I/O1
31
I/O2
32
I/O3
33
NC_20
34
NC_21
35
NC_22
36
VSS_2
37
VDD_2
38
NC_23
39
NC_24
40
NC_25
41
I/O4
42
I/O5
43
I/O6
44
I/O7
45
NC_26
46
NC_27
47
NC_28
48
NC_29
17
AL
3
NC_3
6
NC_6
16
CL
15
NC_10
14
NC_9
13
VSS_1
12
VDD_1
11
NC_8
10
NC_7
9
E
8
R
7
RB
4
NC_4
5
NC_5
25
NC_16
24
NC_15
23
NC_14
2
NC_2
22
NC_13
21
NC_12
1
NC_1
20
NC_11
19
WP
18
W
LVDS_SEL
R3030
100
OPT
R199
22
OPT
R2002
22
OPT
R2001
22
OPT
DDC_SCL
I3;14:A6
DDC_SDA
I3;14:A6
R2024
22
R160
22
R102
22
R2032
2.7K
OPT
R317
2.7K
R2033
2.7K
R316
2.7K
R315
2.7K
OPT
R321
2.7K
OPT
R2029
2.7K
OPT
R314
2.7K
R2030
2.7K
R2031
2.7K
IC100
BCM3556
GPIO_00
N26
GPIO_01
L26
GPIO_02
N25
GPIO_03
L25
GPIO_04
K27
GPIO_05
K28
GPIO_06
K24
GPIO_07
K26
GPIO_08
K25
GPIO_09
AA27
GPIO_10
AA28
GPIO_11
AA26
GPIO_12
L1
GPIO_13
L3
GPIO_14
L2
GPIO_15
Y25
GPIO_16
Y26
GPIO_17
M27
GPIO_18
AA25
GPIO_19
R25
GPIO_20
N28
GPIO_21
N27
GPIO_22
AH18
GPIO_23
P23
GPIO_24
M23
GPIO_25
AD19
GPIO_26
AE19
GPIO_27
M4
GPIO_28
M5
GPIO_29
L23
GPIO_30
Y28
GPIO_31
Y27
GPIO_32
G2
GPIO_33
G3
GPIO_34
G5
GPIO_35
G6
GPIO_36
G4
GPIO_37
L24
GPIO_38
P25
GPIO_39
L5
GPIO_40
K4
GPIO_41
K1
GPIO_42
L27
GPIO_43
M26
GPIO_44
N23
GPIO_45
R28
GPIO_46
R27
GPIO_47
R26
GPIO_48
P28
GPIO_49
P27
GPIO_50
K6
GPIO_51
K5
GPIO_52
P26
GPIO_53
M3
GPIO_54
M2
GPIO_55
M1
GPIO_56
L4
GPIO_57
L6
SGPIO_00
W27
SGPIO_01
W28
SGPIO_02
W26
SGPIO_03
W25
SGPIO_04
J2
SGPIO_05
J1
SGPIO_06
K3
SGPIO_07
K2
EBI_ADDR3
J23
EBI_ADDR4
J24
EBI_ADDR2
H25
EBI_ADDR1
H24
EBI_ADDR0
H23
EBI_ADDR5
J25
EBI_ADDR6
F26
EBI_ADDR8
H28
EBI_ADDR9
J26
EBI_ADDR13
H27
EBI_ADDR12
G26
EBI_ADDR11
J27
EBI_ADDR10
J28
EBI_ADDR7
F27
EBI_TAB
G24
EBI_WE1B
H26
EBI_CLK_IN
G27
EBI_CLK_OUT
G28
EBI_RWB
K23
EBI_CS0B
G25
NAND_DATA0
U24
NAND_DATA1
T26
NAND_DATA2
T27
NAND_DATA3
U26
NAND_DATA4
U27
NAND_DATA5
V26
NAND_DATA6
V27
NAND_DATA7
V28
NAND_CS0B
T24
NAND_ALE
R23
NAND_REB
T23
NAND_CLE
T25
NAND_WEB
R24
NAND_RBB
U25
SF_MISO
W24
SF_MOSI
U23
SF_SCK
V23
SF_CSB
V24
C3024
4700pF
15
Open Drain
9
SF_MISO
SF_MOSI
SF_SCK
SF_CSB
* I2C MAP
* I2C_0 : TUNER
* I2C_1 : Audio amp, HDMI S/W
* I2C_2 : NVRAM,Micom
* I2C_3 : FRC
Hot Plug input pin should be feeded over 5mA.
BCM Recommend
BCM Recommend
NVRAM
RESET
NAND_IO[0] : Flash Select (1)
0 : Boot From Serial Flash
1 : Boot From NAND Flash
0 : Boot From Serial Flash
1 : Boot From NAND Flash
NAND_IO[1] : NAND Block 0 Write (DNS)
0 : Enable Block 0 Write
1 : Disable Block 0 Write
0 : Enable Block 0 Write
1 : Disable Block 0 Write
NAND_IO[3:2] : NAND ECC (10)
00 : No ECC
01 : 1 ECC Bit
10 : 4 ECC Bit
11 : 8 ECC Bit
00 : No ECC
01 : 1 ECC Bit
10 : 4 ECC Bit
11 : 8 ECC Bit
NAND_IO[4] : CPU Endian (0)
0 : Little Endian
1 : Big Endian
0 : Little Endian
1 : Big Endian
NAND_IO[6:5] : Xtal Bias Control (1, DNS)
00 : 1.2mA
01 : 1.8mA
10 : 2.4mA (Recommand)
11 : 3.0mA
00 : 1.2mA
01 : 1.8mA
10 : 2.4mA (Recommand)
11 : 3.0mA
Boot Strap
* NAND FLASH MEMORY 1Gbit (128M)
JANG.J.H
IF FUNDMENTAL IS USED => LOW
IF DIP IS USED => HIGH
Click on the first or last page to see other 47LH70YD (CHASSIS:LJ91D) service manuals if exist.