DOWNLOAD LG 47LEX8-CA / 55LEX8-CA (CHASSIS:LC03P) Service Manual ↓ Size: 11.91 MB | Pages: 32 in PDF or view online for FREE

Model
47LEX8-CA 55LEX8-CA (CHASSIS:LC03P)
Pages
32
Size
11.91 MB
Type
PDF
Document
Service Manual
Brand
Device
TV / LCD
File
47lex8-ca-55lex8-ca-chassis-lc03p.pdf
Date
PREV: LG Z42LCD4F Service Manual

LG 47LEX8-CA / 55LEX8-CA (CHASSIS:LC03P) Service Manual ▷ View online

THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
10/01/xx
Jack B/D wafer
33    100
GP2_BCM_ATSC
DPRX_ML_L0N
DPRX_ML_L1P
DPRX_ML_L1N
PANEL_CTL
+3.5V_ST
DPRX_ML_L0P
POWER_CTRL_24V
DPRX_AUX_N
DPRX_AUX_P
SDA3_3.3V
SCL3_3.3V
DP_CABLE_DET
LG5111_RESET
PWM_DIM
INV_CTL
FRC_RESET
L/R_SYNC
232C_TXD
232C_RXD
INV_CTL_TR
RGB_DDC_SCL
SPDIF_OUT
DSUB_5V
PC_R_IN
JACK_R_VID_INCM
+3.3V_NORMAL
JACK_PC_LR_INCM
DSUB_HSYNC
DSUB_G
RGB_DDC_SDA
DSUB_VSYNC
DSUB_R
DSUB_B
PC_L_IN
JACK_B_VID_INCM
JACK_G_VID_INCM
DSUB_DET
E_TMS
E_TDI
E_TCK
E_TDO
SC1_B
JACK_REAR_AV_LR_INCM
SCART1_DET
REAR_AV_R_IN
SC1_R
+3.3V_NORMAL
+3.3V_NORMAL
JACK_SC1_RGB_INCM
JACK_AV_CVBS_INCM
REAR_AV_DET
SC1_G
REAR_AV_L_IN
REAR_AV_CVBS
R3330
0
R3337
0
TCON_FPGA_DL
P3302
TF05-51S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
R3333
0
NORMAL_I2C
C3304
0.1uF
C3303 0.1uF
R3306
0
R3336
0
BCM_GPIO
R3328
10K
C3309
100pF
50V
R3331
0
OPT
R3338
0
TCON_FPGA_DL
C3307
0.1uF
R3308
10K
AD1
RCLAMP0544T.TCT
1
8
2
7
3
6
4
5
9
C3308
100pF
50V
R3327
10K
C3305
0.1uF
R3326
1K
P3301
TF05-41S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
R3334
0
TCON_FPGA_DL
R3312
0
OPT
R3335
0
TCON_FPGA_DL
R3305
33
BCM_GPIO
C3306
0.1uF
R3332
0
NORMAL_I2C
C8331 0.1uF
R3325
1K
AD2
RCLAMP0544T.TCT
1
8
2
7
3
6
4
5
9
D3300
5.5V
D3301
30V
D3302
30V
D3306
30V
D3310
30V
D3304
30V
D3308
30V
D3303
30V
D3305
30V
D3309
30V
R3339
75
R3340
75
R3341
75
Jack Board WAFER
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
09/10/xx
COMMON
RGB
84    100
RGB_DDC_SDA
D3500
ENKMC2838-T112
A1
C
A2
EDID_WP
RGB_HSYNC
IC3502
M24C02-RMN6T
RGB_EDID_ST
0IMMR00014A
3
E2
2
E1
4
VSS
1
E0
5
SDA
6
SCL
7
WC
8
VCC
RGB_DDC_SCL
+5V_NORMAL
RGB_VSYNC
IC3501
74F08D
3
Q0
2
D0B
4
D1A
1
D0A
6
Q1
5
D1B
7
GND
8
Q2
9
D2A
10
D2B
11
Q3
12
D3A
13
D3B
14
VCC
R3505
22
+5V_NORMAL
R3510
2.7K
R3506
22
R
3
5
0
9
2
.
7
K
R3507
22
R3508
22
C3501
0.1uF
C3502
0.1uF 16V
C3503
18pF
50V
C3504
18pF
50V
R3512
22
R3511
22
R3514
100
R3513
10K
IC3502-*1
R1EX24002ASAS0A
RGB_EDID_RENESAS
DEV
3
A2
2
A1
4
VSS
1
A0
5
SDA
6
SCL
7
WP
8
VCC
DSUB_5V
DSUB_HSYNC
DSUB_VSYNC
RGB PC
BCM Reference
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
GPIO_1
GPIO_9
GPIO_21
GPIO_12
+3.3V_DVDD
+3.3V_DVDD
GPIO_8
GPIO_2
GPIO_3
GPIO_0
GPIO_11
GPIO_5
STDP_UART_TX
GPIO_7
R3721
4.7K OPT
R3722
4.7K
GPIO_10
GPIO_4
R3723
4.7K
R3726
4.7K
R3727
4.7K
R3730
4.7K
R3732
4.7K
R3724
4.7K OPT
R3725
4.7K OPT
R3728
4.7K OPT
R3729
4.7K OPT
R3731
4.7K OPT
R3705
4.7K
R3708
4.7K
R3709
4.7K
R3707
4.7K
OPT
R3710
4.7K
OPT
R3711
4.7K
OPT
R3713
4.7K
R3717
4.7K
OPT
R3719
4.7K
OPT
R3712
4.7K
R3714
4.7K
OPT
R3715
4.7KOPT
R3718
4.7K
R3720
4.7K
R3706
4.7K
OPT
R3716
4.7K
R3704
12K
1%
+12V
R3701
10K
+1.2V
R3702
3.3K
1%
L3701
3.6uH
NR8040T3R6N
R3703
3.9K
1%
R3700
6.2K
L3700
IC3701
AOZ1072AI
DEV
3
AGND
2
VIN
4
FB
1
PGND
5
COMP
6
EN
7
LX_1
8
LX_2
IC3700
STDP4028AB(REV.C)
E0_LVRX_CH0N
P2
E0_LVRX_CH0P
N2
E0_LVRX_CH1N
P3
E0_LVRX_CH1P
N3
E0_LVRX_CH2N
N4
E0_LVRX_CH2P
M4
E0_LVRX_CLKN
M5
E0_LVRX_CLKP
L5
E0_LVRX_CH3N
N6
E0_LVRX_CH3P
M6
E0_LVRX_CH4N
P7
E0_LVRX_CH4P
N7
E1_LVRX_CH0N
G1
E1_LVRX_CH0P
G2
E1_LVRX_CH1N
H1
E1_LVRX_CH1P
H2
E1_LVRX_CH2N
J2
E1_LVRX_CH2P
J3
E1_LVRX_CLKN
K3
E1_LVRX_CLKP
K4
E1_LVRX_CH3N
L2
E1_LVRX_CH3P
L3
E1_LVRX_CH4N
M1
E1_LVRX_CH4P
M2
O0_LVRX_CH0N
P8
O0_LVRX_CH0P
N8
O0_LVRX_CH1N
N9
O0_LVRX_CH1P
M9
O0_LVRX_CH2N
M10
O0_LVRX_CH2P
L10
O0_LVRX_CLKN
N11
O0_LVRX_CLKP
M11
O0_LVRX_CH3N
P12
O0_LVRX_CH3P
N12
O0_LVRX_CH4N
P13
O0_LVRX_CH4P
N13
O1_LVRX_CH0N
M13
O1_LVRX_CH0P
M14
O1_LVRX_CH1N
L12
O1_LVRX_CH1P
L13
O1_LVRX_CH2N
K12
O1_LVRX_CH2P
K11
O1_LVRX_CLKN
J12
O1_LVRX_CLKP
J13
O1_LVRX_CH3N
H13
O1_LVRX_CH3P
H14
O1_LVRX_CH4N
G13
O1_LVRX_CH4P
G14
E0_LVRX_CH5N
M7
E0_LVRX_CH5P
L6
E0_LVRX_CH6N
M3
E0_LVRX_CH6P
L4
E1_LVRX_CH5N
J5
E1_LVRX_CH5P
H4
E1_LVRX_CH6N
J4
E1_LVRX_CH6P
K5
O0_LVRX_CH5N
M8
O0_LVRX_CH5P
L9
O0_LVRX_CH6N
L11
O0_LVRX_CH6P
M12
O1_LVRX_CH5N
J10
O1_LVRX_CH5P
H11
O1_LVRX_CH6N
K10
O1_LVRX_CH6P
J11
POWER_ON/OFF2_1
C3703
3300pF
C3702
0.1uF
16V
C3701
10uF
25V
C3706
0.1uF
16V
C3704
22uF
10V
C3705
100pF
50V
OPT
C3700
10uF
25V
LVDS_TX_0_DATA2_P
LVDS_TX_0_DATA2_N
LVDS_TX_0_DATA0_P
LVDS_TX_0_CLK_N
LVDS_TX_0_DATA4_N
LVDS_TX_0_DATA3_P
LVDS_TX_0_DATA1_P
LVDS_TX_0_DATA1_N
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA4_P
LVDS_TX_0_CLK_P
LVDS_TX_1_DATA1_P
LVDS_TX_1_CLK_P
LVDS_TX_1_DATA0_P
LVDS_TX_1_DATA2_P
LVDS_TX_1_DATA3_N
LVDS_TX_1_DATA1_N
LVDS_TX_1_DATA4_N
LVDS_TX_1_CLK_N
LVDS_TX_1_DATA2_N
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA4_P
LVDS_TX_1_DATA3_P
LVDS_TX_0_DATA2_N
R3744
100
R3741
100
LVDS_TX_1_DATA3_P
R3736
100
LVDS_TX_0_DATA4_P
LVDS_TX_1_DATA2_P
R3738
100
LVDS_TX_1_DATA4_N
R3739
100
LVDS_TX_0_DATA2_P
LVDS_TX_1_CLK_P
LVDS_TX_0_DATA4_N
LVDS_TX_0_DATA1_N
LVDS_TX_0_CLK_P
LVDS_TX_1_DATA3_N
LVDS_TX_1_CLK_N
LVDS_TX_1_DATA0_P
LVDS_TX_1_DATA1_N
LVDS_TX_0_DATA0_N
LVDS_TX_0_DATA0_P
LVDS_TX_0_DATA3_N
LVDS_TX_0_DATA3_P
LVDS_TX_0_CLK_N
R3742
100
LVDS_TX_1_DATA2_N
R3733
100
R3737
100
LVDS_TX_0_DATA1_P
LVDS_TX_1_DATA0_N
R3740
100
LVDS_TX_1_DATA1_P
R3734
100
LVDS_TX_1_DATA4_P
R3735
100
R3743
100
(BS_3)
(BS_6)
(BS_7)
(Pixel Width)
(Gain)
(Pre-Emphasis)
(BS_2)
(BS_4)
(LVDS Format)
(Down Spread Enable)
(LVDS Format)
(BS_5)
(BS_1)
STDP4020 DPRx Hardware Bootstraps
STDP4028 DPTX Firmware Bootstraps
(BS_0)
ALEF M240Hz(TM480Hz) JIG Board
2009. 12. 28
2
3
DP Signal
R2
Vout=0.8*(1+R1/R2)
R1
STDP TX CORE 1.26V
2A
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
+3.3V_DVDD
VDD_RPLL_+1.2V
+1.2V_DVDD
+1.2V_AVDD
AVDD_+3.3V
AVDD_OUT_LV_33
AVDD_LVRX_+1.2V
C3805
0.1uF
16V
C3814
0.1uF
16V
VDD_RPLL_+1.2V
C3813
0.1uF
16V
C3826
0.1uF
16V
AVDD_OUT_LV_33
+3.3V_NORMAL
+3.3V_DVDD
AVDD_+3.3V
C3808
0.1uF
16V
L3804
120-ohm
+1.2V_DVDD
VDD_RPLL_+1.2V
C3815
0.1uF
16V
+3.3V_DVDD
+3.3V_DVDD
C3807
0.1uF
16V
L3802
120-ohm
C3810
0.1uF
16V
C3803
0.1uF
16V
L3800
120-ohm
C3801
0.1uF
16V
C3820
0.1uF
16V
C3822
0.1uF
16V
C3812
0.1uF
16V
C3802
0.1uF
16V
C3824
0.1uF
16V
AVDD_OUT_LV_33
C3817
0.1uF
16V
AVDD_+3.3V
C3806
0.1uF
16V
+3.3V_DVDD
L3801
120-ohm
C3818
0.1uF
16V
C3819
0.01uF
25V
DPRX_ML_L0N
+1.2V_AVDD
R3809
33
R3803
240
1/16W
1%
+3.3V_DVDD
C3835
0.1uF
16V
DPRX_ML_L1P
DPRX_ML_L1N
DPRX_ML_L0P
GPIO_10
STDP_SPI_DO
LD3800
SML-210MT
+3.3V_DVDD
C3838
0.1uF
X3801
27MHz
R3816
33
STDP_SPI_CLK
STDP_SPI_DI
R3818
3.3K
R3810
4.7K
STDP_SPI_CS
STDP_UART_TX
STDP_SPI_CLK
R3804
0
+3.3V_DVDD
R3824 33
R3815
0
GPIO_7
R3807
33
GPIO_5
AVDD_+3.3V
GPIO_0
GPIO_4
GPIO_12
R3812
0
GPIO_2
R3808
33
STDP_SPI_DI
GPIO_8
GPIO_1
R3814
0
GPIO_11
R3801
2.7K
R3806
0
STDP_SPI_CS
STDP_UART_RX
STDP_SPI_DO
R3805
0
GPIO_3
R3813
0
SW3800
JTP-1127WEM
1
2
4
3
R3802
220
GPIO_9
GPIO_21
R3817
10K
IC3800
W25X20AVSNIG
3
WP
2
DO
4
GND
1
CS
5
DIO
6
CLK
7
HOLD
8
VCC
C3832
0.1uF
16V
C3827
0.1uF
16V
C3811
0.1uF
16V
C3829
0.1uF
16V
+1.2V_DVDD
+1.2V_AVDD
C3823
0.1uF
16V
C3831
0.1uF
16V
C3833
0.1uF
16V
C3809
0.1uF
16V
C3804
0.1uF
16V
+1.2V
C3830
0.1uF
16V
C3816
0.1uF
16V
L3806
120-ohm
C3821
0.1uF
16V
+1.2V
+1.2V_DVDD
L3803
120-ohm
+1.2V_AVDD
STDP_UART_RX
STDP_UART_TX
R3800
33
+5V_NORMAL
C3800
0.1uF
50V
L3805
120-ohm
+1.2V_AVDD
AVDD_LVRX_+1.2V
C3828
0.1uF
16V
C3825
0.1uF
16V
R3821
0
+3.3V_DVDD
SCL3_3.3V
SDA3_3.3V
R3823 0
R3822 0
R3826
4.7K
C3834
0.1uF
16V
OPT
C3839
0.1uF
16V
OPT
DPRX_AUX_N
DPRX_AUX_P
IC3700
STDP4028AB(REV.C)
PVDD1_1
E7
PVDD1_2
E8
PVDD1_3
K6
PVDD1_4
K9
PVDD21
G11
PVDD22
G5
DPTX_VDDA_1V2_1
B11
DPTX_VDDA_1V2_2
C7
DPTX_VDDA_1V2_3
C8
DPTX_VDDA_1V2_4
D9
VDDA_3V3
D6
VDD33_TX
D5
VDD_RPLL
A3
AVDD_LVRX_12
L7
AVDD_OUT_LVRX_33_1
H3
AVDD_OUT_LVRX_33_2
H12
AVDD_OUT_LVRX_33_3
L8
AVDD_OUT_LVRX_33_4
N1
AVDD_OUT_LVRX_33_5
N14
PVSS3_1
A1
PVSS3_2
A14
PVSS3_3
F6
PVSS3_4
F7
PVSS3_5
F8
PVSS3_6
F9
PVSS3_7
G6
PVSS3_8
G7
PVSS3_9
G8
PVSS3_10
G9
PVSS3_11
H6
PVSS3_12
H7
PVSS3_13
H8
PVSS3_14
H9
PVSS3_15
J6
PVSS3_16
J7
PVSS3_17
J8
PVSS3_18
J9
DPTX_VSSA_1
D7
DPTX_VSSA_2
D8
DPTX_VSSA_3
E9
DPTX_VSSA_4
E10
VSS_RPLL
A2
VSSA_TX
C5
AVSS_LVRX
K7
AVSS_OUT_LVRX_6
P1
AVSS_OUT_LVRX_1
F2
AVSS_OUT_LVRX_2
F13
AVSS_OUT_LVRX_3
H5
AVSS_OUT_LVRX_4
H10
AVSS_OUT_LVRX_5
K8
AVSS_OUT_LVRX_7
P14
IC3700
STDP4028AB(REV.C)
DPTX_REXT
C11
DPTX_HDP_IN_GPIO_23
C12
DPTX_AUXN
C10
DPTX_AUXP
D10
DPTX_ML_L0N
B6
DPTX_ML_L0P
C6
DPTX_ML_L1N
A7
DPTX_ML_L1P
B7
DPTX_ML_L2N
A8
DPTX_ML_L2P
B8
DPTX_ML_L3N
B9
DPTX_ML_L3P
C9
TX_XTAL
B4
TX_TCLK
C4
RESETn
E6
SPI_DI
D13
SPI_DO
C14
SPI_CLK
E12
SPI_CSn
F10
IR_IN_GPIO_6
G4
IRQ_BOOT7_GPIO_12
D12
VBUFC_RPLL
C3
TESTMODE0
F3
TESTMODE1
G3
AUX_I2C_SCL_GPIO_15
C13
AUX_I2C_SDA_GPIO_16
B14
I2C_SCL_GPIO_24
B13
I2C_SDA_GPIO_25
A13
UART_TX_BOOT1_GPIO_13
C2
UART_RX_GPIO_14
B1
AUX_UART_TX_BOOT2_GPIO_21
B12
AUX_UART_RX_GPIO_22
A12
I2S_0_GPIO_8
D2
I2S_1_GPIO_9
F5
I2S_2_GPIO_10
F4
I2S_3_GPIO_11
D3
I2S_BCLK_GPIO_7
C1
I2S_WCLK_GPIO_4
E4
CLK_OUT_GPIO_5
E3
NC_1
B2
NC_2
B3
NC_3
D11
NC_4
E11
NC_5
F12
NC_6
G12
PWM0_GPIO_0_BOOT3
E5
GPIO_1
D4
GPIO_2_BOOT_5
G10
GPIO_3_BOOT6
F11
STDP_SPI_CLK
STDP_SPI_CS
STDP_SPI_DI
R3832
22
R3829
22
R3830
22
STDP_SPI_DO
R3831
22
P3802
12505WR-05A00
1
STDP_SPI_DI
2
STDP_SPI_CKL
3
STDP_SPI_DO
4
STDP_SPI_CS
5
6
R3819 0
R3820 0
P3800
12507WS-04L
1
+3.3V
2
GND
3
RX
4
TX
5
.
C3836 24pF 50V
C3837
24pF 50V
ALEF M240Hz(TM480Hz) JIG Board
DP Signal
2009. 12. 28
3
3
[DPRX Firmware Bootstraps]
[SPI FLASH(2Mbit)]
[DPRX Hardware Bootstraps]
UART JIG
Temporary STDP TX SPI DOWNLOAD
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