DOWNLOAD LG 42SL90QD-SA (CHASSIS:LJ91L) Service Manual ↓ Size: 4.82 MB | Pages: 72 in PDF or view online for FREE

Model
42SL90QD-SA (CHASSIS:LJ91L)
Pages
72
Size
4.82 MB
Type
PDF
Document
Service Manual
Brand
Device
TV / LCD
File
42sl90qd-sa-chassis-lj91l.pdf
Date
PREV: LG 42SL90QD-DA (CHASSIS:LT91L) Service Manual

LG 42SL90QD-SA (CHASSIS:LJ91L) Service Manual ▷ View online

THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
POWER
BCM (BRAZIL VENUS)
2009.03.23
R823
1K
OPT
IC805
AOZ1073AIL
3
AGND
2
VIN
4
FB
1
PGND
5
COMP
6
EN
7
LX_1
8
LX_2
L815
3.6uH
RL_ON
12:I5;14:E5
+3.3V_ST
C846
330pF
50V
INV_ON/OFF
12:I5
D803
1N4148W
100V
3.3K
R832
C815
2200pF
IC802
AZ1085S-ADJTR/E1
1
ADJ/GND
2
OUTPUT
3
INPUT
R843
10K
C801
10uF
16V
R810
22K
R813
47K
L807
CB4532UK121E
+5.0V
12:A3;2:Y20;2:Z10;B3;C6;H5;7:A3;14:I7;14:J1
R853
300
C838
1uF
25V
3.3K
R873
A_DIM
9:G6;9:I3
C895
0.1uF
50V
TruMotion_240Hz
C868
10uF
10V
C
8
8
2
1
0
u
F
6
.
3
V
D1.8V
R864
620
R854
10K
C821
0.068uF
R812
47K
R824
10K
22uF
C819
16V
C876
100uF
16V
0.1uF
C808
16V
OPT
C1810
10uF
6.3V
R870
10K
OPT
L817
2.2uH
C896
22uF
16V
C840
1000pF
50V
L826
BG2012B080TF
Q812
SI4804BDY
3
S2
2
G1
4
G2
1
S1
5
D2_1
6
D2_2
7
D1_1
8
D1_2
C1807
0.1uF
R855
12.4K
1%
C870
0.1uF
16V
PWM_DIM
9:G7;9:I3;7:I5
Q806
2SC3052
E
B
C
R840
39K
C824
0.1uF
50V
OPT
C851
470pF
IC803
SC4215ISTRT
3
VIN
2
EN
4
NC_2
1
NC_1
5
NC_3
6
VO
7
ADJ
8
GND
22uF
C842
16V
+12V
R835
0
+1.8V_MEMC
R872
1.2K
C883
100uF
16V
+3.3V_MEMC
D1.2V
R811
22K
R805
10K
R849
10K
R875
0
C803
0.1uF
16V
C817
4.7uF
25V
OPT
R833
390K
1/8W
C885
33uF
C1802
10uF
25V
D805
SAM2333
A
2
[
G
N
]
C
A
1
[
R
D
]
C826
47uF
25V
C845
0.1uF
50V
R827
10K
OPT
C878
0.1uF
+12V
12:A3;A6;B5;F7;G7;I2;14:B2
IC807
SC4215ISTRT
3
VIN
2
EN
4
NC_2
1
NC_1
5
NC_3
6
VO
7
ADJ
8
GND
R869
0
OPT
R828
10K
OPT
C820
15pF
50V
C836
0.1uF
C832
1uF
25V
+5.0V
C829
1uF
25V
OPT
R845
15K
C856
6800pF
L804
BG2012B080TF
R841
18K
A2.5V
+5.0V
C811
0.1uF
C830
2200pF
Q813
2SC3875S(ALY)
OPT
E
B
C
Q802
2SC3052
E
B
C
C844
0.1uF
R816
6.8K
OPT
C1804
470pF
R807
0
OPT
Q807
2SC3875S(ALY)
OPT
E
B
C
C
8
8
1
1
0
u
F
6
.
3
V
R826
10K
OPT
R844
11K
R821
1.8K
C859
0.1uF
D2.5V
L812
MLB-201209-0120P-N2
L801
CB3216PA501E
C1805
1uF
25V
L828
2.2uH
R829
0
+3.3V_ST
C899
100uF
16V
C814
0.1uF
16V
C1806
1uF
25V
R842
2K
P801
FM20020-24
19
N.C
14
12V
9
5.2V
4
GND
18
24V
13
12V
8
5.2V
3
GND
17
24V
12
GND
7
5.2V
2
POWER_ON
16
GND
11
GND
6
GND
1
N.C
20
Inverter_On
15
GND
10
5.2V
5
GND
21
A.Dim
22
Error_Out
23
N.C
24
PWM_Dim
25
GND
+3.3V_ST
IC801
AZ1117D-3.3TRE1 
1
ADJ/GND
2
OUTPUT
3
INPUT
+5V_ST
C1809
10uF
25V
C807
68uF
35V
C
8
5
2
1
0
u
F
6
.
3
V
R806
10K
OPT
D3.3V
R825
66.5
1%
C1800
1uF
25V
C806
0.1uF
16V
OPT
C877
0.1uF
16V
C812
0.1uF
50V
D3.3V
C887
0.1uF
C886
0.1uF
D3.3V
R874
1.1K
C835
1uF
25V
C
8
6
1
0
.
0
1
u
F
C1812
10uF
6.3V
Q804
SI4925BDY
3
S2
2
G1
4
G2
1
S1
5
D2_1
6
D2_2
7
D1_1
8
D1_2
Q809
SI4804BDY
3
S2
2
G1
4
G2
1
S1
5
D2_1
6
D2_2
7
D1_1
8
D1_2
C
8
8
4
0
.
0
1
u
F
D802
1N4148W
100V
L819
2.2uH
+12V
C860
10uF
16V
+5V_ST
C1801
0.01uF
Q803
2SC3052
E
B
C
D801
1N4148W
100V
C872
1uF
25V
C804
1uF
50V
IC806
SC2621ASTRT
3
COMP
2
OCS
4
FB
1
BST
6
LDFB
5
LDOG
7
GND_1
8
VCC
9
NC
10
DRV
11
DL
12
GND_2
13
PN
14
DH
PANEL_CTL
12:I5
C1813
10uF
6.3V
R
8
4
6
1
K
+5V_ST
ERROR_OUT
12:F6
R852
10K
R857
56
1%
OPC_OUT1
7:I5
C805
1uF
25V
C822
0.1uF
C1803
33uF
10V
A3.3V
C880
470pF
C875
10uF
6.3V
C825
220pF
C828
0.1uF
50V
R830
0
A1.2V
+12V
C1811
1uF
25V
IC809
SC2621ASTRT
3
COMP
2
OCS
4
FB
1
BST
6
LDFB
5
LDOG
7
GND_1
8
VCC
9
NC
10
DRV
11
DL
12
GND_2
13
PN
14
DH
R822
0
OPT
C839
22uF
16V
+1.8V_MEMC
+12V
12:A3;A6;C4;F7;G7;I2;14:B2
C818
330uF
4V
R871
20K
C862
470pF
C888
33uF
10V
C873
1uF
25V
C833
22uF
25V
+12V
6.8K
R831
C841
10uF
+24V
+1.26V_MEMC
+5.0V
C827
100uF
R848
1.5K
R818
3.3K
R801
4.7K
C810
22uF
16V
+5V_ST
C853
10uF
16V
R819
56
1%
C837
1uF
25V
R862
5.6K
C863
10uF
16V
R856
22K
L808
MLB-201209-0120P-N2
IC804
SC2621ASTRT
3
COMP
2
OCS
4
FB
1
BST
6
LDFB
5
LDOG
7
GND_1
8
VCC
9
NC
10
DRV
11
DL
12
GND_2
13
PN
14
DH
Q810
SI4804BDY
3
S2
2
G1
4
G2
1
S1
5
D2_1
6
D2_2
7
D1_1
8
D1_2
R815
100
12V_TCON
7:I5;7:I7
C898
1uF
25V
R859
330K
1/10W
R814
15K
1%
C802
68uF
35V
R847
200
R863
1K
C1814
10uF
6.3V
C858
33uF
10V
C1815
10uF
6.3V
R876
1K
LD1
SAM2333
A2[GN]
C
A1[RD]
0
R802
R877
0
R878
0
R834
150K
1/10W
Q805
RT1P141C-T112
E
B
C
R817
33K
OPT
R820
33K
C1816
10uF
6.3V
C1808
100uF
16V
C865
10uF
6.3V
C854
330uF
4V
JP810
C1817
10uF
C855
10uF
6.3V
C1818
0.1uF
50V
OPT
C1819
0.1uF
50V
OPT
L805
CB4532UK121E
R861
3.3
R837
3.3
R836
3.3
C879
470pF
C848
470pF
C847
470pF
L
8
2
4
M
L
B
-
2
0
1
2
0
9
-
0
1
2
0
P
-
N
2
L829
MLB-201209-0120P-N2
L822
MLB-201209-0120P-N2
L830
MLB-201209-0120P-N2
L827
MLB-201209-0120P-N2
L813
MLB-201209-0120P-N2
L806
MLB-201209-0120P-N2
L821
MLB-201209-0120P-N2
L811
MLB-201209-0120P-N2
15
4
AN SO YOUNG
* FROM LIPS & POWER B/D -->Apply changed Pin Map 
220uF ==> 100uF*2 + 22uF for Depth
600 mA
must be placed with pin#8,#10 as close as possible. 
VOUT : 2.533V
400 mA + 600 mA
FLASH, A1.2, +1.8_DDR_BCM3556, VTT
R1
750 mA
* +5v_ST to +3.3V_ST
We’ll change SI4804 to KEC’s Product
415 mA @85% efficiency
R2
* +1.26V Core for FRC
* +1.8V_MEMC for FRC DDR
1.8V_BCM3556
 * +5.0V to 1.2V
must be placed with pin#8,#10 as close as possible. 
* +12v -> PANEL_POWER
* +12V to +5.0V
* D1.8V
Vout = (1+R2/R1)*1.25
A
B
C
D
E
F
G
H
I
J
1
2
3
4
5
6
7
[E1]
[D1]
[L9]
[N5]
[N4]
[N12]
[N13]
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
2009.03.23
LVDS / Mstar FRC
BCM (BRAZIL VENUS)
URSA_DQ[28]
URSA_C4P
URSA_A[10]
URSA_C4M
URSA_DQ[14]
URSA_D1P
URSA_DQ[0-31]
URSA_DQ[4]
URSA_BCKM
URSA_A[1]
URSA_DQ[25]
URSA_DQ[18]
URSA_DQ[21]
URSA_A4M
URSA_BCKP
URSA_DQ[9]
URSA_B2P
URSA_DQ[6]
URSA_A[8]
URSA_B1M
URSA_B0M
URSA_B1P
URSA_B0P
URSA_A[3]
URSA_A4P
URSA_A3P
URSA_D3M
URSA_DCKM
URSA_DQ[5]
URSA_DQ[12]
URSA_DCKP
URSA_B2M
URSA_D2P
URSA_A[5]
URSA_D2M
URSA_DQ[3]
URSA_DQ[20]
URSA_DQ[26]
URSA_A3M
URSA_ACKM
URSA_DQ[31]
URSA_A2P
URSA_B4M
URSA_DQ[30]
URSA_DQ[0]
URSA_A[2]
URSA_DQ[7]
URSA_DQ[2]
URSA_A[11]
URSA_A[6]
URSA_C2P
URSA_C0P
URSA_A[7]
URSA_DQ[16]
URSA_DQ[27]
URSA_DQ[29]
URSA_DQ[10]
URSA_DQ[17]
URSA_DQ[19]
URSA_ACKP
URSA_A1M
URSA_A2M
URSA_A1P
URSA_A0P
URSA_A0M
URSA_C0M
URSA_C1P
URSA_C1M
URSA_DQ[11]
URSA_A[4]
URSA_DQ[22]
URSA_A[0]
URSA_DQ[15]
URSA_D4M
URSA_D4P
URSA_DQ[24]
URSA_D3P
URSA_D0M
URSA_D0P
URSA_DQ[8]
URSA_C2M
URSA_D1M
URSA_A[12]
URSA_B4P
URSA_DQ[23]
URSA_B3P
URSA_B3M
URSA_A[9]
URSA_DQ[13]
URSA_CCKP
URSA_C3P
URSA_CCKM
URSA_C3M
URSA_DQ[1]
URSA_C3P
URSA_A3P
URSA_C3M
URSA_A4P
URSA_B4M
URSA_D1P
URSA_B1P
URSA_A2M
URSA_BCKP
URSA_ACKM
URSA_B3P
URSA_A3M
URSA_B4P
URSA_A4M
URSA_D2M
URSA_A1M
URSA_D3P
URSA_A0M
URSA_DCKM
URSA_C2M
URSA_B0P
URSA_B0M
URSA_B2P
URSA_D4M
URSA_C0P
URSA_D0M
URSA_C4M
URSA_D1M
URSA_C4P
URSA_B1M
URSA_D0P
URSA_D2P
URSA_B2M
URSA_DCKP
URSA_C0M
URSA_C2P
URSA_C1P
URSA_A0P
URSA_C1M
URSA_A1P
URSA_BCKM
URSA_CCKP
URSA_A2P
URSA_D4P
URSA_CCKM
URSA_ACKP
URSA_B3M
URSA_D3M
R922
100
LVDS_TX_1_DATA0_N
LVDS_TX_1_DATA1_P
+3.3V_MEMC
R908
2.2K
OPT
LVDS_TX_1_DATA3_P
C
9
0
8
0
.
1
u
F
C933
10uF
URSA_BA0
LVDS_TX_0_DATA1_P
C923
0.1uF
L904
BLM18PG121SN1D
C916
10uF
LVDS_TX_0_DATA3_P
R946
56
LVDS_TX_1_DATA4_P
C953
0.1uF
C904
0.1uF
C924
1uF
URSA_DQM3
URSA_MCLKE
R909
0
C914
0.1uF
R939
1K
OPT
M_SPI_DO
+1.26V_MEMC
LVDS_TX_0_DATA3_N
R926
100
URSA_A[0-12]
R920
100
URSA_DQSB0
ISP_TXD_TR
A3
C
9
3
8
0.1uF
C
9
4
3
0
.
1
u
F
ISP_TXD_TR
B6
M_XTALO
C920
0.1uF
R924
100
C919
0.1uF
URSA_DQSB3
LVDS_TX_1_CLK_N
URSA_DQS2
C930
0.1uF
R918
100
+3.3V_MEMC
C921
0.1uF
C931
10uF
10V
+3.3V_MEMC
+3.3V_MEMC
C956
0.1uF
LVDS_TX_1_DATA3_N
C
9
5
1
0
.
1
u
F
R942
1K
L905
BLM18PG121SN1D
C
9
4
1
0
.
1
u
F
R931
820
URSA_DQM1
M_SPI_DO
C929
0
.
1
u
F
IC902
W25X20AVSNIG
3
WP
2
DO
4
GND
1
CS
5
DIO
6
CLK
7
HOLD
8
VCC
URSA_MCLKZ
C
9
4
8
0
.
1
u
F
URSA_DQM2
URSA_DQS1
M_SPI_CK
H3
LVDS_TX_0_DATA4_P
R925
100
LVDS_TX_1_DATA2_N
M_XTALI
L908
BLM18PG121SN1D
C957
0.1uF
ISP_RXD_TR
B6
R923
100
X901
12MHz
SCL3_3.3V
9:I4
URSA_WEZ
C
9
3
4
0.1uF
C909
10uF
+5.0V
C
9
3
2
0.1uF
URSA_MCLK
LVDS_TX_0_DATA4_N
L907
BLM18PG121SN1D
L902
BLM18PG121SN1D
R915
1K
LVDS_TX_1_DATA1_N
R907
2.2K
OPT
LVDS_TX_1_DATA4_N
URSA_CASZ
ISP_RXD_TR
A3
M_XTALI
R938
1K
R917
100
R914
10K
R951
56
+3.3V_MEMC
C913
0.1uF
16V
+3.3V_MEMC
R952
56
URSA_BA1
LVDS_TX_0_DATA1_N
+3.3V_MEMC
C925
0.1uF
FRC_RESET
M_SPI_CZ
C910
10uF
C906
10uF
C
9
4
0
0
.
1
u
F
L906
BLM18PG121SN1D
C912
0.1uF
16V
LVDS_TX_1_DATA2_P
C927
0.1uF
+1.8V_MEMC
+3.3V_MEMC
C
9
3
9
0.1uF
R913
10K
LVDS_TX_0_DATA2_N
URSA_MCLK1
M_XTALO
LVDS_TX_0_DATA0_N
R916
1K
OPT
C952
10uF
C
9
1
7
0
.
1
u
F
LVDS_TX_1_CLK_P
C
9
4
9
0
.
1
u
F
M_SPI_DI
SDA3_3.3V
9:I4
C
9
3
7
0
.
1
u
F
URSA_ODT
R928
100
C922
0.1uF
+3.3V_MEMC
LVDS_TX_0_CLK_N
R912
100
LVDS_TX_0_DATA2_P
LVDS_TX_0_CLK_P
R927
100
R910
0
C
9
4
2
0
.
1
u
F
L903
BLM18PG121SN1D
C911
10uF
URSA_RASZ
LVDS_TX_1_DATA0_P
M_SPI_DI
H3
C944
1uF
URSA_DQSB2
URSA_DQSB1
C
9
4
5
0
.
1
u
F
C901
0.1uF
R943
1K
OPT
C
9
3
6
0.1uF
R911
100
C928
0.1uF
R929
1M
C
9
3
5
0
.
1
u
F
R947
10K
R930
0
M_SPI_CK
R945
56
C926
0.1uF
LVDS_TX_0_DATA0_P
URSA_DQ[0-31]
URSA_MCLKZ1
C
9
5
0
0
.
1
u
F
URSA_DQM0
C
9
5
8
0
.
1
u
F
M_SPI_CZ
R921
100
C918
0.1uF
R919
100
C955
0.1uF
URSA_DQS3
URSA_DQS0
C954
10uF
LVDS_SEL
R936
0
OPT
OPC_OUT1
OPC_EN
R937
0
OPC_EN
R941
0 OPC_EN
R953
0
OPT
12V_TCON
R940
0
C960
1000pF
50V
L909
CB3216PA501E
PWM_DIM
C961
0.1uF
50V
BIT_SEL
R949
3.3K
OPT
R955
3.3K
P902
TJC2508-4A
1
2
3
4
P903
TF05-51S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
P904
TF05-41S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
IC901
LGE7329A
E1
SDAS
D1
SCLS
F1
GPIO[8]
G1
GPIO[9]
K8
GND_14
E5
VDDC_1
E2
GPIO[10]
F2
GPIO[11]
F3
GPIO[12]
G2
GPIO[13]
M4
GPIO[22]
M5
GPIO[23]
G3
GPIO[14]
E4
GPIO[15]
F4
GPIO[16]
G4
GPIO[17]
H4
GPIO[18]
J4
GPIO[19]
K4
GPIO[20]
L4
GPIO[21]
J6
VDDP_2
H9
GND_7
F6
VDDC_2
H1
MDATA[20]
H2
MDATA[19]
H3
MDATA[17]
J1
MDATA[22]
J2
MDATA[27]
J3
MDATA[28]
K1
MDATA[25]
K2
MDATA[30]
K6
AVDD_DDR_2
K3
DQM[3]
L1
DQM[2]
J8
GND_10
L2
DQS[2]
L3
DQSB[2]
L6
AVDD_DDR_4
L8
VDDP_3
H10
GND_8
M1
DQS[3]
M2
DQSB[3]
L7
AVDD_DDR_5
M3
MDATA[31]
N1
MDATA[24]
J9
GND_11
N2
MDATA[26]
N3
MDATA[29]
L10
AVDD_DDR_6
P1
MDATA[23]
R1
MDATA[16]
T1
MDATA[18]
T2
MDATA[21]
R2
MCLK[0]
P2
MCLKZ[0]
G7
GND_1
L9
AVDD_MEMPLL
N5
MVREF
N4
ODT
T3
RASZ
R3
CASZ
P3
MADR[0]
T4
MADR[2]
R4
MADR[4]
J10
GND_12
P4
MADR[6]
T5
MADR[8]
R5
MADR[11]
P5
WEZ
T6
BADR[1]
R6
BADR[0]
P6
MADR[1]
T7
MADR[10]
L11
AVDD_DDR_7
R7
MADR[5]
P7
MADR[9]
T8
MADR[12]
R8
MADR[7]
P8
MADR[3]
N8
MCLKE
K10
GND_16
F7
VDDC_3
T9
MDATA[4]
R9
MDATA[3]
K7
GND_13
P9
MDATA[1]
T10
MDATA[6]
K11
AVDD_DDR_3
R10
MDATA[11]
P10
MDATA[12]
T11
MDATA[9]
R11
MDATA[14]
J11
AVDD_DDR_1
P11
DQM[1]
T12
DQM[0]
R12
DQS[0]
P12
DQSB[0]
H11
VDDP_1
T13
DQS[1]
R13
DQSB[1]
P13
MDATA[15]
T14
MDATA[8]
R14
MDATA[10]
P14
MDATA[13]
T15
MDATA[7]
R15
MDATA[0]
P15
MDATA[2]
T16
MDATA[5]
R16
MCLK[1]
P16
MCLKZ[1]
N9
GPIO[26]
N10
GPIO[27]
N11
GND_17
M11
RESET
G6
VDDC_4
N12
GPIO[28]
N13
GPIO[29]
N14
GPIO[30]
L13
SCK
M13
SDI
M12
SDO
K13
CSZ
L12
PWM1
K12
PWM0
J13
GPIO[0]
H13
GPIO[1]
G13
GPIO[2]
F13
GPIO[3]
E13
GPIO[4]
F12
GPIO[5]
D14
GPIO[6]
E12
GPIO[7]
N6
GPIO[24]
H6
VDDC_5
N15
LVD4M
N16
LVD4P
M14
LVD3M
M15
LVD3P
F8
AVDD_33_1
M16
LVDCKM
L16
LVDCKP
L15
LVD2M
L14
LVD2P
G9
GND_3
K14
LVD1M
J14
LVD1P
J16
LVD0M
J15
LVD0P
H15
LVC4M
H16
LVC4P
H14
LVC3M
G14
LVC3P
G16
LVCCKM
G15
LVCCKP
F15
LVC2M
F16
LVC2P
F14
LVC1M
E14
LVC1P
E16
LVC0M
E15
LVC0P
G10
GND_4
F9
AVDD_33_2
D16
LVB4M
D15
LVB4P
C16
LVB3M
B16
LVB3P
A16
LVBCKM
A15
LVBCKP
B15
LVB2M
C15
LVB2P
D2
GPIO_3
E3
GPIO_10
E10
GPIO_11
D10
GPIO_7
D8
GPIO_5
D12
REXT
C14
LVB1M
C13
LVB1P
A13
LVB0M
B13
LVB0P
D7
GPIO_4
D9
GPIO_6
B12
LVA4M
A12
LVA4P
C12
LVA3M
C11
LVA3P
A11
LVACKM
B11
LVACKP
B10
LVA2M
A10
LVA2P
C10
LVA1M
C9
LVA1P
A9
LVA0M
B9
LVA0P
F10
AVDD_PLL
G8
GND_2
D11
GPIO_8
D13
GPIO_9
E11
GPIO_12
N7
GPIO[25]
D6
SCLM
D5
SDAM
A14
GPIO_1
B14
GPIO_2
D3
XIN
D4
XOUT
K16
GPIO_14
K15
GPIO_13
H7
GND_5
G11
AVDD_LVDS_2
B8
RO0N
A8
RO0P
C8
RO1N
C7
RO1P
A7
RO2N
B7
RO2P
B6
ROCKN
A6
ROCKP
C6
RO3N
C5
RO3P
A5
RO4N
B5
RO4P
H8
GND_6
F11
AVDD_LVDS_1
B4
RE0N
A4
RE0P
C4
RE1N
C3
RE1P
A3
RE2N
B3
RE2P
B2
RECKN
A2
RECKP
C2
RE3N
C1
RE3P
A1
RE4N
B1
RE4P
GND_9
J7
GND_15 K9
12V_TCON
R954
3.3K
OPT
+3.3V_MEMC
R948
499
OPC_EN
R3029
0
1/16W
5%
OPT
LVDS_SEL
9:G6;I5
R933
4.7K
C915
10uF
6.3V
C3019
10uF
6.3V
C907
10uF
C3020
10uF
C947
22pF
C946
22pF
7
15
HIGH
PI Result
EEPROM
HIGH
* XTAL
I2C
HIGH
* ISP Port for MEMC
LOW
PWM1
PI Result
HIGH
HIGH
HIGH
* SPI FLASH
SPI
PWM0
GPIO8
LOW
HIGH
PARK.S.W
22uF/16 CST PROBLEM
22uF/16 CST PROBLEM
A
B
C
D
E
F
G
H
I
J
1
2
3
4
5
6
7
THE    SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS 
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE    SYMBOL MARK OF THE SCHEMETIC.
2009.03.23
M-STAR FRC DDR
BCM (BRAZIL VENUS)
DDR_DQ[22]
DDR_DQ[13]
URSA_DQ[26]
URSA_DQ[10]
DDR_DQ[15]
DDRA_A[1]
DDRB_A[9]
DDRA_A[2]
DDR_DQ[0]
DDRA_A[7]
URSA_DQ[11]
DDR_DQ[23]
DDR_DQ[18]
DDRA_A[3]
DDR_DQ[8]
DDR_DQ[17]
URSA_DQ[16]
DDR_DQ[14]
URSA_A[3]
DDRB_A[10]
DDR_DQ[3]
DDRB_A[1]
URSA_A[8]
URSA_A[7]
DDRB_A[5]
DDR_DQ[30]
DDR_DQ[24]
DDR_DQ[10]
DDR_DQ[28]
DDRA_A[6]
DDR_DQ[7]
DDRB_A[2]
DDRB_A[3]
URSA_DQ[21]
URSA_DQ[5]
DDR_DQ[20]
URSA_A[5]
DDRA_A[0]
DDRB_A[4]
DDR_DQ[4]
DDRA_A[9]
DDRB_A[0]
URSA_DQ[1]
URSA_DQ[19]
URSA_A[2]
DDRB_A[6]
URSA_DQ[15]
DDRB_A[7]
DDR_DQ[21]
DDR_DQ[11]
DDRA_A[4]
DDRB_A[4]
URSA_A[0]
DDRB_A[1]
URSA_DQ[14]
DDRA_A[12]
DDRB_A[7]
DDRB_A[11]
URSA_DQ[7]
URSA_DQ[22]
URSA_DQ[8]
DDRA_A[10]
DDR_DQ[3]
URSA_DQ[31]
URSA_A[6]
DDR_DQ[0-15]
DDR_DQ[1]
DDRA_A[11]
DDRB_A[5]
DDR_DQ[12]
DDRB_A[2]
URSA_DQ[29]
URSA_DQ[6]
URSA_A[11]
URSA_A[8]
DDRA_A[0-12]
URSA_A[4]
DDR_DQ[8]
DDRB_A[0-12]
DDR_DQ[5]
DDR_DQ[29]
URSA_DQ[2]
DDRB_A[12]
URSA_DQ[18]
DDR_DQ[27]
DDRA_A[3]
URSA_A[1]
DDRA_A[12]
URSA_A[11]
URSA_DQ[20]
DDRA_A[8]
DDRB_A[3]
DDR_DQ[16]
DDR_DQ[10]
URSA_DQ[23]
DDRA_A[0]
DDR_DQ[6]
DDR_DQ[9]
DDRA_A[1]
URSA_DQ[13]
DDRA_A[8]
DDR_DQ[4]
URSA_DQ[24]
DDRA_A[2]
DDRB_A[6]
DDRB_A[8]
DDRA_A[9]
DDR_DQ[9]
DDRA_A[6]
URSA_DQ[17]
DDRB_A[9]
DDRB_A[10]
DDR_DQ[1]
DDR_DQ[31]
URSA_DQ[9]
DDRA_A[5]
URSA_DQ[30]
DDRB_A[11]
DDR_DQ[19]
DDR_DQ[2]
DDRB_A[0]
URSA_A[3]
DDR_DQ[14]
DDR_DQ[25]
URSA_DQ[3]
DDR_DQ[5]
DDRB_A[8]
DDR_DQ[2]
DDR_DQ[0]
DDR_DQ[15]
DDR_DQ[7]
DDR_DQ[26]
DDRB_A[12]
URSA_A[1]
DDRA_A[11]
URSA_DQ[4]
DDRA_A[7]
DDRA_A[5]
DDR_DQ[11]
DDR_DQ[16-31]
DDR_DQ[13]
URSA_DQ[0]
DDRA_A[10]
URSA_DQ[12]
DDR_DQ[6]
DDRA_A[4]
URSA_A[10]
DDR_DQ[12]
URSA_A[10]
URSA_DQ[27]
URSA_DQ[25]
URSA_DQ[28]
URSA_A[7]
URSA_A[5]
URSA_A[0]
URSA_A[2]
URSA_A[4]
URSA_A[6]
DDR_DQ[31]
DDR_DQ[16]
DDR_DQ[17]
DDR_DQ[18]
DDR_DQ[19]
DDR_DQ[20]
DDR_DQ[21]
DDR_DQ[22]
DDR_DQ[23]
DDR_DQ[24]
DDR_DQ[25]
DDR_DQ[26]
DDR_DQ[27]
DDR_DQ[28]
DDR_DQ[29]
DDR_DQ[30]
URSA_A[9]
URSA_A[12]
URSA_A[9]
URSA_A[12]
C1008
0.1uF
URSA_RASZ
URSA_WEZ
7:D1;T10
A_URSA_RASZ
C1020
0.1uF
+1.8V_FRC_DDR
C1021
0.1uF
URSA_BA0
7:D1;U12
C1028
0.1uF
R1015
22
R1003
1K
1%
URSA_DQM1
7:F1
R1012
56
URSA_DQS2
7:B4
R1023
1K
C1041
0.1uF
AR1015
56
C1014
0.1uF
URSA_MCLK
7:B3
A_URSA_BA0
AA17
URSA_WEZ
7:D1;U11
AR1003
56
R1005
22
+1.8V_FRC_DDR
R1013
22
URSA_MCLK1
7:G1
AR1010
22
URSA_DQS1
7:F1
R1011
56
C1018
0.1uF
B_URSA_MCLKE
Q16
URSA_BA1
7:D1;T10
R1019
56
A_URSA_CASZ
R1021
56
C1033
0.1uF
URSA_ODT
7:B3;X15
R1001
150
OPT
R1009
56
AR1006
22
C1006
0.1uF
R1024
150
OPT
A_URSA_MCLKE
U10
AR1008
22
URSA_DQSB2
7:B4
C1016
0.1uF
C1038
0.1uF
C1007
0.1uF
C1015
0.1uF
C1001
1000pF
URSA_RASZ
C1024
10uF
+1.8V_FRC_DDR
URSA_ODT
7:B3;Q15
C1010
10uF
C1035
0.1uF
URSA_DQSB0
7:F1
AR1007
22
C1045
0.1uF
B_URSA_BA1
URSA_DQM2
7:B4
C1032
0.1uF
C1009
0.1uF
B_URSA_CASZ
R17
AR1005
22
A_URSA_WEZ
X14
C1013
0.1uF
+1.8V_FRC_DDR
URSA_MCLKE
7:E1;U11
A_URSA_RASZ
X17
URSA_DQ[0-31]
7:G1;AM22
R1006
22
URSA_DQSB3
7:B4
+1.8V_FRC_DDR
B_URSA_BA1
B_URSA_WEZ
Q14
C1004
10uF
10V
L1002
BLM18PG121SN1D
A_URSA_CASZ
X17
C1044
0.1uF
R1022
1K
+1.8V_MEMC
B_URSA_RASZ
R17
URSA_MCLKE
7:E1;T10
URSA_DQ[0-31]
7:G1;C22
URSA_CASZ
C1040
0.1uF
C1036
0.1uF
C1042
0.1uF
C1037
0.1uF
A_URSA_BA0
C1034
0.1uF
URSA_DQSB1
7:F1
C1011
0.1uF
AR1009
22
AR1001
56
R1016
56
URSA_BA1
7:D1;U12
URSA_DQS3
7:B4
AR1004
56
R1002
1K
1%
+1.8V_FRC_DDR
C1002
0.1uF
C1025
10uF
10V
R1004
22
AR1016
56
B_URSA_CASZ
B_URSA_RASZ
C1039
0.1uF
URSA_DQM0
7:F1
URSA_DQS0
7:F1
R1008
56
A_URSA_BA1
AA17
B_URSA_BA0
C1029
0.1uF
AR1011
22
C1026
10uF
C1030
0.1uF
AR1012
22
C1005
10uF
A_URSA_BA1
C1012
0.1uF
AR1018
56
URSA_BA0
7:D1;T11
R1010
56
AR1013
22
AR1017
56
C1043
0.1uF
URSA_CASZ
URSA_A[0-12]
R1017
56
URSA_MCLKZ
7:B3
R1018
56
+1.8V_FRC_DDR
R1007
56
B_URSA_BA0
URSA_MCLKZ1
7:G1
C1031
0.1uF
C1003
0.1uF
C1017
0.1uF
C1019
0.1uF
B_URSA_WEZ
T11
R1014
22
URSA_DQM3
7:B4
A_URSA_MCLKE
Z16
AR1014
22
A_URSA_WEZ
U10
B_URSA_MCLKE
T11
R1020
56
C1027
0.1uF
C1022
0.1uF
C1023
1000pF
AR1002
56
C1048
0.1uF
C1050
0.1uF
C1047
0.1uF
C1053
0.1uF
C1052
0.1uF
C1051
0.1uF
C1049
0.1uF
C1046
0.1uF
+1.8V_MEMC
+1.8V_FRC_DDR
+1.8V_FRC_DDR
+1.8V_FRC_DDR
IC1001
H5PS5162FFR-S6C
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
IC1002
H5PS5162FFR-S6C
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
8
15
DDR2 1.8V By CAP - Place these Caps near Memory
PI Result
HONG.Y.H
 resonance Compensation
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
Q
R
S
T
U
V
W
X
Y
Z
AA
AB
AC
AD
AE
AF
AG
AH
AI
AJ
AK
AL
AM
AN
AO
AP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
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