LG 42LV3700-UD (CHASSIS:LA12B) Service Manual ▷ View online
D-sub RGB
HDMI 1
DDR3 (2Gbit)
NAND Flash
(8Gbit)
Digital Audio (Optic)
Digital AMP
TAS5727
RS-232C (Ctrl./SVC)
I2S
NVRAM
RGB/H/V
DDR_Data[0:15], DQS, DM …
Addr.[ ], ctrl. data
MICOM
(NEC)
MAX3232CDR
Data [0 … 7]
X-tal
AV2
Component 2
Y Pb Pr, L/R
CVBS, L/R
Addr[0…1], CS …
Audio L/R
Audio L/R (for RGB)
HDMI 2
HDMI 3
SPDIF
RX/TX
54MHz
JACK PACK
JACK PACK
at SIDE
at SIDE
JACK PACK
JACK PACK
at REAR
at REAR
SCL, SDA_3.3V
SCL, SDA_3.3V
LCD Module
USB2
IF +/-
SIF
TU_CVBS
Reset / IF_AGC
…
…
SDA/SCL_5V
RF
TDVJ
-H101F
MCLK
Ethernet
Side AV Gender
CVBS, L/R
USB1
DP/DM/ +5V
DP/DM/ +5V
Y Pb Pr
Side Component Gender
DDR3 (2Gbit)
HP_L/R
LVDS_120Hz
LGE35230
(ATSC)
LGE35230
(ATSC)
1. Overview for LGE35230 (ATSC) - US
SIL9287B
3x1
HDMI Switch
EARPHONE AMP
TPA6132
* Each of analog audio signals shall be designed with “Common Mode (INCM) signal ”
2. Video Signal block
D-sub RGB
HDMI 1
SIDE_CVBS Phone JACK
CVBS(AV1_CVBS_IN)
B(DSUB_B+)
REAR AV
Component 1
CVBS(AV2_CVBS_IN)
H_sync(DSUB_HSYNC)
Y(SC_G/COMP2_Y)
Pb(SC_B/COMP2_Pb)
Pr(SC_R/COMP2_Pr)
G(DSUB_G+)
R(DSUB_R+)
HDMI_CLK-/+,RX0-/+, RX1-/+, RX2 -/+
LGE35230
VI_CVBS2
VI_CVBS4
VI_SC_G1
VI_SC_B1
VI_SC_R1
VI_B
VI_R
VI_G
HSYNC_IN
VSYNC_IN
HDMI0_CLKN
HDMI0_CLKP
HDMI0_D0N
HDMI0_D0P
HDMI0_D1N
HDMI0_D1P
HDMI0_D2N
HDMI0_D2P
HDMI0_CLKP
HDMI0_D0N
HDMI0_D0P
HDMI0_D1N
HDMI0_D1P
HDMI0_D2N
HDMI0_D2P
TMDS
DDC
HPD_1
HDMI 2
HDMI 3
HDMI
3x1
Switch
(SIL9287B)
IF + [MAIN]
CVBS [MAIN]
IF - [MAIN]
VI_IFP0
VI_IFM0
VI_IFM0
VI_CVBS3
V_sync(DSUB_VSYNC)
TMDS
DDC
HPD_2
TMDS
DDC
HPD_3
RF
SIDE_Component Phone Jack
Y(COMP1-Y)
Pb(COMP1_Pb)
Pr(COMP1-Pr)
VI_Y1
VI_PB1
VI_PR1
TDVJ-H101F
Main tuner
SCL3_3.3V / SDA3_3.3V
I2SWS_IN
I2SSD_IN/GPIO
ARC
HDMI0_ARC
* Each of analog signals shall be designed with “Common Mode (INCM) signal ”
3. Audio Signal block
BCM3549
TR
Buffer
SIF
LGE35230
AADC_LINE_L3
AADC_LINE_R3
AADC_LINE_R3
SPDIF_OUT
ATSC/NTSC
TDVJ-H101F
ATSC/NTSC
TDVJ-H101F
MUTE
From Micom
From Micom
I2SSCK_OUTA/GPIO
I2SWS_OUTA/GPIO
I2SSD_OUTA0/GPIO
I2SSOSCK_OUTA/GPIO
TAS5727
TAS5727
SPDIF_OUT
I2S
HP_L/ROUT_N/P
TPA6132A2
(EARPHONE AMP)
TPA6132A2
(EARPHONE AMP)
VI_SIF1_1,2
AV2 Audio (Rear)
AV2_L_IN
AV2_R_IN
AADC_LINE_L4
AADC_LINE_R4
AADC_LINE_R4
Comp2 Audio (Rear)
SC/COMP2_L_IN
SC/COMP2_R_IN
AADC_LINE_L2
AADC_LINE_R2
AADC_LINE_R2
AV1 or Comp1 Audio
(Used in common)
(Used in common)
AV1_L_IN
AV1_R_IN
RGB-PC Audio
AADC_LINE_L1
AADC_LINE_R1
AADC_LINE_R1
PC_L_IN
PC_R_IN
ADAC_AL_N
ADAC_AL_P
ADAC_AR_N
ADAC_AR_P
4. LVDS Tx (FHD120Hz)
LGE35230
LVDS Tx
Block
LVDS_SEL
BIT_SEL
• LVDS_SEL : “H”=JEIDA, “L” or NC=VESA (LGD)
• BIT_SEL : “H” or NC = 10-bit, “L” = 8-bit
• BIT_SEL : “H” or NC = 10-bit, “L” = 8-bit
10-bit (R)
Dual-link LVDS Output
24
51Pin
LVDS
Output
PANEL_VCC
(+12V)
10-bit (R)
Dual-link LVDS Output
24
41Pin
LVDS
Output
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