LG 42LD490 (CHASSIS:LD03B) Service Manual ▷ View online
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
WIRELESS
BCM_RXD1
R8705
2.2K
2.2K
C8702
0.01uF
50V
+3.5V_ST
JK8700
KJA-PH-3-0168
14
GND_3
13
I2C_SDA
5
VCC[24V/20V/17V]_5
12
I2C_SCL
11
GND_2
2
VCC[24V/20V/17V]_2
19
GND_5
18
IR
10
RESET
4
VCC[24V/20V/17V]_4
1
VCC[24V/20V/17V]_1
17
GND_4
9
GND_1
8
INTERRUPT
3
VCC[24V/20V/17V]_3
16
UART_TX
7
DETECT
6
VCC[24V/20V/17V]_6
15
UART_RX
20
GND_6
21
SHIELD
TP8700
+24V
R8700
0
WIRELESS
C8701
2.2uF
R8711
4.7K
OPT
C8703
0.1uF
R8713
1K
IC8700
MC14053BDR2G
WIRELESS
3
Z1
2
Y0
4
Z
1
Y1
6
INH
5
Z0
7
VEE
8
VSS
9
C
10
B
11
A
12
X0
13
X1
14
X
15
Y
16
VDD
R8704
22K
22K
R8712
47K
OPT
R8706
0 NON_WIRELESS
0 NON_WIRELESS
R8708
0
WIRELESS
C8700
0.1uF
50V
0.1uF
50V
WIRELESS_TX
WIRELESS_SCL
R8714
10K
TP8701
R8707
0
WIRELESS
WIRELESS_DL_RX
+3.3V_NORMAL
+3.5V_ST
IR_PASS
R8701
0
WIRELESS
WIRELESS_DETECT
R8702
10K
10K
WIRELESS_RX
R8703
0
NON_WIRELESS
WIRELESS_PWR_EN
Q8700
E
B
C
WIRELESS_SW_CTRL
BCM_RX
BCM_TX
Q8701
AO3407A
G
D
S
WIRELESS_RX
WIRELESS_TX
BCM_TXD1
WIRELESS_DL_TX
WIRELESS_SDA
C8704
10uF
35V
10uF
35V
C8705
10uF
35V
10uF
35V
L8700
MLB-201209-0120P-N2
RS232C & Wireless
LOW
WIRELESS_SW_CTRL
Wireless power
WIRELESS Dongle connect --> WIRELESS RS232
HIGH
SELECT PIN
WIRELESS Dongle Dis_con --> S7 RS232
X0/Y0/Z0
X1/Y1/Z1
WIRELESS READY MODEL
STATUS
12
THERMAL
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2009.06.18
NTP7000
BCM (EUROBBTV)
+1.8V_AMP
0.1uF
C8820
50V
IC8800
AP1117E18G-13
2
OUT
3
IN
1
ADJ/GND
C8810
1000pF
50V
C8840
0.47uF
50V
R8803
100
C8808
1000pF
50V
R8822
4.7K
+1.8V_AMP
C8800
0.1uF
16V
0.1uF
16V
+1.8V_AMP
Q8800
2SC3052
E
B
C
R8819
12
R8821
4.7K
R8809
3.3
3.3
EMI
C8826
10uF
35V
10uF
35V
R8811
10K
R8814
12
C8802
10uF
10V
10uF
10V
C8837
390pF
50V
L8801
BLM18PG121SN1D
C8806
100pF
50V
0.1uF
C8824
50V
AUD_LRCK
C8805
10uF
10V
OPT
AUD_LRCH
C8830
22000pF
50V
R8815
12
SCL1_3.3V
0.1uF
C8818
16V
D8802
100V
1N4148W
OPT
R8826
0
0
AUD_SCK
C8825
1uF
25V
0.1uF
C8807
16V
AMP_MUTE
C8832
0.01uF
50V
0.01uF
50V
EMI
SPK_L+
0.1uF
C8842
50V
AMP_RESET_N
0.1uF
C8831
50V
SPK_L-
R8818
12
D8801
100V
1N4148W
OPT
C8809
33pF
50V
33pF
50V
SPK_R+
R8806
3.3K
C8803
0.1uF
16V
0.1uF
16V
+3.3V_NORMAL
SPK_R-
C8823
22000pF
50V
R8812
12
+1.8V_AMP
SPK_L+
C8829
22000pF
50V
C8812
33pF
50V
33pF
50V
P8800
WAFER-ANGLE
1
2
3
4
AUD_MASTER_CLK
C8839
0.47uF
50V
R8800
1
R8827
0
0
L8802
BLM18PG121SN1D
+24V_AMP
SPK_R+
+3.5V_ST
C8838
390pF
50V
R8823
4.7K
L8800
BLM18PG121SN1D
R8805
100
D8803
100V
1N4148W
OPT
C8815
10uF
10uF
10V
OPT
0.1uF
C8843
50V
0.1uF
C8844
50V
+3.3V_NORMAL
R8808
100
R8801
100
POWER_DET
R8813
12
R8816
12
C8801
10uF
10V
OPT
0.1uF
C8833
50V
R8817
12
C8835
390pF
50V
R8807
0
0
OPT
0.1uF
C8841
50V
R8824
0
0
R8802
100
SDA1_3.3V
R8804
100
C8804
0.1uF
16V
D8800
100V
1N4148W
OPT
R8810
10K
C8821
1000pF
50V
1000pF
50V
C8828
1uF
25V
C8834
10uF
35V
10uF
35V
0.1uF
C8811
C8816
1uF
25V
+24V_AMP
C8822
1uF
25V
R8820
4.7K
C8819
22000pF
50V
SPK_R-
R8825
0
0
SPK_L-
C8836
390pF
50V
IC8801
NTP-7000
EAN60969601
1
BST1A
2
VDR1A
3
/RESET
4
AD
5
DGND_1
6
GND_IO
7
CLK_I
8
VDD_IO
9
DGND_PLL
10
AGND_PLL
11
LF
12
AVDD_PLL
13
DVDD_PLL
14
GND
15
DGND_2
16
DVDD
17
SDATA
18
WCK
19
BCK
20
SDA
21
SCL
22
MONITOR0
23
MONITOR1
24
MONITOR2
25
/FAULT
26
VDR2B
27
BST2B
28
PGND2B_1
29
PGND2B_2
30
OUT2B_1
31
OUT2B_2
32
PVDD2B_1
33
PVDD2B_2
34
PVDD2A_1
35
PVDD2A_2
36
OUT2A_1
37
OUT2A_2
38
PGND2A_1
39
PGND2A_2
40
BST2A
41
VDR2A
42
NC
43
VDR1B
44
BST1B
45
PGND1B_1
46
PGND1B_2
47
OUT1B_1
48
OUT1B_2
49
PVDD1B_1
50
PVDD1B_2
51
PVDD1A_1
52
PVDD1A_2
53
OUT1A_1
54
OUT1A_2
55
PGND1A_1
56
PGND1A_2
57
EP_PAD
+24V
L8803
MLB-201209-0120P-N2
+24V_AMP
0.1uF
C8827
50V
L8805
AD-9060
15uH
2S
1S
1F
2F
L8804
AD-9060
15uH
2S
1S
1F
2F
C8813
47pF
50V
47pF
50V
EMI
C8814
47pF
50V
47pF
50V
EMI
C8817
47pF
50V
47pF
50V
EMI
38
KIM JONG HYUN
120 mA
SPEAKER_L
SPEAKER_R
Vd=1.4V
CCFL = 20V
Edge_LED 32~47 Inch = 20V
55 Inch & IOP Module = 24V
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2009.09.11
URSA3 DDR & Power
COMMON
89
DDR3_A[9]
DDR3_DQU[4]
DDR3_DQL[4]
DDR3_DQU[6]
DDR3_A[0]
DDR3_DQL[2]
DDR3_A[8]
DDR3_DQU[1]
DDR3_A[2]
DDR3_DQL[6]
DDR3_A[1]
DDR3_DQU[2]
DDR3_A[6]
DDR3_DQL[0]
DDR3_A[10]
DDR3_A[11]
DDR3_DQU[5]
DDR3_A[5]
DDR3_DQL[3]
DDR3_DQL[1]
DDR3_DQL[5]
DDR3_A[7]
DDR3_DQU[7]
DDR3_DQL[7]
DDR3_A[3]
DDR3_DQU[3]
DDR3_DQU[0]
DDR3_A[4]
DDR3_A[12]
DDR3_DQSUB
D1.5V_DDR3
FRC_A[12]
DDR3_DQU[0]
DDR3_DML
D1.5V_DDR3
DDR3_WEB
DDR3_DQU[1]
DDR3_A[3]
DDR3_DQL[4]
DDR3_A[1]
DDR3_A[0]
R8922
150
OPT
DDR3_A[2]
DDR3_CASB
DDR3_A[9]
DDR3_A[10]
DDR3_RASB
DDR3_A[4]
DDR3_DQU[6]
DDR3_DMU
DDR3_RESETB
FRC_A[0]
C8924
0.1uF
DDR3_ODT
DDR3_A[12]
MVREFCA
DDR3_DQU[5]
FRC_BA2
DDR3_DQL[3]
FRC_DQU[3]
DDR3_DQU[4]
DDR3_DQSL
C8913
0.1uF
C8929
0.1uF
DDR3_A[7]
FRC_DQSLB
D1.5V_DDR3
C8910
1000pF
OPT
FRC_DQU[1]
DDR3_MCLK
DDR3_A[11]
DDR3_DQU[3]
FRC_DQU[5]
DDR3_DMU
FRC_DQSL
MVREFDQ
FRC_RASB
C8922
0.1uF
MVREFCA
DDR3_DQL[6]
FRC_DQL[2]
DDR3_WEB
FRC_WEB
FRC_DQU[7]
R8904
1K
1%
R8920
1K
1%
FRC_A[6]
DDR3_DQL[7]
FRC_DQSU
FRC_DML
C8930
0.1uF
DDR3_DQSU
DDR3_BA1
DDR3_DML
C8902
10uF
10V
10uF
10V
FRC_DQL[7]
DDR3_BA0
DDR3_DQL[0]
DDR3_DQU[7]
DDR3_A[8]
C8915
0.1uF
DDR3_A[0-12]
DDR3_DQSLB
FRC_DQL[1]
FRC_DQL[3]
D1.5V_DDR3
DDR3_BA0
FRC_DQU[6]
C8928
0.1uF
FRC_ODT
DDR3_ODT
C8917
0.1uF
DDR3_DQU[0-7]
R8921
240
1%
DDR3_DQL[2]
DDR3_MCLKB
FRC_DQU[2]
FRC_CASB
FRC_CKE
FRC_MCLKB
FRC_DQU[4]
FRC_DQL[4]
C8909
0.1uF
MVREFDQ
FRC_DDR3_RESETB
FRC_DQSUB
C8921
0.1uF
DDR3_DQL[5]
FRC_A[4]
DDR3_MCLK
DDR3_DQL[1]
FRC_DQL[5]
FRC_DQL[6]
FRC_A[2]
FRC_BA1
C8919
0.1uF
FRC_BA0
C8927
0.1uF
DDR3_MCLKB
DDR3_BA2
C8925
0.1uF
R8919
1K
1%
C8918
0.1uF
DDR3_A[6]
L8900
C8908
10uF
DDR3_DQSL
DDR3_DQSU
FRC_A[11]
C8901
0.1uF
FRC_A[5]
FRC_A[10]
C8916
0.1uF
FRC_DQU[0]
D1.5V_DDR3
DDR3_DQL[0-7]
DDR3_DQU[2]
DDR3_A[5]
DDR3_DQSLB
FRC_A[8]
C8903
1000pF
OPT
FRC_MCLK
DDR3_CKE
DDR3_RESETB
FRC_A[9]
DDR3_CASB
R8900
1K
1%
C8914
0.1uF
D1.5V_DDR3
FRC_DMU
DDR3_BA2
FRC_A[3]
C8904
0.1uF
16V
0.1uF
16V
+1.5V_MEMC
R8923
10K
10K
FRC_A[1]
DDR3_DQSUB
FRC_A[7]
C8920
0.1uF
C8926
0.1uF
DDR3_CKE
DDR3_BA1
C8923
0.1uF
FRC_DQL[0]
DDR3_RASB
+1.5V_MEMC
+3.3V_MEMC
C8934
10uF
25V
10uF
25V
C8937
2200pF
+3.3V_MEMC
+12V
R8928
10K
C8944
0.1uF
16V
0.1uF
16V
R8935
10K
1%
C8942
22uF
10V
22uF
10V
C8940
100pF
50V
OPT
L8905
3.6uH
3.6uH
NR8040T3R6N
C8932
10uF
25V
10uF
25V
POWER_ON/OFF2_2
POWER_ON/OFF2_1
+1.26V_MEMC
AR8903
10
AR8900
10
AR8902
10
AR8901
10
AR8904
10
AR8905
10
AR8908
10
AR8907
10
AR8906
10
R8912
10
R8910
10
R8909
10
R8913
10
R8911
10
R8914
10
R8918
10
R8916
10
R8917
10
R8915
10
R8933
27K
1%
R8934
4.7K
1%
L8902
CIC21J501NE
R8925
9.1K
22uF
C8938
R8929
56
56
1%
L8903
CIC21J501NE
IC8901
AP1117EG-13
ADJ/GND
OUT
IN
R8926
10K
L8904
3.6uH
3.6uH
NR8040T3R6N
C8933
10uF
25V
10uF
25V
C8939
100pF
50V
OPT
C8943
0.1uF
16V
0.1uF
16V
C8931
10uF
25V
10uF
25V
C8941
22uF
10V
22uF
10V
+12V
R8932
12K
1%
L8901
R8931
3.9K
1%
R8924
6.2K
C8936
3300pF
H5TQ1G63BFR-12C
IC8900
A0
N3
A1
P7
A2
P3
A3
N2
A4
P8
A5
P2
A6
R8
A7
R2
A8
T8
A9
R3
A10/AP
L7
A11
R7
A12/BC
N7
A13
T3
A15
M7
BA0
M2
BA1
N8
BA2
M3
CK
J7
CK
K7
CKE
K9
CS
L2
ODT
K1
RAS
J3
CAS
K3
WE
L3
RESET
T2
DQSL
F3
DQSL
G3
DQSU
C7
DQSU
B7
DML
E7
DMU
D3
DQL0
E3
DQL1
F7
DQL2
F2
DQL3
F8
DQL4
H3
DQL5
H8
DQL6
G2
DQL7
H7
DQU0
D7
DQU1
C3
DQU2
C8
DQU3
C2
DQU4
A7
DQU5
A2
DQU6
B8
DQU7
A3
VREFCA
M8
VREFDQ
H1
ZQ
L8
VDD_1
B2
VDD_2
D9
VDD_3
G7
VDD_4
K2
VDD_5
K8
VDD_6
N1
VDD_7
N9
VDD_8
R1
VDD_9
R9
VDDQ_1
A1
VDDQ_2
A8
VDDQ_3
C1
VDDQ_4
C9
VDDQ_5
D2
VDDQ_6
E9
VDDQ_7
F1
VDDQ_8
H2
VDDQ_9
H9
NC_1
J1
NC_2
J9
NC_3
L1
NC_4
L9
NC_6
T7
VSS_1
A9
VSS_2
B3
VSS_3
E1
VSS_4
G8
VSS_5
J2
VSS_6
J8
VSS_7
M1
VSS_8
M9
VSS_9
P1
VSS_10
P9
VSS_11
T1
VSS_12
T9
VSSQ_1
B1
VSSQ_2
B9
VSSQ_3
D1
VSSQ_4
D8
VSSQ_5
E2
VSSQ_6
E8
VSSQ_7
F9
VSSQ_8
G1
VSSQ_9
G9
IC8903
AOZ1072AI
3
AGND
2
VIN
4
FB
1
PGND
5
COMP
6
EN
7
LX_1
8
LX_2
IC8902
AOZ1072AI
3
AGND
2
VIN
4
FB
1
PGND
5
COMP
6
EN
7
LX_1
8
LX_2
C8935
10uF
10uF
16V
R8927
270
1%
R8930
3.3K
1%
C8946
0.1uF
16V
0.1uF
16V
R8936
1
DDR3 1.5V By CAP - Place these Caps near Memory
Close to DDR Power Pin
2A
R1
R2
+3.3V_MEMC
Vout=0.8*(1+R1/R2)
URSA3 CORE 1.26V
1074 mA
URSA3 DDR3 1.5V
R2
R1
2A
Vout=0.8*(1+R1/R2)
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
2009.09.11
URSA3 (NO L.D.)
COMMON
90
FRC_DQL[3]
FRC_A[7]
FRC_DQU[1]
FRC_A[10]
FRC_A[8]
FRC_A[9]
FRC_A[11]
FRC_DQL[2]
FRC_DQL[0]
FRC_DQL[4]
FRC_DQL[6]
FRC_DQU[3]
FRC_DQL[1]
FRC_DQL[5]
FRC_DQU[0]
FRC_DQU[2]
FRC_DQU[5]
FRC_A[0]
FRC_DQU[4]
FRC_A[1]
FRC_A[2]
FRC_A[3]
FRC_A[12]
FRC_DQU[6]
FRC_A[6]
FRC_A[4]
FRC_DQL[7]
FRC_DQU[7]
FRC_A[5]
FRC_DQSL
+1.26V_MEMC
LVDS_TX_1_DATA1_N
RXD1-
C9033
0.1uF
0.1uF
LVDS_TX_0_CLK_P
FRC_WEB
FRC_CONF0
LVDS_TX_1_DATA2_N
RXD4-
AVDD_DDR
LVDS_TX_0_DATA2_P
R9044
1K
OPT
L9001
CIC21J501NE
AVDD_LVDS
RXA1+
LVDS_TX_0_DATA0_P
FRC_CONF0
FRC_SPI_DI
C9004
10uF
10uF
L9000
CIC21J501NE
FRC_BA2
C9018
0.1uF
0.1uF
RXB3-
L9006
CIC21J501NE
FRC_CASB
LVDS_TX_1_DATA4_N
FRC_MCLK
C9015
0.1uF
0.1uF
LVDS_TX_1_DATA0_N
RXB2+
LVDS_TX_0_DATA1_N
FRC_SPI_CZ
R9006
10
R9024
100
FRC_SPI_CK
RXCCK+
LVDS_TX_0_CLK_N
RXD2-
AVDD
C9011
0.1uF
0.1uF
R9045
1K
C9008
10uF
10uF
C9009
0.1uF
0.1uF
FRC_PWM1
FRC_DQSLB
RXA0+
C9013
0.1uF
0.1uF
FRC_A[0-12]
+3.3V_MEMC
RXB1-
LVDS_TX_1_DATA3_N
R9029
1M
R9011
100
RXA1-
GVDD_EVEN
C9029
0.1uF
0.1uF
RXA2+
RXB2-
AVDD_DDR
RXB3+
RXBCK+
R9021
100
FRC_BA1
RXA3-
R9025
100
R9032
100
GVDD_ODD
R9020
100
C9016
0.1uF
0.1uF
FRC_CONF0
FRC_RASB
C9025
10uF
10uF
RXD4+
RXB0-
R9019
100
RXA0-
AVDD_LVDS
LVDS_TX_1_DATA1_P
FRC_DQU[0-7]
R9037
0
MINI_LVDS
FRC_PWM0
RXC4+
FRC_CKE
FRC_DQSUB
AVDD
R9051
1K
OPT
C9027
0.1uF
0.1uF
FRC_SPI_DO
R9038
100
LD_SCAN
FRC_PWM0
RXA4-
R9014
100
RXA4+
RXBCK-
+3.3V_MEMC
FRC_SPI_CZ
+3.3V_MEMC
AVDD_PLL
LVDS_TX_1_CLK_N
FRC_MCLKB
C9024
10uF
10uF
LVDS_TX_1_CLK_P
RXDCK+
RXDCK-
C9010
0.1uF
0.1uF
C9035
0.1uF
0.1uF
LVDS_TX_0_DATA4_N
FRC_CONF1
C9017
0.1uF
0.1uF
C9030
0.1uF
0.1uF
R9027
100
RXA3+
R9039
100
LD_SCAN
LVDS_TX_1_DATA2_P
RXD3+
C9006
10uF
10uF
FRC_DQSU
FRC_BA0
R9049
1K
OPT
FRC_CONF1
RXC3-
C9014
0.1uF
0.1uF
RXCCK-
FRC_PWM0
R9016
100
FRC_DML
FRC_PWM1
R9030
0
URSA3
LVDS_TX_1_DATA0_P
RXB0+
RXD0-
RXC1-
LVDS_TX_0_DATA4_P
LVDS_TX_0_DATA2_N
C9021
0.1uF
0.1uF
+1.5V_MEMC
R9018
100
AVDD_PLL
R9015
100
GCLK4
C9034
0.1uF
0.1uF
R9047
1K
OPT
R9022
100
LVDS_TX_0_DATA3_P
FRC_SPI_DO
RXD3-
R9017
100
RXC2-
RXB1+
R9040
0
C9031
0.1uF
0.1uF
C9026
0.1uF
0.1uF
RXC0+
C9005
0.1uF
0.1uF
R9026
100
+3.3V_MEMC
FRC_DDR3_RESETB
GCLK2
VDDP
C9012
0.1uF
0.1uF
VDDC
LVDS_TX_0_DATA0_N
RXC1+
R9005
10
R9041
820
RXD1+
RXA2-
RXACK+
AVDD_MEMPLL
LVDS_TX_0_DATA1_P
LVDS_TX_1_DATA4_P
RXB4-
C9007
10uF
10uF
FRC_RESET
FRC_DMU
SCAN_BLK2
AVDD_MEMPLL
FRC_SPI_DI
R9048
1K
FRC_SPI_CK
R9028
100
RXD2+
L9002
CIC21J501NE
R9012
100
H_CONV
C
9
0
2
8
0
.
1
u
F
FRC_PWM1
RXC3+
+3.3V_MEMC
RXC2+
FRC_DQL[0-7]
R9000
10
C9032
0.1uF
0.1uF
VDDC
RXACK-
R9023
100
LVDS_TX_1_DATA3_P
RXC4-
C9000
10uF
10uF
VDDP
L9005
CIC21J501NE
R9013
100
R9002
10K
DPM_A
L9003
CIC21J501NE
R9001
10
C9023
0.1uF
0.1uF
RXB4+
C9022
0.1uF
0.1uF
LVDS_TX_0_DATA3_N
R9050
1K
+3.3V_MEMC
FRC_ODT
SCAN_BLK1/OPC_OUT
L9004
CIC21J501NE
RXD0+
RXC0-
R9031
100
+3.3V_MEMC
R9046
1K
V_SYNC
R9043
0
OPT
SDA1_3.3V
SCL1_3.3V
URSA3_SDA
URSA3_SCL
URSA3_SCL
URSA3_SDA
URSA3_SDA
URSA3_SCL
X9000
12MHz
P9000
12505WS-04A00
1
2
3
4
5
L9007
CIC21J501NE
C9036
10uF
10uF
C9037
0.1uF
0.1uF
VDDC
+3.3V_MEMC
SW9000
JTP-1127WEM
1
2
4
3
R9003
22
R9004
22
+3.3V_MEMC
R9007
22
R9008
22
SDA3_3.3V
SCL3_3.3V
C9020
10uF
10uF
C9003
10uF
10uF
C9019
10uF
10uF
C9001
10uF
10uF
C9002
10uF
10uF
R9034
4.7K
URSA3_NON_MIRROR
R9033
4.7K
URSA3_MIRROR
R9035
4.7K
URSA3_MINI_LVDS
R9036
4.7K
URSA3_LVDS
R9010
22
OPT
R9009
22
OPT
IC9000
MX25L4005CM2I-12G
URSA3_FLASH_MACRONIX
EAN61009401
3
WP#
2
SO
4
GND
1
CS#
5
SI
6
SCLK
7
HOLD#
8
VCC
IC9000-*2
W25X40VSSIG
URSA3_FLASH_WINBOND_OLD
EAN35097301
3
WP
2
DO
4
GND
1
CS
5
DIO
6
CLK
7
HOLD
8
VCC
LGE7378A[FRC_TCON_URSA3]
IC9001
URSA3
DDR3_A0/DDR2_NC
E2
DDR3_A1/DDR2_A6
U6
DDR3_A2/DDR2_A7
E3
DDR3_A3/DDR2_A1
G2
DDR3_A4/DDR2_CASZ
R4
DDR3_A5/DDR2_A10
G1
DDR3_A6/DDR2_A0
U5
DDR3_A7/DDR2_A5
F3
DDR3_A8/DDR2_A2
T5
DDR3_A9/DDR2_A9
F1
DDR3_A10/DDR2_A11
R6
DDR3_A11/DDR2_A4
R5
DDR3_A12/DDR2_A8
T6
DDR3_BA0/DDR2_BA2
G3
DDR3_BA1/DDR2_ODT
U4
DDR3_BA2/DDR2_A12
E1
DDR3_MCLK/DDR2_MCLK
U1
DDR3_MCLKZ/DDR2_MCLKZ
U2
DDR3_CKE/DDR2_RASZ
T4
DDR3_ODT/DDR2_BA1
H2
DDR3_RASZ/DDR2_WEZ
J1
DDR3_CASZ/DDR2_CKE
H3
DDR3_WEZ/DDR2_BA0
H1
DDR3_RESET/DDR2_A3
F2
DDR2_DQS0/DDR3_DQS0
M3
DDR2_DQS1/DDR3_DQS1
N2
DDR2_DQSB0/DDR3_DQSB0
N1
DDR2_DQSB1/DDR3_DQSB1
N3
DDR2_DQ7/DDR3_DQM0
R2
DDR2_DQ11/DDR3_DQM1
K3
DDR2_DQ6/DDR3_DQ0
K2
DDR2_DQ0/DDR3_DQ1
R3
DDR2_DQ1/DDR3_DQ2
K1
DDR2_DQ2/DDR3_DQ3
T1
DDR2_DQ4/DDR3_DQ4
J2
DDR2_NC/DDR3_DQ5
T3
DDR2_DQ3/DDR3_DQ6
J3
DDR2_DQ5/DDR3_DQ7
T2
DDR2_DQ8/DDR3_DQ8
P2
DDR2_DQ14/DDR3_DQ9
L3
DDR2_DQ13/DDR3_DQ10
R1
DDR2_DQ12/DDR3_DQ11
L1
DDR2_DQ15/DDR3_DQ12
P1
DDR2_DQ9/DDR3_DQ13
L2
DDR2_DQ10/DDR3_DQ14
P3
DDR2_DQM1/DDR3_DQ15
M1
DDR2_DQM0/DDR3_NC
M2
I2CM_SDA
C9
I2CM_SCL
D9
I2CM_SDA2_L
P7
I2CM_SCL2_L
N8
I2CM_SDA2_R
P9
I2CM_SCL2_R
N10
AVDD_1
F8
AVDD_2
F9
AVDD_DDR_1
L5
AVDD_DDR_2
L6
AVDD_DDR_3
L7
AVDD_DDR_4
L8
AVDD_DDR_5
M7
AVDD_DDR_6
M8
AVDD_LVDS_1
G12
AVDD_LVDS_2
H12
AVDD_LVDS_3
J12
AVDD_LVDS_4
K12
AVDD_MEMPLL
M6
AVDD_PLL_1
F11
AVDD_PLL_2
F12
DVDD_DDR[1.26V]
J5
VDD_EVEN
E16
VDD_ODD
E17
VDDC_1
F6
VDDC_2
F7
VDDC_3
G5
VDDC_4
G6
VDDC_5
G7
VDDC_6
H5
VDDC_7
H6
VDDC_8
J6
VDDP_1
G11
VDDP_2
K5
VDDP_3
K6
VDDP_4
M10
VDDP_5
M11
VSS_1
C10
VSS_2
C12
VSS_3
G8
VSS_4
G9
VSS_5
G10
VSS_6
H7
VSS_7
H8
VSS_8
H9
VSS_9
H10
VSS_10
H11
VSS_11
J4
VSS_12
J7
VSS_13
J8
VSS_14
J9
VSS_15
J10
VSS_16
J11
VSS_17
K7
VSS_18
K8
VSS_19
K9
VSS_20
K10
VSS_21
K11
VSS_22
L9
VSS_23
L10
VSS_24
L11
VSS_25
M9
VSS_26
N4
VSS_27
P6
A10
A10
A11
A11
A12
A12
B10
B10
B11
B11
B12
B12
C11
C11
D11
D11
TESTPIN
L13
VB1_TEST
F10
A0P/RV0+
B14
A0M/RV0-
A14
A1P/RV1+
C14
A1M/RLV1-
C15
A2P/RV2+
A15
A2M/RV2-
B15
ACKP/R3+
B16
ACKM/RV3-
A16
A3P/RV4+
A17
A3M/RV4-
B17
A4P/RV5+
C16
A4M/RV5-
C17
B0P/RV6+
D16
B0M/RV6-
D17
B1P/RV7+
D15
B1M/RV7-
E15
B2P/RV8+
F16
B2M/RV8-
F17
BCKP/WPWM
F15
BCKM/OPT_P
G15
B3P/OPT_N
G17
B3M/FLK
G16
B4P/GCLK6
H16
B4M/GLCK5
H17
C0P/LV0+
H15
C0M/LV0-
J15
C1P/LV1+
J17
C1M/LV1-
J16
C2P/LV2+
K16
C2M/LV2-
K17
CCKP/LV3+
K15
CCKM/LV3-
L15
C3P/LV4+
L17
C3M/LV4-
L16
C4P/LV5+
M16
C4M/LV5-
M17
D0P/LV6+
M15
D0M/LV6-
N15
D1P/LV7+
N17
D1M/LV7-
N16
D2P/LV8+
P15
D2M/LV8-
R15
DCKP/GOE
R17
DCKM/GSC/GCLK3
R16
D3P/GSP_R
T16
D3M/GSP
T17
D4P/SOE
T15
D4M/POL
U17
GCLK4
P16
GCLK2
P17
I2CS_SDA
D1
I2CS_SCL
D2
PWM0
P14
PWM1
R14
LPLL_FBCLK
B13
LPLL_OUTCLK
U16
LPLL_REFIN
A13
RECKP
A2
RECKN
B2
RE0P
A4
RE0N
B4
RE1P
C3
RE1N
C4
RE2P
B3
RE2N
A3
RE3P
C1
RE3N
C2
RE4P
B1
RE4N
A1
ROCKP
A6
ROCKN
B6
RO0P
A8
RO0N
B8
RO1P
C7
RO1N
C8
RO2P
B7
RO2N
A7
RO3P
C5
RO3N
C6
RO4P
B5
RO4N
A5
XTALO
A9
XTALI
B9
GPIO[0]
K14
GPIO[1]
J13
GPIO[2]
H14
GPIO[3]
G13
GPIO[4]
F14
GPIO[5]
E13
GPIO[8]
D3
GPIO[9]
D4
GPIO[10]
E4
GPIO[12]
D5
GPIO[13]
D7
GPIO[14]
F4
M_S_PIF_CLK_1
R7
M_S_PIF_CLK_2
U8
M_S_PIF_CS
U7
M_S_PIF_DA1
T8
M_S_PIF_FC
T7
S_M_PIF_CLK
U14
S_M_PIF_CS
U15
S_M_PIF_DA0
R13
S_M_PIF_DA1
T13
S_M_PIF_FC
T14
LTD_CLK_L
T10
LTD_CLK_R
T11
LTD_DA0_L
R10
LTD_DA0_R
U11
LTD_DA1_L
R9
LTD_DA1_R
U12
LTD_DE_L
U10
LTD_DE_R
R11
OP_SYNC_L
U9
OP_SYNC_R
R12
PLL_LOCK_L
T9
PLL_LOCK_R
T12
SOFT_RST_L
R8
SOFT_RST_R
U13
SPI_CK
P13
SPI_CZ
N14
SPI_DI
N12
SPI_DO
N13
RESET
M14
REXT
C13
C9038
22pF
C9039
22pF
IC9000-*1
W25X40BVSSIG
URSA3_FLASH_WINBOND_NEW
3
WP
2
DO[IO1]
4
GND
1
CS
5
DI[IO0]
6
CLK
7
HOLD
8
VCC
R9052
4.7K
URSA3_NON_GIP
R9053
4.7K
URSA3_GIP
R9055
4.7K
URSA3_SCANNING_OFF
R9057
4.7K
URSA3_LOCAL_DIMMING
R9054
4.7K
URSA3_SCANNING_ON
R9056
4.7K
URSA3_NON_LOCAL_DIMMING
R9042
100
Serial Flash
I2C ADR: GPIO1: HI:B8 LOW:B4
CHIP_CONF: {GPIO8, PWM1, PWM0}
CHIP_CONF= 3
CHIP_CONF: {GPIO8, PWM1, PWM0}
CHIP_CONF= 3
d5: boot from internal SRAM
CHIP_CONF= 3
d6: boot from EEPROM
CHIP_CONF= 3
d7: boot from SPI Flash
Separate DVDD_DDR Power
SCAN_OFF
HIGH
K14
NON_MIRROR
NON_GIP
LD
LVDS
SCAN_ON
R9
LOW
U10
GIP
MINI_LVDS
R10
NON_LD
MIRROR
T10
FRC OPTION
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