LG 37LH40 / 37LH41 (CHASSIS:LA92G) Service Manual ▷ View online
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
+1.8V_AMP
+3.3V_ST
120-ohm
L608
AMP_RST
001:AB21
120-ohm
L609
5.6
R615
3.3
R622
0
R610
3.3
R625
1000pF 50V
C631
MLB-201209-0120P-N2
L603
100
R604
33K
OPT
R609
0.1uF 16V
C613
5.6
R613
+1.8V_AMP
4.7K
R620
0.1uF
16V
C647
0.1uF
16V
C648
WAFER-ANGLE
P600
1
SPK_R-
2
SPK_R+
3
SPK_L-
4
SPK_L+
33pF
50V
C609
0.01uF 50V
C615
+3.3V
22000pF 50V
C623
22000pF
50V
C614
1000pF 50V
C630
0.1uF 50V
C636
0.1uF
16V
C605
10uF 16V
C600
3.3
R624
0.1uF 50V
C635
68uF
35V
C602
4.7K
R618
SDA_SUB/AMP
001:AI5;004:K27
POWER_DET
AMP_MUTE
001:D16
SPK_L-
006:AH10
DA-8580
EAP38319001
L607
2S
1S
1F
2F
120-ohm
L610
+3.3V
0.01uF
50V
C641
100
R605
+24V_AMP
AZ1117H-1.8TRE1(EH13A)
IC601
2
OUTPUT
3
INPUT
1
ADJ/GND
SPK_L+
006:AH11
1uF 10V
C617
NTP-3100L
EAN60664001
IC600
1
BST1A
2
VDR1A
3
RESET
4
AD
5
DVSS_1
6
VSS_IO
7
CLK_I
8
VDD_IO
9
DGND_PLL
10
AGND_PLL
11
LFM
12
AVDD_PLL
13
DVDD_PLL
14
TEST0
15
DVSS_2
16
D V
D D
17
S D
A T
A
18
W C
K
19
B C
K
20
S D
A
21
SCL
22
MONITOR_0
23
MONITOR_1
24
MONITOR_2
25
F A
U L
T
26
V D
R 2B
27
BST2B
28
PGND2B_1
29
PGND2B_2
30
OUT2B_1
31
OUT2B_2
32
PVDD2B_1
33
PVDD2B_2
34
PVDD2A_1
35
PVDD2A_2
36
OUT2A_1
37
OUT2A_2
38
PGND2A_1
39
PGND2A_2
40
BST2A
41
VDR2A
42
NC
43
V D
R 1B
44
BST1B
45
PGND1B_1
46
PGND1B_2
47
OUT1B_1
48
OUT1B_2
49
PVDD1B_1
50
PVDD1B_2
51
PVDD1A_1
52
PVDD1A_2
53
OUT1A_1
54
OUT1A_2
55
PGND1A_1
56
PGND1A_2
1000pF 50V
C629
MLB-201209-0120P-N2
L604
1N4148W
100V
OPT
D601
MS_SCK
001:W26
3.3K
R602
100
R606
SPK_R+
006:AH10
22uF
16V
C649
1000pF
50V
C606
0.01uF 50V
C639
10uF
10V
C610
0.1uF
50V
C620
1uF
16V
C622
1N4148W
100V OPT
D604
0.1uF
50V
C637
68uF
35V
C628
0.47uF 50V
C634
100pF
50V
C604
0.1uF
C608
10K
R612
5.6
R616
0.01uF
50V
C642
0.01uF 50V
C640
3.3
R621
0.01uF
50V
C626
100
R608
10uF 16V
C603
+1.8V_AMP
AUDIO_MASTER_CLK
001:W26
120-ohm
L611
100
R607
22000pF
50V
C624
+1.8V_AMP
+24V_AMP
1uF
10V
C611
10K
R611
GND
33pF
50V
OPT
C616
4.7K
R617
SPK_L-
006:AJ20
0
R600
1N4148W
100V OPT
D602
+24V_AMP
0.1uF
50V
C625
1N4148W
100V
OPT
D603
33pF
50V
C612
MLB-201209-0120P-N2
L602
22000pF 50V
C618
0.47uF 50V
C633
MS_LRCH
001:W26
+24V
5.6
R614
0.1uF
50V
C638
0.1uF
16V
C601
3.3
R623
1000pF 50V
C632
22uF
16V
C646
3.3
R626
SCL_SUB/AMP
001:AI5;004:K27
0.1uF
50V
C645
SPK_R-
006:AJ16
0.01uF
50V
C643
4.7K
R619
100
R601
0.1uF
50V
C627
0.01uF
50V
C644
1000pF 50V
C607
DA-8580
EAP38319001
L606
2S
1S
1F
2F
SPK_L+
006:AJ22
MLB-201209-0120P-N2
L605
0
R603
SPK_R-
006:AH9
SPK_R+
006:AJ18
2SC3052
Q600
E
B
C
MS_LRCK
001:W26
1uF 16V
C619
47K
AC_OFF_POP
R627
MCLK SDATA WCK BCK TP is necessory
Mstar Application
SPEAKER_R
2A => 5A
SPEAKER_L
Monitor0_1_2 TP is necessory
AMP
C
2009
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
68uF
35V
C721
10uF
6.3V
C751
10uF
6.3V
C754
82K
R741
1/10W
2K
5%
R1508
0.01uF
25V
C779
10K
R702
OPT
22uF
16V
OPT
C731
1/10W
10
1%
R724
10uF
6.3V
C708
47K
R739
+24V
CB3216PA501E
L724
560
R730
0.1uF
16V
C758
APE8953MP
IC708
3
VOUT_1
2
FB
4
VOUT_2
1
GND
5
VIN
6
VCNTL
7
POK
8
EN
22uF
C763
1/10W
10
1%
R734
0.1uF
50V
OPT
C720
10K
R720
+12V
1N4148W_DIODES
100V
D700
OPT
10K
R726
68K
R746
4.7uF
6.3V
OPT
C762
+1.26V_VDDC
+5V
10uF
C742
OPT
3.3K
R710
0.1uF
16V
C713
0.1uF
16V
C715
+3.3V
0.1uF
16V
C705
10K
R733
OPT
BLM18PG121SN1D
L714
0.1uF
16V
C717
CB3216PA501E
L716
10K
OPT
R721
+5V_ST
1/10W
10K
R748
OPT
POWER_EN
1/8W
75K
1%
R722
1/10W
10
1%
R768
33K
R708
OPT
0.1uF
16V
OPT
C709
1/10W
10K
OPT
R731
0.1uF
C749
22uF
C786
0
R743
1/10W
10K
R738
CB3216PA501E
L715
CB3216PA501E
L708
22K
R732
0.1uF
16V
C780
1/10W
10K
R763
+5V_GENERAL
BLM15BD121SN1
L701
RL_ON_BEAD
+3.3V
4.7K
R707
1uF
25V OPT
C725
NR8040T3R6N
3.6uH
L712
0.1uF
16V
C710
22uF
C787
OPT
22uF
25V
C748
6.8K
OPT
R715
FW20020-24S
P700
19
NC
14
12V
9
5.2V
4
GND
18
24V
13
12V
8
5.2V
3
GND
17
12
GND
7
5.2V
2
PWR ON
16
GND
11
GND
6
GND
1
NC
20
15
GND
10
5.2V
5
GND
21
22
23
NC
24
PWM_DIM
+5V_EXT
NR8040T3R6N
3.6uH
L710
AP1117E33G-13
IC702
2
OUT
3
IN
1
ADJ/GND
0
R775
OPT
10K
OPT
R753
0.1uF
16V
C747
+3.3V_ST
22uF
16V
C714
0.1uF
50V
C735
OPT
+3.3V_ST
POWER_ON_DELAY
1N4148W_DIODES
100V
D701
OPT
MP2212DN
IC707
3
IN
2
GND
4
BS
1
FB
5
VCC
6
SW_1
7
SW_2
8
EN/SYNC
1/10W
33K
1%
R752
BLM18PG121SN1D
L719
NR8040T3R6N
3.6uH
L718
120K
OPT
R701
GND
+3.3V_MEMC
1/10W
30K
1%
R750
+1.8V_DDR
0
OPT
R772
2SC3875S(ALY)
OPT
Q708
E
B
C
POWER_EN
1/8W
390K
1%
R766
POWER_ON/OFF 001:AR31;010:AG9
1/10W
56K
1%
R770
1/8W
24K
1
%
R736
10K
R705
OPT
POWER_ON_DELAY
10uF
6.3V
C778
0.1uF
16V
C774
2SC3052
Q703
E
B
C
22uF
16V
C791
10K
OPT
R747
100K
5%
R774
0.1uF
C793
0.1uF
16V
OPT
C790
22uF
16V
C777
PWM_DIM
001:AF12
0
R713
560pF
50V
C724
OPT
1uF
16V
C770
22uF
16V
C776
100
R714
22uF 16V
C750
0
OPT
R773
10K
R727
2SC3052
Q702
E
B
C
0
R758
RT1P141C-T112
Q701
1
2
3
CB3216PA501E
L725
GND
+3.3V_ST
2SC3052
Q705
E
B
C
+5V_ST
0.1uF
16V
OPT
C707
L728
1/10W
10
1%
R745
2SC3052
OPT
Q707
E
B
C
+5V_GENERAL
CB3216PA501E
L711
+5V_GENERAL
1uF
10V
C734
GND
47uF
25V
C722
1/8W
300K
1%
R767
0
R771
+3.3V_ST
CB4532UK121E
L704
100
R754
OPT
POWER_EN
001:AR30;007:B6;007:T3;007:AG9;007:AM26;007:AO16
100
OPT
R756
1uF
10V
C737
22uF
16V
C792
CB4532UK121E
L706
0.1uF
16V
C753
0
R709
OPT
+5V_ST
3.3K
R717
100
OPT
R716
GND
+5V_ST
SC4215ISTRT
IC701
3
VIN
2
EN
4
NC_2
1
NC_1
5
NC_3
6
VO
7
ADJ
8
GND
+5V_ST
BLM18PG121SN1D
L717
1uF
16V
C767
CB3216PA501E
L722
10uF
10V
C712
+5V_GENERAL
4.7uF
6.3V
OPT
C761
68uF
35V
C727
0.47uF
16V
OPT
C716
10uF
10V
C757
22uF
C764
OPT
1N4148W_DIODES
100V
OPT
D702
22K
R735
1/10W
10K
R755
12K
1%
R711
OPT
C766
BLM18PG121SN1D
L720
A_DIM 001:AF12
1uF
25V
C755
+1.26V_MEMC
560pF
50V
C781
OPT
+5V_ST
560pF
50V
C785
OPT
POWER_EN
001:AR30;007:B6;007:T18;007:T3;007:AG9;007:AO16
10uF
6.3V
C771
INV_CTL
001:AR31
BLM18PG121SN1D
L727
OPT
1uF
10V
C782
+3.3V_FE
100
OPT
R765
120K
R725
OPT
MP2212DN
IC704
3
IN
2
GND
4
BS
1
FB
5
VCC
6
SW_1
7
SW_2
8
EN/SYNC
+3.3V_ST
22uF 16V
C752
PANEL_CTL
001:AR32
9.1K
1%
R712
10K
R729
+5V
GND
POWER_ON/OFF
001:AR32
10K
R718
BLM18PG121SN1D
L702
BG2012B080TF
L705
GND
+3.3V_AVDD_MPLL
2SC3052
Q700
OPT
E
B
C
1/10W
22K
1%
R723
NR8040T3R6N
3.6uH
L726
22uF
16V
C765
10uF
C756
22uF
16V
C732
+3.3V_ST
560pF
C772
OPT
1uF
16V
C788
GND
1/10W
18K
1%
R769
22uF
16V
OPT
C730
0.1uF
50V
C728
BG2012B080TF
L700
MP2212DN
IC705
3
IN
2
GND
4
BS
1
FB
5
VCC
6
SW_1
7
SW_2
8
EN/SYNC
0
R703
10uF
10V
C704
0.1uF
16V
C760
CB3216PA501E
L709
1uF
25V
C706
MLB-201209-0120P-N2
L707
RL_ON
001:AR32
0.1uF
C746
10K
R719
+1.8V_MEMC
15pF
50V
C711
MP2212DN
IC706
3
IN
2
GND
4
BS
1
FB
5
VCC
6
SW_1
7
SW_2
8
EN/SYNC
4.7K
R704
+5V_GENERAL
1/8W
13K
1%
R762
0.1uF
50V
C719
1N4148W_DIODES
100V
D703
OPT
1K
R744
0
R757
+5V_EXT
+12V
+1.8V_MEMC
2SC3052
Q704
E
B
C
+12V
1uF
35V
C723
0
R764
22uF
16V
C768
OPT
SI4925BDY
Q706
3
S2
2
G1
4
G2
1
S1
5
D2_1
6
D2_2
7
D1_1
8
D1_2
10K
R728
OPT
BLM18PG121SN1D
L703
ERROR_OUT
001:AB20
220uF
16V
C726
VLCD_LCM
10uF
6.3V
C759
1/10W
27K
1%
R751
+3.3V
22uF
C733
OPT
+5V_GENERAL
2.7K
R740
10uF
35V
C740
0
R776
20K
R706
0
L701-*1
RL_ON_0OHM
10
R737
10
R749
10
R759
10
R742
0.1uF
50V
C789
0.1uF
50V
C741
0.1uF
50V
C718
0.1uF
50V
R781
3225
22uF
16V
C773
1.5mA
Vout=0.8*(1+R1/R2)
R1/R2 : 12K / 9.1K => Vout=1.85
465 mA @85% efficiency
Placed on SMD-TOP
+5V_+12V
Err OUT
About 1.84V
Close to IC
R1/R2 : 27K / 20K => Vout=1.88
415 mA @85% efficiency
+1.8V_MEMC for URSA DDR
24V
$0.07
$0.24
C OUT
Close to IC
R1
+5V_EXT
Vout=0.8*(1+R1/R2)
+1.26 Core for URSA
Placed on SMD-TOP
C IN
35V/8.0PI
Placed on SMD-TOP
R1
R2
R2
MAX 3A
C OUT
Vout=0.8*(1+R1/R2)
R1
4.9A 0.0150OHM 34MHZ
Placed on SMD-TOP
Close to IC
C IN
R2
Close to IC
R1
$0.07
Stand-by +3.3V
Close to IC
4.9A 0.0150OHM 34MHZ
+3.3V
Vout=0.8*(1+R1/R2)
+1.8V for Saturn5 DDR
Placed on SMD-TOP
3A, DCR=0.025 ohm
Close to IC
R1/R2 = 12K/20K => Vout=1.28
Placed on SMD-TOP
R2
PI Result
A.DIM
R1/R2 : 15K / 12K => Vout=1.80
Placed on SMD-TOP
INV ON
Close to IC
+1.26 Core for Saturn5
R2
R1
FROM LIPS & POWER B/D
Placed on SMD-TOP
1600 mA
Placed on SMD-TOP
450 mA
400 mA + 600 mA
Close to IC
C
2009
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
5.1K
R1068
OPT
100uF
16V
C1077
VCOMO
001:D24
500
L1005
OPT
0.1uF
16V
C1037
OPT
FE_DEMOD_SDA
100uF
16V
C1035
22
R1078
100uF
16V
C1019
0
5%
1/4W
R1034
VSB_CTRL
FE_TUNER_SCL
10uF
10V
C1051
OPT
TS_VALID
22
R1077
+3.3V_PVSB
100
R1064
10uF
10V
C1011
20K
R1011
R1011
+3.3V_AVDD_PVSB
25MHz
X1005
+12V
3216
10uF
16V
C1038
1uF
10V
C1073
+3.3V_DVDD_PVSB
LGDT3305
IC1004
1
NC_1
2
VINA2
3
VINA1
4
INCAP
5
VSSAAD10A
6
I2CSEL
7
ANTCON
8
VDD_1
9
I2CRPT_SCL
10
I2CRPT_SDA
11
IFOUT
12
RFOUT
13
TPERR
14
VDD33_1
15
TPVALID
16
TPDATA[0]
17
VSS33_1
18
TPDATA[1]
19
TPDATA[2]
20
TPDATA[3]
21
TPDATA[4]
22
TPDATA[5]
23
TPDATA[6]
24
TPDATA[7]
25TPCLK
26TPSOP
27NIRQ
28SDA
29VDD33_2
30SCL
31VSS_1
32VDD_2
33VSS_2
34VSS33_2
35PLLAVDD
36PLLAVSS
37
N R
S T
38
O PM
39
VDD33_3
40
NC_2
41
VSS33_3
42
XTALI
43
X T
A L
O
44
VSS_3
45
X M
46
VDD_3
47
VSSDAD10
48
V C
C A
A D
1 0A
KIA78R05F
IC1002
1
VIN
2
V C
3
V O
U T
4
N C
5
G N
D 1
6
G N
D 2
0.1uF
50V
C1020
0.01uF
25V
C1008
10K
R1008
+3.3V_AVDD_PVSB
1/16W
100
AR1072
500
L1006
OPT
TS_CLK
22
R1023
220nH
L1011
IF BEAD
ISA1530AC1
Q1001
E
B
C
OPT
R1066
TS_VALID
SC156515M-1.8TR
IC1001
2
VIN
1
EN
3
GND
5
ADJ
4
VO
TDVW-H103F
TU1001
14
IF_AGC
13
DIF[-]
5
RF_AGC
12
DIF[+]
11
NC_3
2
NC_2
19
VIDEO
18
AUDIO
10
AS
4
+B1
1
NC_1
17
NC_4
9
CLOCK
8
DATA
3
GND_1
16
SIF
7
GND_2
6
NC[VT]
15
+B2
20
SHIELD
0.1uF
C1067
100
R1028
OPT
TS_DATA[0-7]
OPT
R1067
+5V_TU
1uF
16V
C1010
36pF
50V
C1046
OPT
8.2K
R1015
+3.3V_AVDD_PVSB
+1.2V_PVSB
0.1uF
50V
C1021
OPT
220nH
L1012
IF BEAD
BG2012B800
L1010
+3.3V_PVSB
0.01uF
50V
C1009
+1.2V_DVDD_PVSB
MLB-201209-0120P-N2
L1013
TS_SYNC
GND
0
R1027
0.1uF
50V
C1026
CM2012F6R8KT
6.8uH
L1004
0.01uF
C1069
0.01uF
C1070
FE_TUNER_SDA
15K
R1014
0.01uF
25V
C1041
FE_SIF
001:W30
27pF
50V
C1072
10K
R1000
36pF
50V
C1045
OPT
0
OPT
R1018
0.1uF
50V
C1032
CB3216PA501E
L1009
47K
R1074
47
R1016
OPT
OPT
R1009
+5V_TU
470
R1010
ISA1530AC1
Q1000
E
B
C
IF_AGC
0
R1021
TS_CLK
FE_TUNER_SCL
220uF
16V
C1013
+3.3V_DVDD_PVSB
22
R1022
0.047uF 50V
C1012
12K
R1007
0.1uF
50V
C1016
220uF
16V
C1054
100
OPT
R1075
0.1uF
50V
C1007
0.1uF
50V
C1003
0
R2232
500
L1008
0.1uF
50V
C1022
+5V_TU
0.1uF
C1066
AS7809DTRE1
IC1003
2
GND
3
OUTPUT
1
INPUT
4.7K
R1017
JP1005
IF_AGC
0
R1073
OPT
0.1uF
50V
C1044
27pF
50V
OPT C1025
OPT
R1076
CM3216F100KE
10uH
L1001
+5V_TU
SIFMO
001:W30
470
PV
R1069
100pF 50V
C1015
VSB_RESET
IF_N
+3.3V_FE
+5V_TU
0
R1026
0.1uF
16V
C1034
OPT
C1075
JP1006
SC4215ISTRT
IC1000
3
VIN
2
EN
4
NC_2
1
NC_1
5
NC_3
6
VO
7
ADJ
8
GND
100
AR1070
500
L1003
OPT
2.2uF
16V
C1000
270
R1019
3216
10uF
16V
C1028
+5V_TU
2.2K
R1004
OPT
0
R1005
0.01uF
25V
C1053
OPT
0.1uF
C1068
0.1uF
C1040
CB3216PA501E
L1007
270
R1020
0.
1u
F
50V
C1014
IF_P
0.1uF
50V
C1033
82pF
50V
C1004
47uF
16V
C1039
FE_DEMOD_SCL
0.1uF
16V
C1076
10K
R1012
R1012
FE_TUNER_SDA
TS_SYNC
1M
R1072
1N4148W D1000
100
R1030
OPT
0.1uF
50V
C1052
OPT
0
R1065
+3.3V_PVSB
+3.3V_DVDD_PVSB
100
AR1071
100pF
50V
C1017
OPT
C1074
0.1uF
50V
C1043
JP1007
4.7K
R1013
+1.2V_DVDD_PVSB
1K
R1002
POWER_EN
001:AR30;007:AH18
IF_P
PV
LD1000
JP1004
4.7K
R1001
100uF
16V
C1018
0.33uF
16V
C1036
1K
R1060
IF_N
2.2uF
16V
C1001
100uF
16V
C1002
10K
R1006
OPT
0
R1003
+5V_EXT
3216
10uF
16V
C1023
FE_VMAIN
001:D24
0
R1031
OPT
1K
R1063
0.1uF
50V
C1005
0.1uF
50V
C1030
27pF
50V
C1071
+1.2V_PVSB
27pF 50V
OPT C1024
0
L1011-*1
IF 0OHM
0
L1012-*1
IF 0OHM
0
R1061
0
R1062
100
R1032
100
R1033
47pF
C1006
270nH
L1002
TS_DATA[0]
TS_DATA[7]
TS_DATA[2]
TS_DATA[3]
TS_DATA[1]
TS_DATA[6]
TS_DATA[4]
TS_DATA[5]
TS_DATA[0-7]
TS_DATA[0-7]
VDD33
I2CRPT_SDA
NIRQ
JTAG
TPDATA[1]
VDD33
PLLAVSS
V DD
VSS33
VCCAAD10A
VSS
VDD
VDD33
RF OUT
VSB +3.3V B+ BLOCK
TPSOP
Close to tuner
SCL
TPDATA[0]
The value of coil & cap
could be changed to optimized each
VSS33
MStar Application
TPDATA[3]
VSS33
VSSAD10
TPERR
(I2C Channel 6)
X TA
L O
SDA
VDD
INCAP
TPVALID
MStar Application
TPDATA[7]
TPDATA[4]
PLLAVDD
TPCLK
NRST
I2CRPT_SCL
SLIM_SCAN
TPDATA[5]
VSS
TPDATA[6]
X M
Option for FM Rejection
VINA1
VSS
I2CSEL
IF OUT
R1
VSB +1.0V B+ BLOCK
R2
O PM
VINA2
VSSAAD10A
VROA
XTALI
ANTCON
MStar Application
V0 = 0.8(R1+R2) / R2
TPDATA[2]
UNER
C
2009
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
0.
1u
F
C6
56
AR4
56
R18
0.
1u
F
C8
0
OPT
R50
56
R16
+1.8V_S_DDR
+1.8V_S_DDR
56
R29
56
AR10
56
R41
56
AR6
+1.8V_S_DDR
+1.8V_S_DDR
33
R8
56
R6
56
AR5
56
R13
0.
1u
F
C11
56
R19
0.1uF
C22
0.
1u
F
C33
56
AR3
56
R15
0.
1u
F
C43
0.
1u
F
C32
56
R12
56
R33
56
R38
56
R28
56
R10
0.
1u
F
C21
0.
1u
F
C12
56
R37
0.
1u
F
C39
0.
1u
F
C34
0.
1u
F
C25
56
R22
0.
1u
F
C14
0.
1u
F
C38
1K
1 %
R23
56
R43
56
R40
0.
1u
F
C31
56
AR9
56
AR13
1K1
%
R5
0.
1u
F
C9
0.
1u
F
C4
1K
1 %
R47
0.
1u
F
C5
10uF
C3
0.
1u
F
C10
1000pF
C18
56
R39
0.
1u
F
C36
0.
1u
F
C29
0.
1u
F
C20
56
R34
10uF
C23
1K
1 %
R24
MSD3159GV
IC100
B_DDR2_A0
T26
B_DDR2_A1
AF26
B_DDR2_A2
T25
B_DDR2_A3
AF23
B_DDR2_A4
T24
B_DDR2_A5
AE23
B_DDR2_A6
R26
B_DDR2_A7
AD22
B_DDR2_A8
R25
B_DDR2_A9
AC22
B_DDR2_A10
AD23
B_DDR2_A11
R24
B_DDR2_A12
AE22
B_DDR2_BA0
AC23
B_DDR2_BA1
AC24
B_DDR2_BA2
AB22
B_DDR2_MCLK
V25
/B_DDR2_MCLK
V24
B_DDR2_CKE
AB23
B_DDR2_ODT
U26
/B_DDR2_RAS
U25
/B_DDR2_CAS
U24
/B_DDR2_WE
AB24
B_DDR2_DQS0
AB26
B_DDR2_DQS1
AA26
B_DDR2_DQM0
AC25
B_DDR2_DQM1
AC26
B_DDR2_DQSB0
AB25
B_DDR2_DQSB1
AA25
B_DDR2_DQ0
W25
B_DDR2_DQ1
AE26
B_DDR2_DQ2
W24
B_DDR2_DQ3
AF24
B_DDR2_DQ4
AF25
B_DDR2_DQ5
V26
B_DDR2_DQ6
AE25
B_DDR2_DQ7
W26
B_DDR2_DQ8
Y26
B_DDR2_DQ9
AD25
B_DDR2_DQ10
Y25
B_DDR2_DQ11
AE24
B_DDR2_DQ12
AD26
B_DDR2_DQ13
Y24
B_DDR2_DQ14
AD24
B_DDR2_DQ15
AA24
A_MVREF
D15
A_DDR2_A0
C13
A_DDR2_A1
A22
A_DDR2_A2
B13
A_DDR2_A3
C22
A_DDR2_A4
A13
A_DDR2_A5
A23
A_DDR2_A6
C12
A_DDR2_A7
B23
A_DDR2_A8
B12
A_DDR2_A9
C23
A_DDR2_A10
B22
A_DDR2_A11
A12
A_DDR2_A12
A24
A_DDR2_BA0
C24
A_DDR2_BA1
B24
A_DDR2_BA2
D24
A_DDR2_MCLK
B14
/A_DDR2_MCLK
A14
A_DDR2_CKE
D23
A_DDR2_ODT
D14
/A_DDR2_RAS
D13
/A_DDR2_CAS
D12
/A_DDR2_WE
D22
A_DDR2_DQS0
B18
A_DDR2_DQS1
C17
A_DDR2_DQM0
C18
A_DDR2_DQM1
A19
A_DDR2_DQSB0
A18
A_DDR2_DQSB1
B17
A_DDR2_DQ0
B15
A_DDR2_DQ1
A21
A_DDR2_DQ2
A15
A_DDR2_DQ3
B21
A_DDR2_DQ4
C21
A_DDR2_DQ5
C14
A_DDR2_DQ6
C20
A_DDR2_DQ7
C15
A_DDR2_DQ8
C16
A_DDR2_DQ9
C19
A_DDR2_DQ10
B16
A_DDR2_DQ11
B20
A_DDR2_DQ12
A20
A_DDR2_DQ13
A16
A_DDR2_DQ14
B19
A_DDR2_DQ15
A17
0.
1u
F
C37
56
R21
10uF
C30
56
AR12
56
R36
150
OPT
R2
0
OPT
R49
+1.8V_S_DDR
56
AR14
0.
1u
F
C41
56
R20
0.
1u
F
C35
56
R35
0.
1u
F
C15
56
AR11
BLM18PG121SN1D
L1
56
R7
1000pF
C2
10uF
C13
0.
1u
F
C17
0.
1u
F
C24
0
OPT
R51
0.1uF
C40
0.
1u
F
C16
56
R11
56
R27
56
R30
150
OPT
R45
56
AR8
56
AR2
+1.8V_S_DDR
56
AR7
0.
1u
F
C7
1K
1 %
R44
1000pF
C42
+1.8V_S_DDR
0
OPT R48
33
R31
56
R42
33
R9
1K
1 %
R4
0.
1u
F
C27
+1.8V_S_DDR
0.1uF
C1
0.
1u
F
C19
33
R32
56
R17
56
R14
56
AR1
+1.8V_DDR
HYB18TC512160CF-2.5
IC1
Qimonda_Rev
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
HYB18TC512160CF-2.5
IC2
Qimonda_Rev
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
HYB18TC512160B2F-2.5
IC1-*1
Qimonda_before_Rev
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
HYB18TC512160B2F-2.5
IC2-*1
Qimonda_before_Rev
J2
VREF
J8
CK
H2
VSSQ2
B7
UDQS
N8
A4
P8
A8
L1
NC4
L2
BA0
R8
NC3
K7
RAS
F8
VSSQ3
F3
LDM
P3
A9
M3
A1
N3
A5
K8
CK
R3
NC5
L3
BA1
J7
VSSDL
L7
CAS
F2
VSSQ4
B3
UDM
M2
A10/AP
K2
CKE
R7
NC6
M7
A2
N7
A6
M8
A0
J1
VDDL
K3
WE
E8
LDQS
P7
A11
K9
ODT
A2
NC1
N2
A3
P2
A7
H8
VSSQ1
F7
LDQS
A8
UDQS
R2
A12
L8
CS
E2
NC2
E7
VSSQ5
D8
VSSQ6
D2
VSSQ7
A7
VSSQ8
B8
VSSQ9
B2
VSSQ10
P9
VSS1
N1
VSS2
J3
VSS3
E3
VSS4
A3
VSS5
G9
VDDQ1
G7
VDDQ2
G3
VDDQ3
G1
VDDQ4
E9
VDDQ5
C9
VDDQ6
C7
VDDQ7
C3
VDDQ8
C1
VDDQ9
A9
VDDQ10
R1
VDD1
M9
VDD2
J9
VDD3
E1
VDD4
A1
VDD5
B9
DQ15
B1
DQ14
D9
DQ13
D1
DQ12
D3
DQ11
D7
DQ10
C2
DQ9
C8
DQ8
F9
DQ7
F1
DQ6
H9
DQ5
H1
DQ4
H3
DQ3
H7
DQ2
G2
DQ1
G8
DQ0
TDDR_D[9]
TDDR_A[7]
BDDR2_A[7]
ADDR2_A[12]
/SDDR_CK
SDDR_D[0]
ADDR2_A[0]
SDDR_A[12]
ADDR2_A[11]
SDDR_A[2]
TDDR_A[12]
SDDR_A[11]
ADDR2_D[0]
ADDR2_D[3]
ADDR2_DQS0_P
ADDR2_D[7]
SDDR_D[14]
BDDR2_ODT
ADDR2_D[5]
BDDR2_D[12]
BDDR2_A[12]
ADDR2_A[7]
/TDDR_MCLK
ADDR2_DQM0_P
/SDDR_CAS
SDDR_A[5]
SDDR_DQM1_P
SDDR_A[7]
TDDR_BA[1]
BDDR2_D[1]
SDDR_D[2]
SDDR_A[12]
SDDR_A[0]
TDDR_D[5]
TDDR_D[12]
BDDR2_A[3]
BDDR2_A[11]
BDDR2_D[0]
BDDR2_D[12]
SDDR_D[15]
SDDR_D[14]
SDDR_BA[1]
SDDR_DQS1_N
SDDR_D[7]
TDDR_D[6]
TDDR_A[1]
TDDR_D[15]
ADDR2_D[15]
/TDDR_RAS
BDDR2_D[3]
SDDR_A[9]
SDDR_A[6]
BDDR2_DQS0_P
BDDR2_D[15]
TDDR_A[10]
TDDR_D[0]
BDDR2_A[0]
BDDR2_DQM1_P
ADDR2_D[6]
ADDR2_D[3]
TDDR_D[13]
ADDR2_DQS1_P
BDDR2_D[4]
ADDR2_ODT
BDDR2_D[14]
BDDR2_D[13]
TDDR_A[11]
TDDR_A[12]
/TDDR_CAS
SDDR_DQS0_N
SDDR_A[6]
BDDR2_A[9]
BDDR2_MCLK
/ADDR2_MCLK
BDDR2_A[5]
SDDR_DQM0_P
TDDR_A[6]
BDDR2_A[1]
BDDR2_D[6]
SDDR_D[2]
BDDR2_D[3]
ADDR2_D[1]
/BDDR2_RAS
TDDR_D[8]
BDDR2_D[9]
TDDR_D[0-15]
TDDR_D[12]
BDDR2_CKE
/BDDR2_MCLK
ADDR2_A[2]
TDDR_DQS0_P
TDDR_D[2]
SDDR_D[6]
ADDR2_D[5]
/TDDR_WE
ADDR2_A[9]
SDDR_D[10]
TDDR_A[1]
ADDR2_A[4]
/ADDR2_WE
TDDR_D[10]
BDDR2_A[1]
TDDR_A[8]
ADDR2_DQS1_N
ADDR2_A[7]
SDDR_D[0-15]
TDDR_DQM1_P
ADDR2_D[13]
SDDR_D[4]
BDDR2_A[12]
TDDR_D[13]
ADDR2_A[10]
ADDR2_D[4]
ADDR2_A[1]
SDDR_D[3]
BDDR2_D[10]
SDDR_D[5]
SDDR_A[8]
TDDR_A[9]
ADDR2_D[11]
SDDR_D[11]
TDDR_D[6]
BDDR2_D[2]
SDDR_D[10]
BDDR2_D[9]
TDDR_A[7]
SDDR_A[4]
SDDR_A[10]
BDDR2_A[3]
SDDR_A[2]
BDDR2_DQS1_N
ADDR2_BA[0]
BDDR2_A[10]
SDDR_D[1]
SDDR_DQS0_P
SDDR_A[1]
BDDR2_A[6]
ADDR2_DQM1_P
TDDR_A[0]
TDDR_MCLK
TDDR_D[8]
BDDR2_A[4]
ADDR2_MCLK
ADDR2_A[3]
BDDR2_DQM0_P
SDDR_A[9]
ADDR2_A[1]
BDDR2_DQS1_P
ADDR2_A[2]
SDDR_A[0-12]
ADDR2_D[9]
TDDR_D[4]
ADDR2_D[13]
BDDR2_D[0-15]
SDDR_D[4]
ADDR2_DQS0_N
TDDR_A[6]
SDDR_A[1]
BDDR2_D[1]
BDDR2_D[13]
BDDR2_A[5]
BDDR2_A[2]
BDDR2_A[0-12]
SDDR_D[6]
TDDR_A[11]
BDDR2_A[7]
ADDR2_D[2]
BDDR2_A[10]
SDDR_A[4]
ADDR2_D[2]
BDDR2_A[2]
ADDR2_A[12]
ADDR2_A[5]
TDDR_BA[0]
ADDR2_D[9]
ADDR2_D[0-15]
TDDR_DQS0_N
TDDR_D[7]
ADDR2_D[14]
ADDR2_BA[1]
SDDR_D[8]
ADDR2_A[0-12]
ADDR2_A[5]
/BDDR2_CAS
BDDR2_D[14]
BDDR2_A[8]
SDDR_D[5]
SDDR_A[8]
SDDR_D[11]
BDDR2_D[7]
TDDR_A[10]
ADDR2_A[8]
BDDR2_A[11]
ADDR2_D[11]
SDDR_D[13]
SDDR_D[3]
TDDR_D[15]
/ADDR2_CAS
ADDR2_A[11]
BDDR2_DQS0_N
TDDR_D[9]
/ADDR2_RAS
BDDR2_D[8]
BDDR2_BA[1]
SDDR_A[7]
SDDR_A[3]
ADDR2_D[15]
SDDR_DQS1_P
SDDR_ODT
TDDR_A[0]
TDDR_A[4]
BDDR2_D[10]
TDDR_A[0-12]
TDDR_D[3]
SDDR_D[9]
BDDR2_D[7]
ADDR2_D[12]
TDDR_A[3]
ADDR2_A[8]
TDDR_A[3]
SDDR_CK
ADDR2_D[7]
ADDR2_D[0]
BDDR2_A[0]
SDDR_A[10]
BDDR2_D[4]
ADDR2_A[6]
SDDR_D[8]
TDDR_DQM0_P
SDDR_A[0]
BDDR2_D[11]
SDDR_D[9]
TDDR_A[2]
TDDR_DQS1_P
ADDR2_A[9]
TDDR_D[5]
/SDDR_RAS
BDDR2_A[6]
BDDR2_BA[0]
TDDR_D[14]
TDDR_D[14]
ADDR2_A[10]
ADDR2_D[12]
SDDR_BA[0]
SDDR_D[7]
BDDR2_D[0]
ADDR2_A[6]
ADDR2_A[3]
TDDR_D[11]
BDDR2_A[8]
BDDR2_D[2]
TDDR_A[9]
TDDR_D[11]
BDDR2_D[11]
TDDR_D[7]
SDDR_D[12]
TDDR_D[4]
SDDR_CKE
TDDR_D[0]
TDDR_D[1]
TDDR_A[4]
TDDR_D[3]
ADDR2_D[10]
TDDR_D[1]
SDDR_D[13]
TDDR_CKE
BDDR2_A[9]
TDDR_A[8]
/SDDR_WE
BDDR2_D[15]
ADDR2_CKE
TDDR_A[5]
ADDR2_D[14]
ADDR2_D[4]
SDDR_A[11]
SDDR_D[0]
ADDR2_D[1]
TDDR_A[5]
ADDR2_D[8]
ADDR2_A[0]
ADDR2_D[6]
BDDR2_D[6]
TDDR_D[10]
SDDR_A[5]
TDDR_DQS1_N
ADDR2_D[8]
SDDR_A[3]
ADDR2_D[10]
ADDR2_A[4]
BDDR2_D[8]
/BDDR2_WE
BDDR2_D[5]
SDDR_D[15]
SDDR_D[12]
BDDR2_D[5]
TDDR_A[2]
BDDR2_A[4]
SDDR_D[1]
TDDR_D[2]
DDR2 1.8V By CAP - Place these Caps near Memory
DDR
C
2009
Click on the first or last page to see other 37LH40 / 37LH41 (CHASSIS:LA92G) service manuals if exist.