LG 32LT777H (CHASSIS:LA2FZ) Service Manual ▷ View online
- 25 -
Composite / RGB-PC Audio in Trouble Shooting guide
HDMI Audio in Trouble Shooting guide
Check input signal format.
Is it supported?
Y
Check AC cable for damage
For damage or open conductor
Y
Check JK3800
Can you see the normal waveform?
Y
Check the input of MTK(IC105).
Measure waveform at C345, C346, C319, C320 because it’s more easy to check.
Can you see the normal waveform?
Y
This board has big problem because Main chip (MTK) have some troubles.
After checking thoroughly all path once again, You should decide to replace MTK or not.
Replace JK3800
N
Check Audio AMP output
L5402,L5403,L5404,L5405
Replace L5402,L5403,L5404,L5405
N
Y
Check input signal format.
Is it supported?
Y
Check AC cable for damage
For damage or open conductor
Y
Check JK3301/JK3302/JK3303
Can you see the normal waveform?
Y
This board has big problem because Main chip (MTK) have some troubles.
After checking thoroughly all path once again, You should decide to replace MTK or not.
Replace JK3301, JK3302, JK3303
N
Check Audio AMP output
L5402,L5403,L5404,L5405
Replace
L5402,L5403,L5404,L5405
N
Y
- 26 -
BLOCK DIAGRAM
L
/
R
O
U
T
S
P
D
IF
O
U
T
N
A
N
D
Fl
a
sh
(2
G
B
)
U
S
B
(D
P
/
D
M
)
M
T5
36
9
C
V
B
S
(M
)
D
IF
(+/
-)
U
S
B
1
P
C
-R
G
B
E
x
t
S
P
K
O
P
T
IC
LA
N
1
S
Y
S
T
E
M
D
D
R
3
X
4
(2
G
b
)
H
D
M
I3
H
D
M
I2
Si
de
R
ea
r
R
G
B
,H
/
V
E
th
e
rn
e
t
(R
X
/
T
X
)
C
V
B
S
S
Y
S
T
E
M
E
E
P
R
O
M
X
1
(2
5
6
K
b
)
HD
M
I
S/
W
T
S
_
S
/
P
LV
DS
(8
bi
t)
3
0
P
5
1
P
S
M
A
R
T
b
-
L
A
N
E
th
er
n
et
H
U
B
I
C
D
m
od
.
IC
R
F
M
a
in
A
/V
S
IF
P
ro
:i
d
io
m
R
S
-2
3
2
C
DE
BU
G
PT
C
(M
IC
O
M
)
S/
W
A
/V
1
D
em
od
M
P
I/
S
P
I
E
xt
S
P
K
A
M
P
(F
H
D
)
(H
D
)
H
D
M
I1
C
V
B
S
V
id
e
o
A
u
d
io
V
id
e
o
A
u
d
io
W
i-
F
i
Sp
ea
ke
r
I2
S
O
u
t
A
u
d
io
A
M
P
R
JP
R
J1
2
H
D
CP
E
E
P
R
O
M
PH
Y
Ch
ip
IR
&
K
e
y
LA
N
2
3
7
/
4
2
/4
7
3
2
L
R
M
D
C
/M
D
IO
M
D
C
/M
D
IO
R
ea
r
In
te
lig
e
n
t
S
e
n
so
r
(R
X/
T
X)
I2
C
I2
C
I2
C
L
o
c
a
l D
im
m
in
g
I2
C
I2
C
T
S
_
S
I2
C
A
u
d
io
P
C
-A
u
d
io
U
S
B
2
(H
U
B
)
(A
R
C
)
최
대
동작주
파수
:
8
0
0
M
H
z
- 27 -
EXPLODED VIEW
Many electrical and mechanical parts in this chassis have special safety-related characteristics. These
parts are identified by in the Schematic Diagram and EXPLODED VIEW.
It is essential that these special safety parts should be replaced with the same components as
recommended in this manual to prevent X-RADIATION, Shock, Fire, or other Hazards.
Do not modify the original design without permission of manufacturer.
IMPORTANT SAFETY NOTICE
300
200
510
500
120
530
550
810
521
83
0
410
800
LV
1
400
900
910
54
0
* S
et
+
S
ta
nd
* S
ta
nd
B
as
e
+
Bo
dy
A10
A7
A2
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
EMMC_DATA[7]
EMMC_DATA[6]
EMMC_DATA[4]
EMMC_DATA[2]
EMMC_DATA[3]
EMMC_DATA[5]
MODEL_OPT_2
STB_SCL
SOC_RX
C116
0.1uF
0.1uF
R150
1K
1K
MODEL_OPT_0
R147
1K
1K
OPT
R155
10K
10K
R166
2.7K
OPT
2.7K
OPT
EMMC_CLK
R151
1K
1K
OPT
OSDA0
L/DIM0_MOSI
OSDA1
+3.3V_NORMAL
MODEL_OPT_8
MODEL_OPT_6
R148
1K
1K
SOC_TX
L/DIM0_VS
R103
4.7K
EMMC_DATA[2-7]
R168
4.7K
OPT
OPT
R157
4.7K
4.7K
OPT
R158
33
OPT
MODEL_OPT_1
MODEL_OPT_1
LED_PWM0
MT5369_XTAL_OUT
I2C_SDA5
MT5369_XTAL_IN
AVDD_33SB
MODEL_OPT_5
A_DIM
AVDD_33SB
MODEL_OPT_3
R105
4.7K
OPT
MODEL_OPT_10
L/DIM0_SCLK
R153
1K
1K
OPT
LED_PWM1
C118
0.1uF
0.1uF
OSCL0
VDD3V3
LED_PWM1
R136
33
MODEL_OPT_5
MODEL_OPT_3
MODEL_OPT_0
+3.3V_NORMAL
ERROR_OUT
MODEL_OPT_7
MODEL_OPT_6
+3.3V_NORMAL
IC104
AT24C256C-SSHL-T
NVRAM_ATMEL
3
A2
2
A1
4
GND
1
A0
5
SDA
6
SCL
7
WP
8
VCC
MODEL_OPT_9
R174
10K
OPCTRL3
EMMC_CLK
R169
10K
OPT
R171
22
R170
22
OSCL1
PWM_DIM2
R137
33
R161
4.7K
4.7K
OPT
R178
4.7K
OPT
PWM_DIM1
LED_PWM0
MODEL_OPT_7
+3.3V_NORMAL
IR
R154
1K
1K
C117
0.1uF
0.1uF
I2C_SCL5
+3.3V_NORMAL
STB_SDA
X100
27MHz
MT5369_XTAL_OUT
MT5369_XTAL_IN
R139
2.7K
2.7K
OSDA2
I2C_SDA2
R117
33
+3.3V_NORMAL
R115
33
I2C_SDA6
R188
2.7K
2.7K
I2C_SCL4
I2C_SDA4
OSCL2
I2C_SCL5
R122
33
R160
2.7K
2.7K
R116
33
I2C_SDA5
R142
2.7K
2.7K
OSCL0
I2C_SCL2
STB_SDA
R111
33
R123
33
R134
2.7K
2.7K
I2C_SDA1
I2C_SCL3
R114
33
R110
33
OSCL1
I2C_SCL6
I2C_SDA3
R113
33
R164
2.7K
2.7K
OSDA1
R173
2.7K
2.7K
R156
2.7K
2.7K
R118
33
R185
2.7K
2.7K
OSDA0
R177
2.7K
2.7K
R112
33
I2C_SCL1
R121
33
STB_SCL
R176
10K
M_RFModule_RESET
R162
10K
R163
10K
/TU_RESET
EXT_SPK_DET
M_RFModule_ISP
AV1_CVBS_DET
OPCTRL3
DSUB_DET
OPCTRL_1_SCL
OPCTRL_11_SCL
/S2_RESET
R140
4.7K
MTK_DVB_T2_TUNER
R106
4.7K
MTK_Int_FRC/URSA5
R135
4.7K
MTK_CP_BOX
R101
4.7K
MTK_FRC3/URSA5
R189
4.7K
MTK_EPI
R186
4.7K
MTK_DVB_C2_TUNER
R125
4.7K
MTK_OPTIC_Tx_IC
R130
4.7K
MTK_3D_DEPTH_IC
R108
4.7K
MTK_FHD
R175
4.7K
MTK_DVB_S_TUNER
R132
4.7K
MTK_DDR_768MB
R190
4.7K
MTK_NON_EPI
R127
4.7K
MTK_NON_OPTIC_Tx_IC
R133
4.7K
MTK_DDR_DEFAULT
R129
4.7K
MTK_NON_3D_DEPTH_IC
R141
4.7K
MTK_NON_DVB_T2_TUNER
R102
4.7K
MTK_NO_FRC/Int_FRC
R138
4.7K
MTK_NON_CP_BOX
R109
4.7K
MTK_HD
R187
4.7K
MTK_NON_DVB_C2_TUNER
R184
4.7K
MTK_NON_DVB_S_TUNER
R107
4.7K
MTK_NO_FRC/FRC3
OPCTRL_0_SDA
OPCTRL_10_SDA
OPCTRL_1_SCL
OPCTRL_11_SCL
OPCTRL_0_SDA
OPCTRL_10_SDA
C101
0.1uF
16V
R191
22
+3.3V_NORMAL
R192
22
I2C_SCL1
R181
4.7K
I2C_SDA1
+3.3V_NORMAL
+3.3V_NORMAL
R159
4.7K
C120
2.2uF
10V
2.2uF
10V
OPT
R193
10K
/S2_RESET
R128
1.2K
1.2K
R131
1.2K
1.2K
EMMC_DATA[0]
EMMC_DATA[1]
EMMC_CMD
R119
0
IC104-*1
M24256-BRMN6TP
NVRAM_ST
3
E2
2
E1
4
VSS
1
E0
5
SDA
6
SCL
7
WC
8
VCC
C115
24pF
24pF
C113
24pF
24pF
AMP_RESET_SOC
IC105
LGE2112
JTCK
AP14
JTDI
AM14
JTDO
AR14
JTMS
AR15
JTRST
AN14
OSDA0
AP12
OSCL0
AN12
OSDA1
AP15
OSCL1
AN15
XTALI
AT34
XTALO
AU34
AVDD33_XTAL_STB
AK27
AVSS33_XTAL_STB
AH26
AVDD33_VGA_STB
AK18
AVSS33_VGA_STB
AK17
AVDD33_PLLGP
AK23
AVSS33_PLLGP
AM27
AVDD10_LDO
AJ20
GPIO0
H32
GPIO1
F37
GPIO2
F36
GPIO3
G37
GPIO4
G36
GPIO5
G35
GPIO6
G34
GPIO7
H34
GPIO8
L34
GPIO9
L32
GPIO10
K33
GPIO11
K32
GPIO12
H33
GPIO13
L35
GPIO14
K36
GPIO15
J32
GPIO16
J34
GPIO17
K34
GPIO18
K35
GPIO19
K37
GPIO20
J36
GPIO21
J37
GPIO22
J35
GPIO23
J33
GPIO24
G33
GPIO25
H35
GPIO26
H31
GPIO27
F34
GPIO28
E36
GPIO29
N33
GPIO30
P32
GPIO31
M35
GPIO32
M37
GPIO33
M33
GPIO34
F35
GPIO35
E35
GPIO36
E37
GPIO37
N32
GPIO38
M34
GPIO39
M36
GPIO40
M32
GPIO41
L33
GPIO42
E33
GPIO43
E32
GPIO44
F32
GPIO45
A29
GPIO46
D31
GPIO47
C31
GPIO48
E30
GPIO49
E31
GPIO50
F31
GPIO51
E29
GPIO52
AP9
GPIO53
AT9
GPIO54
AR9
GPIO55
AU9
ADIN0_SRV
AN23
ADIN1_SRV
AN24
ADIN2_SRV
AP23
ADIN3_SRV
AR23
ADIN4_SRV
AU23
ADIN5_SRV
AT23
ADIN6_SRV
AM24
ADIN7_SRV
AM23
U0TX
AR18
U0RX
AP18
U1RX
AU16
U1TX
AT16
POWE
A35
POOE
C33
POCE1
B34
POCE0
D33
PDD7
D29
PDD6
C30
PDD5
D30
PDD4
B31
PDD3
A31
PDD2
B32
PDD1
A32
PDD0
C32
PARB
D32
PACLE
A34
PAALE
C34
EMMC_CLK
C29
OPWRSB
AM20
ORESET
AM22
OIRI
AU21
FSRC_WR
D27
STB_SCL
AT21
STB_SDA
AR21
DEMOD_RST
T34
DEMOD_TSCLK
T32
DEMOD_TSDATA0
T36
DEMOD_TSDATA1
U36
DEMOD_TSDATA2
T33
DEMOD_TSDATA3
T30
DEMOD_TSDATA4
V33
DEMOD_TSDATA5
V32
DEMOD_TSDATA6
V31
DEMOD_TSDATA7
V30
DEMOD_TSSYNC
T35
DEMOD_TSVAL
T31
CI_INT
N36
CI_TSCLK
T37
CI_TSDATA0
R35
CI_TSSYNC
R37
CI_TSVAL
R36
PVR_TSCLK
R34
PVR_TSVAL
R32
PVR_TSSYNC
R33
PVR_TSDATA0
P33
PVR_TSDATA1
P34
SPI_CLK1
N37
SPI_CLK
P35
SPI_DATA
N34
SPI_CLE
N35
OPWM2
AU12
OPWM1
AT12
OPWM0
AR12
SD_D0
A37
SD_D1
C35
SD_D2
A36
SD_D3
B35
SD_CMD
B36
SD_CLK
B37
LDM_CS
AT11
LDM_CLK
AU11
LDM_VSYNC
AR10
LDM_DO
AM9
LDM_DI
AP10
LED_PWM1
AN22
LED_PWM0
AP21
OPCTRL11
AU20
OPCTRL10
AT20
OPCTRL9
AN18
OPCTRL8
AP20
OPCTRL7
AM18
OPCTRL6
AN19
OPCTRL5
AP19
OPCTRL4
AR19
OPCTRL3
AN21
OPCTRL2
AM19
OPCTRL1
AN20
OPCTRL0
AR20
IC104-*2
R1EX24256BSAS0A
NVRAM_RENESAS
3
A2
2
A1
4
VSS
1
A0
5
SDA
6
SCL
7
WP
8
VCC
R179
22
RESET_BY_CPU
TS_S_OUT_DATA
TS_S_OUT_VAL
TS_S_OUT_CLK
TS_S_OUT_SYNC
R1005
22
R1006
22
R1007
22
R1008
22
TS_S_IN_0_CLK
TS_S_IN_0_VAL
TS_S_IN_0_SYNC
TS_S_IN_0_DATA
TS_S_IN_1_CLK
TS_S_IN_1_VAL
TS_S_IN_1_SYNC
TS_S_IN_1_DATA
PTC_RX_MTK_3.3V
PTC_TX_MTK
/UPDATE_BY_CPU
/PROIDIOM_RESET_SOC
/LGDT3305_RESET
C106
0.1uF
OPT
C102
0.1uF
OPT
/USB2SER_RESET
R197
1K
1K
PWM1_PULL_DOWN_1K
R198
1K
1K
PWM2_PULL_DOWN_1K
USB_CTL1
/USB_OCD1
R1009
0
R1010
100
MDS62110213
M22
MTK_H/S_3.5T
MDS62110213
M20
MTK_H/S_3.5T
MDS62110213
M21
MTK_H/S_3.5T
MDS62110213
M23
MTK_H/S_3.5T
/USB_OCD2
USB_CTL2
C122
0.1uF
OPT
C121
0.1uF
OPT
P100
12507WS-12L
JTAG
1
2
3
4
5
6
7
8
9
10
11
12
13
AR100
10K
10K
JTAG
JTCLK
JTDO
JTMS
R152
1K
1K
JTAG
+3.3V_NORMAL
R144
10K
10K
JTAG
R143
33
JTAG
R145
10K
10K
JTAG
JTDI
JTRST#
R146
10K
10K
JTAG
+3.3V_NORMAL
+3.3V_NORMAL
R149
10K
10K
JTAG
JTDO
JTCLK
JTRST#
JTDI
JTMS
/TU_RESET_1
R1012 OPT
0
R1013
OPT
0
MDS62110214
M24
MTK_H/S_9.5T
IC100
M24C16-R
HDCP_EEPROM_ST
3
NC_3
2
NC_2
4
VSS
1
NC_1
5
SDA
6
SCL
7
WC
8
VCC
IC100-*1
24LC16B
HDCP_EEPROM_MICRO
3
A2
2
A1
4
VSS
1
A0
5
SDA
6
SCL
7
WP
8
VCC
OPC_EN
R1016
100
OPT
Q1001
MMBT3904(NXP)
E
B
C
SOC_RESET
C114
0.1uF
16V
16V
OPT
R1002
10K
R172
22
OPT
R1001
100
LAN1_DET
LAN2_DET
R104
4.7K
OPT
R1004
100
OPT
R1011
100 OPT
C108
2.2uF
10V
2.2uF
10V
C107
2.2uF
10V
2.2uF
10V
HDMI_CEC_MTK
EXT_PWR_DET
R1015
100
EXT_PWR_DET
R1014
0
OPT
PTC_WOL
C113-*1
8pF
50V
8pF
50V
12pF crystal
X100-*1
27.0MHZ
27.0MHZ
12pF Crystal
C115-*1
8pF
50V
8pF
50V
12pF crystal
8
MID_MAIN_1
2011.09.29
LG FRC2
3D DEPTH
T2 Tuner
MODEL OPTION 8 is just for CP Box
It should not be appiled at MP
It should not be appiled at MP
NON_3D_Depth_IC
S Tuner
SoC
internal
FRC
internal
FRC
NON_OPTIC
MODEL_OPT_9
OPTIC
1
MODEL_OPT_7
MODEL_OPT_3
Support
FHD
Write Protection
- Low : Normal Operation
- High : Write Protection
- High : Write Protection
Disable
Reserved
DDR_768MB
EPI
Reserved
MODEL_OPT_2
DDR
MODEL_OPT_6
HIGH
MODEL_OPT_8
MODEL_OPT_0
Not Support
Default
1
Not Support
CP BOX
MODEL_OPT_5
0
0
Support
Enable
LOW
1
NO_FRC
NVRAM
Model Option
0
Close to eMMC Flash
(IC8100)
(IC8100)
MODEL_OPT_10
0
HD
STRAPPING LED_PWM0 LED_PWM1 OPCTRL3
ICE mode + 27M + Serial boot 0 0 0
ICE mode + 27M + ROM to Nand boot 0 0 1
ICE mode + 27M + Rom to eMMC boot 0 1 0
from eMMC pins (share pins w/s NAND)
from eMMC pins (share pins w/s NAND)
ICE mode + 27M + ROM to eMMC boot 0 1 1
from SDIO pins
from SDIO pins
DDR_Default
MODEL_OPT_1
1
MODEL_OPT_4
3D_Depth_IC
X-TAL
I2C
I2C_1 : AMP, L/DIMMING
I2C_2 : T-CON
I2C_3 : MICOM
I2C_4 : S/Demod,T2/Demod, LNB
I2C_5 : NVRAM, HDCP KEY
I2C_6 : TUNER_MOPLL(T/C,ATV)
I2C_2 : T-CON
I2C_3 : MICOM
I2C_4 : S/Demod,T2/Demod, LNB
I2C_5 : NVRAM, HDCP KEY
I2C_6 : TUNER_MOPLL(T/C,ATV)
M_RFModule_ISP
HDCP EEPROM
Support
Not Support
5V Tolerance
MODEL_OPT_4
MODEL_OPT_4
Crystal Matching Test result
: 27pF -> 20pF -> 24pF
: 27pF -> 20pF -> 24pF
EAX6430790* : LD22* / LC22*
EAX6443420* : LT22* / LJ22* / LA22* / LB22*
EAX6443420* : LT22* / LJ22* / LA22* / LB22*
SOC -> P:I
SOC <- Ext. Demod.
SOC <- P:I
PTC Interface
xxLT760H-UA
JTAG
To HDMI
12pF crystal & load cap.
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