JBL SB 400 (serv.man2) Service Manual ▷ View online
2.3 P
INOUT
C
ATEGORY
D
ETAILS
Power:
3.3v supply pins are provided on either side of the module. These pins are all internally connected inside of the SiP
and are provided for convenience so that Ginseng can be powered from either the left or right sides to make
routing a PCB convenient for various applications. It is generally recommended to power the 3.3V bus from only
one side of the SiP. The pins on the other side should be shunted to ground through a 0.1uF and 1uF set of
capacitors.
and are provided for convenience so that Ginseng can be powered from either the left or right sides to make
routing a PCB convenient for various applications. It is generally recommended to power the 3.3V bus from only
one side of the SiP. The pins on the other side should be shunted to ground through a 0.1uF and 1uF set of
capacitors.
XPD:
The XPD port is a SPI bus used for loading module firmware during development and mass production and also for
debugging. One of the following two styles of XPD port connectors should be included on all motherboard designs
that use Ginseng to ensure that loading code and debugging can be done easily. The XPD port interfaces to the
XPD module which provides an interface to a host computer via RS-232 or USB. The XPD port operates from the
V
debugging. One of the following two styles of XPD port connectors should be included on all motherboard designs
that use Ginseng to ensure that loading code and debugging can be done easily. The XPD port interfaces to the
XPD module which provides an interface to a host computer via RS-232 or USB. The XPD port operates from the
V
CC
bus. To ensure proper functionality of the XPD interface, be sure to minimize the amount of capacitance on
the XPD lines. Note: the XPD_RESET / EXT_RST pin is tolerant up to 1.8V MAX -- if control of the Reset pin is
desired, a series diode must be used to guarantee the input voltage does not exceed the 1.8V max.
desired, a series diode must be used to guarantee the input voltage does not exceed the 1.8V max.
Figure 1 - XPD Pinout
Digital IO:
Ginseng has general purpose digital IO (“GPIO”) pins available for use by the application firmware. GPIO pins use
the same logic voltage as the 3.3V pin and have the following software configurable features: IO direction, drive
strength (for output only), Schmitt Trigger (for input only), pull up (input only), pull down (input only), slew rate
(output only). Ginseng is also capable of active-high and active-low configuration of LEDs.
the same logic voltage as the 3.3V pin and have the following software configurable features: IO direction, drive
strength (for output only), Schmitt Trigger (for input only), pull up (input only), pull down (input only), slew rate
(output only). Ginseng is also capable of active-high and active-low configuration of LEDs.
VCC
1x8 Classic
1
XPD
3.3V
VCC
SCK
PB0
MISO
MOSI
MOSI
GND
PB1
Reset
2
3
4
5
6
7
8
3
4
5
6
7
8
XPD_SCK
XPD_PB0
XPD_MOSI
XPD_MISO
XPD_PB0
XPD_MOSI
XPD_MISO
XPD_PB1
EXT_RST
EXT_RST
VCC
PB0
MOSI
PB1
SCK
MISO
GND
Reset
2x4
1
3
5
7
2
4
6
8
FTS-104-01-L-DV
XPD PB0
XPD MOSI
XPD PB1
XPD SCK
XPD MISO
EXT RST
3.3V
G
INSENG
M
ODULE
D
ATASHEET
-
D
IGITAL
W
IRELESS
A
UDIO
S
OLUTION FOR
G
ENERAL
A
PPLICATIONS
DO1620 - Ginseng Data sheet (rev. 1.2) 2012-04-02 Page 11 of 40
JBL
SB 400 Service Manual
Page 20 of 30
Product Specification
Spec-BM153-V4.3 Page 3 of 7 www.sunitec.com.tw
®
Pin Configurations
PIN NO.
NAME
TYPE
FUNCTION
RE-MARK
1
AIO1
Bi-directional
Programmable input/output line
2
AIO0
Bi-directional
Programmable input/output line
3
RESET
CMOS input with
weak internal pull-up
weak internal pull-up
Reset if low. Input debounced so must be low for >5ms to
cause a reset
cause a reset
4 GND GND
Ground
5
PIO9
Bi-directional
Programmable Input/Output Line
6
PIO10
Bi-directional
Programmable Input/Output Line
7
PIO11
Bi-directional
Programmable Input/Output Line
8
PIO12
Bi-directional
Programmable Input/Output Line
9
PIO13
Bi-directional
Programmable Input/Output Line
10
PIO14
Bi-directional
Programmable Input/Output Line
11
PIO15
Bi-directional
Programmable Input/Output Line
12 GND GND
Ground
13
VDD
Power
+3.3V Supply
For 3.3V Version
VDD
Power
Connect to +1V8
For 1.8V Version
14 VDD_USB
Power
Positive
supply
for
UART/USB ports, Connect to VDD
15 +1V8 Power
+1.8V
Supply
16 GND GND
Ground
17
USB_DP
Bi-directional
USB Data Plus
18
USB_DN
Bi-directional
USB Data Minus
19
UART_RTS
CMOS Output
UART Request To Send (Active Low)
20
UART_CTS
CMOS Input
UART Clear To Send (Active Low)
21
UART_RX
CMOS Input
UART Data Input (Active High)
22
UART_TX
CMOS Output
UART Data Output (Active High)
23
PCM_IN
CMOS Input
Synchronous Data Input
24
PCM_SYNC
Bi-directional
Synchronous Data Sync
25
PCM_CLK
Bi-directional
Synchronous Data Clock
26
PCM_OUT
CMOS Output
Synchronous Data Output
27
SPI_CSB
CMOS Input
Chip Select For Synchronous Serial Interface (Active Low)
28
SPI_MISO
CMOS Output
Serial Peripheral Interface Data Output
29 SPI_CLK
CMOS
Input Serial
Peripheral Interface Clock
30
SPI_MOSI
CMOS Input
Serial Peripheral Interface Data Input
31
VRE_IN
Analogue
Take high to enable switch-mode regulator
32
VDD_BAT
Battery terminal +ve
Lithium ion/polymer battery positive terminal. Battery
charger output and input to switch-mode regulator
charger output and input to switch-mode regulator
33 GND GND
Ground
34
VDD_CHG
Charger input
Lithium ion/polymer battery charger input
35
LED1
Open drain output
LED Driver
36
LED0
Open drain output
LED Driver
37 GND GND
Ground
38 SPK_L_N
Analogue
Speaker
output negative, left
39
SPK_L_P
Analogue
Speaker output positive, left
40
SPK_R_N
Analogue
Speaker output negative, right
41
SPK_R_P
Analogue
Speaker output positive, right
42 GND GND
Ground
43 MIC_BIAS
Analogue
Microphone
bias
44
MIC_B_P
Analogue
Microphone input positive, right
45
MIC_B_N
Analogue
Microphone input negative, right
46
MIC_A_P
Analogue
Microphone input positive, left
47
MIC_A_N
Analogue
Microphone input negative, left
48 GND GND
Ground
49
PIO0
Bi-directional
Programmable Input/Output Line
50
PIO1
Bi-directional
Programmable Input/Output Line
51
PIO2
Bi-directional
Programmable Input/Output Line
52
PIO3
Bi-directional
Programmable Input/Output Line
53
PIO4
Bi-directional
Programmable Input/Output Line
54
PIO5
Bi-directional
Programmable Input/Output Line
55
PIO6
Bi-directional
Programmable Input/Output Line
56
PIO7
Bi-directional
Programmable Input/Output Line
57
PIO8
Bi-directional
Programmable Input/Output Line
58 GND GND
Ground
59 RF-IN RF
RF
Interface
60 GND GND
Ground
JBL
SB 400 Service Manual
Page 21 of 30
Product Specification
Spec-BM153-V4.3 Page 4 of 7 www.sunitec.com.tw
®
Recommended Layout patterns:
JBL
SB 400 Service Manual
Page 22 of 30
STM32F105xx, STM32F107xx
Pinouts and pin description
Doc ID 15274 Rev 4
23/95
3
Pinouts and pin description
Figure 2.
STM32F105xxx and STM32F107xxx connectivity line LQFP100 pinout
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
VDD_2
VSS_2
NC
PA 13
PA 12
PA 11
PA 10
PA 9
PA 8
PC9
PC8
PC7
PC6
PD15
PD14
PD13
PD12
PD11
PD10
PD9
PD8
PB15
PB14
PB13
PB12
VSS_2
NC
PA 13
PA 12
PA 11
PA 10
PA 9
PA 8
PC9
PC8
PC7
PC6
PD15
PD14
PD13
PD12
PD11
PD10
PD9
PD8
PB15
PB14
PB13
PB12
PA
3
VSS
_4
VDD_
4
PA
4
PA
5
PA
6
PA
7
PC4
PC5
PB0
PB1
PB2
PE7
PE8
PE9
PE
10
PE
11
PE
12
PE
13
PE
14
PE
15
PB
10
PB
11
VSS
_1
VDD_
1
VDD_
3
VS
S_3
PE
1
PE
0
PB
9
PB
8
BOO
T0
PB
7
PB
6
PB
5
PB
4
PB
3
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
PC12
PC11
PC10
P
A
15
P
A
14
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
PE2
PE3
PE4
PE5
PE6
PE3
PE4
PE5
PE6
VBAT
PC13-TAMPER-RTC
PC14-OSC32_IN
PC15-OSC32_OUT
VSS_5
VDD_5
OSC_IN
OSC_OUT
NRST
PC0
PC1
PC2
PC3
PC1
PC2
PC3
VSSA
VREF-
VREF+
VDDA
PA0-WKUP
PA1
PA2
PA2
ai14391
LQFP100
JBL
SB 400 Service Manual
Page 23 of 30
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